target-arm queue:

 * Some not-yet-enabled preliminaries for M-profile MVE support
 * Consistently use "Cortex-Axx", not "Cortex Axx" in docs, comments
 * docs: Fix installation of man pages with Sphinx 4.x
 * Mark LDS{MIN,MAX} as signed operations
 * Fix missing syndrome value for DAIF and PAC check exceptions
 * Implement BFloat16 extensions
 * Refactoring of hvf accelerator code in preparation for aarch64 support
 * Fix some coverity nits in test code
-----BEGIN PGP SIGNATURE-----

iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmC4/AoZHHBldGVyLm1h
eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gQ0D/9tPOcsqQ78ZQGGkZRPM8LP
HgDsXIgzhkCguNWlOQqBmDppOdEP5yVUw084dEqKbi/0pIqrQMC/Xn6KgZWuQEd5
Ye6a6xvO0ZG/Df4fbhB9afGll+6aDCg1QK8Zm6xPzQUuAbyo8vZfxG5neV5o+QHb
XboXm1Cpn28V9zglZb3izt5Uka/4MRND/AfRviwZzGc07KKRGxuVJZ1jGizWxf61
oX+xhgv6+SCNXuAshW8UwFfyD0OMU1+1q9xLRA0QYaVTsbK0HGkN3gk7Zk+gzViJ
//PVY0BlUx2Li03lxrfE2jinFCNPxTq0WV6K7eU4qsXXq6/mF/a1DLM/PaunRzgd
wodu5RewC9P934d2MsDDRlBZKboa0zmcYaCwMNchoob7AVf9hCvc5VFbmYiF6Z9w
pROxbL9lqP2c1bh+0ID8qB6NFYewyX/FNaPE213hOClwxowtvtyZsST5AkWiZkAe
TlfR8sNTHAjUXvAsApMPX3MJeI9X2kWbo2PI1wTXojNZNLHJ5mBN9U32LzbeULXE
LvLAU8EmuE8T6nZsfG1XW1Z6CL9/9QaTaOX0QQ9s0LRvG+NNNUG1ACkm5Jm5KA8U
U69eS4IZgc6Y/3PbNTfhLQx4IAyzH9YxjC0gzeCbYosumQdNUUEfOfyoxEACDLuH
BbpkRCpN2tZuHXG+JSsssQ==
=hjbH
-----END PGP SIGNATURE-----