tag name | pull-target-arm-20200430 (e7844b9d74b965af7d05fe2b72fb313c261ce753) |
tag date | 2020-04-30 12:48:23 +0100 |
tagged by | Peter Maydell <peter.maydell@linaro.org> |
tagged object | commit 1267437e59... |
target-arm queue:
* xlnx-zdma: Fix endianness handling of descriptor loading
* nrf51: Fix last GPIO CNF address
* gicv3: Use gicr_typer in arm_gicv3_icc_reset
* msf2: Add EMAC block to SmartFusion2 SoC
* New clock modelling framework
* hw/arm: versal: Setup the ADMA with 128bit bus-width
* Cadence: gem: fix wraparound in 64bit descriptors
* cadence_gem: clear RX control descriptor
* target/arm: Vectorize integer comparison vs zero
* hw/arm/virt: dt: add kaslr-seed property
* hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl6qu5UZHHBldGVyLm1h
eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3sENEACIU9DQO2m3mZAm2dEFPF+N
7ywwzqmi0lzy7G5NTyYbymTFQsOlDsnnKl6oHRy7+CQ/gUsM8ykpTJ8y18E0s+UP
lFvXEdIVJi0Nt0sn7TCihFZCGwGJAfpRhFtG7hbL8hvyUhqrY3gXJ0cNpBa3QMkq
RPrvxgIORGjrX8i5jYoXyR+6TK7tdt+wCQyPd/YEBg1jglQP2mp+LgAr2ttoq1Hi
4gdP3tjgIrJcIjGpPS/h7QEkXXxvNPCjBB8cprGqONPz0OElP4KePIc6nBP2S+Bz
/FaHzo1rV5BptCvfLpeo2sL5l3ed8LDs3CCCRoe6fWb2nLgZA25rFJqWOxy12ja2
Ld2oKk1kKWpmqqHp9B3cieu1O8J/uT3cfXMCerjkjULWPm+fo0ys4qFvhmKa7dym
if8zKOaY1dWlJ1y4RbW9CQ891qni2oev8IvRKPGYeqNT3Hn10g9lGAI3xDUuQqfb
LRdVi27ZScgp5aw+GfRG+YpDJPidEuO26crP+FLxD0EDHqmKMyFTNDl7hlul/sgJ
6lPwc5uf1Ws165C8MF2y7X3vfCSrOzOq/MR12K1gs3qbcXEQNokvvN0wn7iV/pqi
BG3nzpfLkryCnKxAHxywncPKGXicSsQCyQuYCcrLidZbMfQl3fWXmI9q0Hs34boj
srCSXf1ltL0giccdMdc3Kg==
=O/FI
-----END PGP SIGNATURE-----