tag name | pull-target-arm-20190617 (a2fd757d0b1894ed9a524a1dda62c4c0b280fcdd) |
tag date | 2019-06-17 15:30:30 +0100 |
tagged by | Peter Maydell <peter.maydell@linaro.org> |
tagged object | commit 1120827fa1... |
target-arm queue:
* support large kernel images in bootloader (by avoiding
putting the initrd over the top of them)
* correctly disable FPU/DSP in the CPU for the mps2-an521, musca-a boards
* arm_gicv3: Fix decoding of ID register range
* arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1
* some code cleanups following on from the VFP decodetree conversion
* Only implement doubles if the FPU supports them
(so we now correctly model Cortex-M4, -M33 as single precision only)
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