tag name | pull-target-arm-20181030 (b27454256debc060541022f5be65fa43ec742c9c) |
tag date | 2018-10-30 13:22:38 +0000 |
tagged by | Peter Maydell <peter.maydell@linaro.org> |
tagged object | commit 1f5a65a188... |
target-arm queue:
* microbit: Add the UART to our nRF51 SoC model
* Add a virtual Xilinx Versal board "xlnx-versal-virt"
* hw/arm/virt: Set VIRT_COMPAT_3_0 compat
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJb2FsgAAoJEDwlJe0UNgzelc0QAJdukQ5H51P9Ar94gY80Hid9
rlxnYlPn5jq4u468M2FZzNor4AGWI2UGjAyI6j66aH4YZNCfdOtan1cnlPcyTcfp
CMAzv9XthihwkD5zjFxxzsquXOZxKrsFKHpk2xlz/jXScEZ2LZSh1dyTTVt8RLY+
RDLRyZpFxCb0F+OIa0ELB17guI2tkRqiHd7qZ0bf5f1jmn9nEIg6oB+j3tfJ/OVG
IXclmWrzRa++nEbJtBaex/jso1aswuIfNQ+RqDr6tNLYueD6W65zF/+lU8aPyQDb
suxJwLqi5UYDjMshnNg1uwgbrA4E6ABrTDPGhZdqgAAFTtwT0v0AvRc83bRpPxXX
AU7yH6rIFK4QMdRD2ucst7YKhJmMICMBFnkBBfcDAKxVoPQz7r84Q/UAxsxqQxy1
SrJsY3p2y3pZnXaifPcM2m0bTJdUvv/5iYo6kZ3QnMeBaf09YCXhQTa9J7VGVAc3
MwUyP2UTNsVo/6xn3cV842ySYgt6n9LuKiv75QLb28lIYIajnEyFsa5dajYd8StX
zyZeZynCIQc0um9hEWbBmx2KFzpgYE5SXLkyBedFs5gYydSTUK0Yc0Cj4/mu9DeG
HtXFz0HFZwhykCIP0rm6DElqwV7Ucp2QMUbpWy3C2IpOtfuMtMROZxKV9oWc+hHK
9/V3HFuvyQDQWuZy5KWO
=94Wv
-----END PGP SIGNATURE-----