target-arm queue:

 * Fix rounding errors in scaling float-to-int and int-to-float operations
 * Connect virtualization-related IRQs and memory regions of GICv2
   in boards that use Cortex-A7 or Cortex-A15
 * Support taking exceptions to AArch32 Hyp mode
 * Clear CPSR.IL and CPSR.J on 32-bit exception entry
   (a minor bug fix that won't affect non-buggy guest code)
 * mps2-an505: Implement various missing devices:
   dual timer, watchdogs, counters in the FPGAIO registers,
   some missing ID/control registers, TrustZone Master Security
   Controllers, PL081 DMA controllers, PL022 SPI controllers
 * correct ID register values for mps2-an385, -an511, -an505
 * fix some hardcoded tabs in untouched backwaters of the
   target/arm codebase
 * raspi: Refactor framebuffer property handling code and implement
   support for the virtual framebuffer/viewport
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1

iQIcBAABCAAGBQJbf9B/AAoJEDwlJe0UNgze8tkQAJt21WTMcWzz5bkOmRymTesP
WHVR0DekCSDuXYNNgL7wVOE1jQw6dHT5rOXE6SGXbf/FXrg7M7zmcVFuPikTHVGA
hCHRSh950lswAzysGrzfUY8YgyEM+/D11oyXuhz1WAIORufCLwc63aDyJ9gydbaI
5r+cYuXB/z8aIt/fbsj/TsjJTX0yDn+qz6olwxfZwtxYCWJ92ssB1fcGHUEKIkdH
QnOlsQ6aNBE0+QCScN/ec4umzsBltFd03BIyiFnfDt43pmMw6sgSZZ2SATFju0Jy
HVcFD8wwOlsCP47Snk0dc7Hv164x1HtPFHgsYoM0RMLfHGteWIMKqtkU5JnCWBX4
kDy7JBgx1XzOnrdOJYh3gMlajbi/KovzMgSczER9st8R+W58a1/4S2JEwZhMZpdG
QmOjvzqL6BGSADTkxKAcGDSFuXpWnS4TC+mILH5Tfq/W5LB0FBMVIElOmbeSrnvK
2YHnJ1EQXERX3K1hxIWdCSkbW/KKBMJ5Qt8tL+3WAxTdx8hebbuf3Dei2tAPUpQD
kBYwFOy4GNkRLxL4GavSxSFsKn7rg/75AlXYOIhJc+XR3+L2FZskG5V3Jmp4QRk7
MnkjnYiK55eg4tNtCwYjlJIR4sWuzBhaTFZRjiTJ05k6LuKeFT0db9LRce7+D2Kj
bkE19yAKlBWyKdOOeGE8
=bWGR
-----END PGP SIGNATURE-----