aboutsummaryrefslogtreecommitdiff
tag namepull-target-arm-20180816 (f345e7f35fc5e7060388b7ebaa883be1ef966a6e)
tag date2018-08-16 14:33:33 +0100
tagged byPeter Maydell <peter.maydell@linaro.org>
tagged objectcommit fcf13ca556...
target-arm queue:
* Fixes for various bugs in SVE instructions * Add model of Freescale i.MX6 UltraLite 14x14 EVK Board * hw/arm: make bitbanded IO optional on ARMv7-M * Add model of Cortex-M0 CPU * Add support for loading Intel HEX files to the generic loader * imx_spi: Unset XCH when TX FIFO becomes empty * aspeed_sdmc: fix various bugs * Fix bugs in Arm FP16 instruction support * Fix aa64 FCADD and FCMLA decode * softfloat: Fix missing inexact for floating-point add * hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJbdX01AAoJEDwlJe0UNgzeEpIP/Rd7CyPtQX/c9FIFC53BknQ+ xM4W2e88wS9pCNDwc0jRG0x67YcXIRjixbJuZcfobmcr9isqTJjFTQyWuOf5/XxC b2qHa5vRlW0ro8Ug62Vnk0lV7sxsLcAeWfzWbOrSKjkiM3Iq1X4msq7wkTylgpzF Wp8S1IpPpOvmxQxScC0pZPFz0fOKDOHf/HKDJ1sUKLAi58BMt5A6RB2u5UZD40Oy etmJyAZURxAsicn9MlrPW2lyh+SVREbBz7YXq04ZMr48pps2E8SU6no4RXtlyhe3 K3VF4Ltq8sVXI8Pt8/JnPnBwAAQ9Z85/EVF8qbKFUyF8XR9iFfOXNZqZAwER3R+V Wcop9Xww3uSekXr4eOzbdFMu13JSnJH0m52fLQRBmdllpjE31sc8QiFWMGFsfGnm CkGwdKeDykSqmKbyKwC67iqsADPehxK2s3NyBn/xF5p7kOYBYX5GZZW7HpK2mjsG M7BrWyStaVeCLONO4kL/4hYT2I2vS84m1cQaYs0DJ0Y1NeCMLl0DICapM1VSoaI2 fcvi99Fwr5nuOtq5i6vfKM3ipPFoJs/Ckti6nLUigGw7UoLw84CGPrtj0x908g4A bUN/9rvtfcsiCTwPNLLN/hPJgVjJf6CRVoShBqbsbuUcANcuMAqh2dgmgeeG4NSm 8K7BNB530K9kGXtpYscT =Hzcf -----END PGP SIGNATURE-----