tag name | pull-target-arm-20180518 (634379c99c8a67eefc88caa9f548fc822c3f8488) |
tag date | 2018-05-18 18:16:24 +0100 |
tagged by | Peter Maydell <peter.maydell@linaro.org> |
tagged object | commit b94f8f60bd... |
target-arm queue:
* Initial part of SVE implementation (currently disabled)
* smmuv3: fix some minor Coverity issues
* add model of Xilinx ZynqMP generic DMA controller
* expose (most) Arm coprocessor/system registers to
gdb via QEMU's gdbstub, for reads only
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJa/wrjAAoJEDwlJe0UNgze6AEP/3085xwQ/D2nKWkOKKDU7gWe
4kGjQjKsfR3DheDrgGu45KEn+gx/M9dlOrzDKYAwWIgj6m377cKN6PfO1gMsDpqs
aPIVLNvDqPn2bQrGjoIT/uAEv20N3ed94rwc5Q7sG513FCar/oKskCceK91NF++V
TxlbDzT5bAKFASecgZ6WZ+gdWZdvAdhGkRZdtXVWGAeRPiFT+RiAURCa3rwLiCE3
IRXRYB5MM5WBBZTKvRjo39aOKDkFBk7VzUJ5R7HAK4eueJSxrRdL8H2v//xHxTmq
F2g245B+X0Xrb/sqF/Zp7qvAfzVzcBYCybB2srKgkA9fbP9MHOnijefSWoimiCB2
+1/Gcfkt8u8aOxZ6c6z65fXOCiAAq6S1wwJBNLvg6G0otVBT+MRqYmVqNIzRVmdp
+Jn7+Tw5jkoD9xIvcickf0vr6qHQ8bEOdyB/SSitr83yaz8oz+QTfhmWbNNF0Zf1
LvkSMjSKVNmAuFFHxpNgoxXPS9l5loihAszlfjby9h76jb+3hutS2V1q1/dSSEVC
AxZZ/beYBQvmkHCU8g0RbuIokLe2QzrYAo38lME81Jr+Pz6jmM1nYBM3FOnfaqse
BdP3NMBapMcmBlOT3R2KTNv4Nwr4ZoR2N1Ovg4WQpP3hfbGvinJUE2wSQRez5lfw
eREJNMPfV7bDJMzFEmRQ
=wHTh
-----END PGP SIGNATURE-----