From 34f5606ee101f82a247d09d05644ad2a63c8e342 Mon Sep 17 00:00:00 2001 From: Petar Jovanovic Date: Mon, 26 Nov 2012 16:13:21 +0100 Subject: target-mips: Fix incorrect code and test for INSV Content of register rs should be shifted for pos before applying a mask. This change contains both fix for the instruction and to the existing test. Signed-off-by: Petar Jovanovic Reviewed-by: Eric Johnson Signed-off-by: Aurelien Jarno --- tests/tcg/mips/mips32-dsp/insv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tests/tcg') diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32-dsp/insv.c index 7e3b047606..243b00733d 100644 --- a/tests/tcg/mips/mips32-dsp/insv.c +++ b/tests/tcg/mips/mips32-dsp/insv.c @@ -10,7 +10,7 @@ int main() dsp = 0x305; rt = 0x12345678; rs = 0x87654321; - result = 0x12345338; + result = 0x12345438; __asm ("wrdsp %2, 0x03\n\t" "insv %0, %1\n\t" -- cgit v1.2.3