From 8d625cf1d159b313daefec13abc637c3e8862bd5 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 19 Mar 2010 13:02:02 -0700 Subject: tcg: Allow target-specific implementation of EQV. Signed-off-by: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/README | 2 +- tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 1 + tcg/mips/tcg-target.h | 1 + tcg/ppc/tcg-target.h | 1 + tcg/ppc64/tcg-target.h | 2 ++ tcg/s390/tcg-target.h | 2 ++ tcg/sparc/tcg-target.h | 2 ++ tcg/tcg-op.h | 11 +++++++++++ tcg/tcg-opc.h | 6 ++++++ tcg/x86_64/tcg-target.h | 2 ++ 11 files changed, 30 insertions(+), 1 deletion(-) (limited to 'tcg') diff --git a/tcg/README b/tcg/README index 281c1143f3..fe8c3d5d8f 100644 --- a/tcg/README +++ b/tcg/README @@ -213,7 +213,7 @@ t0=t1&~t2 * eqv_i32/i64 t0, t1, t2 -t0=~(t1^t2) +t0=~(t1^t2), or equivalently, t0=t1^~t2 * nand_i32/i64 t0, t1, t2 diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 7242be8823..cfcd4af4a7 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -67,6 +67,7 @@ enum { // #define TCG_TARGET_HAS_rot_i32 #define TCG_TARGET_HAS_andc_i32 // #define TCG_TARGET_HAS_orc_i32 +// #define TCG_TARGET_HAS_eqv_i32 #define TCG_TARGET_HAS_GUEST_BASE diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 7bb765e39c..83e004b620 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -57,6 +57,7 @@ enum { #define TCG_TARGET_HAS_not_i32 // #define TCG_TARGET_HAS_andc_i32 // #define TCG_TARGET_HAS_orc_i32 +// #define TCG_TARGET_HAS_eqv_i32 #define TCG_TARGET_HAS_GUEST_BASE diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 6b7741cfb9..00f89f473b 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -87,6 +87,7 @@ enum { #undef TCG_TARGET_HAS_bswap16_i32 #undef TCG_TARGET_HAS_andc_i32 #undef TCG_TARGET_HAS_orc_i32 +#undef TCG_TARGET_HAS_eqv_i32 /* optional instructions automatically implemented */ #undef TCG_TARGET_HAS_neg_i32 /* sub rd, zero, rt */ diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 5cae81f0ff..d0c4761347 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -89,6 +89,7 @@ enum { #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_andc_i32 #define TCG_TARGET_HAS_orc_i32 +/* #define TCG_TARGET_HAS_eqv_i32 */ #define TCG_AREG0 TCG_REG_R27 diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index e3677519a6..11096c5163 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -80,6 +80,7 @@ enum { #define TCG_TARGET_HAS_neg_i32 /* #define TCG_TARGET_HAS_andc_i32 */ /* #define TCG_TARGET_HAS_orc_i32 */ +/* #define TCG_TARGET_HAS_eqv_i32 */ #define TCG_TARGET_HAS_div_i64 /* #define TCG_TARGET_HAS_rot_i64 */ @@ -96,6 +97,7 @@ enum { #define TCG_TARGET_HAS_neg_i64 /* #define TCG_TARGET_HAS_andc_i64 */ /* #define TCG_TARGET_HAS_orc_i64 */ +/* #define TCG_TARGET_HAS_eqv_i64 */ #define TCG_AREG0 TCG_REG_R27 diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 82e2be7c37..2d10e73b81 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -59,6 +59,7 @@ enum { // #define TCG_TARGET_HAS_neg_i32 // #define TCG_TARGET_HAS_andc_i32 // #define TCG_TARGET_HAS_orc_i32 +// #define TCG_TARGET_HAS_eqv_i32 // #define TCG_TARGET_HAS_div_i64 // #define TCG_TARGET_HAS_rot_i64 @@ -75,6 +76,7 @@ enum { // #define TCG_TARGET_HAS_neg_i64 // #define TCG_TARGET_HAS_andc_i64 // #define TCG_TARGET_HAS_orc_i64 +// #define TCG_TARGET_HAS_eqv_i64 /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_R15 diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index c27c284efd..aabdd9dc50 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -100,6 +100,7 @@ enum { #define TCG_TARGET_HAS_not_i32 #define TCG_TARGET_HAS_andc_i32 #define TCG_TARGET_HAS_orc_i32 +// #define TCG_TARGET_HAS_eqv_i32 #if TCG_TARGET_REG_BITS == 64 #define TCG_TARGET_HAS_div_i64 @@ -117,6 +118,7 @@ enum { #define TCG_TARGET_HAS_not_i64 #define TCG_TARGET_HAS_andc_i64 #define TCG_TARGET_HAS_orc_i64 +// #define TCG_TARGET_HAS_eqv_i64 #endif /* Note: must be synced with dyngen-exec.h */ diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index f15c80351b..b535406363 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -1740,14 +1740,25 @@ static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { +#ifdef TCG_TARGET_HAS_eqv_i32 + tcg_gen_op3_i32(INDEX_op_eqv_i32, ret, arg1, arg2); +#else tcg_gen_xor_i32(ret, arg1, arg2); tcg_gen_not_i32(ret, ret); +#endif } static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { +#ifdef TCG_TARGET_HAS_eqv_i64 + tcg_gen_op3_i64(INDEX_op_eqv_i64, ret, arg1, arg2); +#elif defined(TCG_TARGET_HAS_eqv_i32) && TCG_TARGET_REG_BITS == 32 + tcg_gen_eqv_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); + tcg_gen_eqv_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); +#else tcg_gen_xor_i64(ret, arg1, arg2); tcg_gen_not_i64(ret, ret); +#endif } static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 441e51f5c9..8c34a83d27 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -116,6 +116,9 @@ DEF2(andc_i32, 1, 2, 0, 0) #ifdef TCG_TARGET_HAS_orc_i32 DEF2(orc_i32, 1, 2, 0, 0) #endif +#ifdef TCG_TARGET_HAS_eqv_i32 +DEF2(eqv_i32, 1, 2, 0, 0) +#endif #if TCG_TARGET_REG_BITS == 64 DEF2(mov_i64, 1, 1, 0, 0) @@ -199,6 +202,9 @@ DEF2(andc_i64, 1, 2, 0, 0) #ifdef TCG_TARGET_HAS_orc_i64 DEF2(orc_i64, 1, 2, 0, 0) #endif +#ifdef TCG_TARGET_HAS_eqv_i64 +DEF2(eqv_i64, 1, 2, 0, 0) +#endif #endif /* QEMU specific */ diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h index 02448b5d84..2225faa625 100644 --- a/tcg/x86_64/tcg-target.h +++ b/tcg/x86_64/tcg-target.h @@ -84,6 +84,8 @@ enum { // #define TCG_TARGET_HAS_andc_i64 // #define TCG_TARGET_HAS_orc_i32 // #define TCG_TARGET_HAS_orc_i64 +// #define TCG_TARGET_HAS_eqv_i32 +// #define TCG_TARGET_HAS_eqv_i64 #define TCG_TARGET_HAS_GUEST_BASE -- cgit v1.2.3