From 5f2a6254522bd4cfb917822f678b117e6f005664 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Wed, 27 Jul 2016 16:56:46 +1000 Subject: ppc: Don't set access_type on all load/stores on hash64 We don't use it so let's not generate the updates. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: David Gibson --- target-ppc/translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'target-ppc') diff --git a/target-ppc/translate.c b/target-ppc/translate.c index bc5b2ee97f..59864356b1 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -195,6 +195,7 @@ struct DisasContext { /* Routine used to access memory */ bool pr, hv, dr, le_mode; bool lazy_tlb_flush; + bool need_access_type; int mem_idx; int access_type; /* Translation flags */ @@ -252,7 +253,7 @@ struct opc_handler_t { static inline void gen_set_access_type(DisasContext *ctx, int access_type) { - if (ctx->access_type != access_type) { + if (ctx->need_access_type && ctx->access_type != access_type) { tcg_gen_movi_i32(cpu_access_type, access_type); ctx->access_type = access_type; } @@ -6927,6 +6928,7 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb) ctx.insns_flags = env->insns_flags; ctx.insns_flags2 = env->insns_flags2; ctx.access_type = -1; + ctx.need_access_type = !(env->mmu_model & POWERPC_MMU_64B); ctx.le_mode = !!(env->hflags & (1 << MSR_LE)); ctx.default_tcg_memop_mask = ctx.le_mode ? MO_LE : MO_BE; #if defined(TARGET_PPC64) -- cgit v1.2.3