From 2308092b2b78e6e083092bd3599cec6a0769319e Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Thu, 26 Apr 2018 11:15:24 -0700 Subject: hw/riscv/sifive_u: Create a SiFive U SoC object Create a SiFive Unleashed U54 SoC and use that in the sifive_u machine. We leave the SoC, RAM, device tree and reset/fdt loading as part of the machine. All the other device creation has been moved to the SoC. Signed-off-by: Alistair Francis Reviewed-by: Michael Clark --- include/hw/riscv/sifive_u.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 94a390566e..49f1946539 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -19,13 +19,25 @@ #ifndef HW_SIFIVE_U_H #define HW_SIFIVE_U_H -typedef struct SiFiveUState { +#define TYPE_RISCV_U_SOC "riscv.sifive.u.soc" +#define RISCV_U_SOC(obj) \ + OBJECT_CHECK(SiFiveUSoCState, (obj), TYPE_RISCV_U_SOC) + +typedef struct SiFiveUSoCState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ - RISCVHartArrayState soc; + RISCVHartArrayState cpus; DeviceState *plic; +} SiFiveUSoCState; + +typedef struct SiFiveUState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + SiFiveUSoCState soc; void *fdt; int fdt_size; } SiFiveUState; -- cgit v1.2.3