From 04509ad939a7878b487b29e3500b79b5e2c1de35 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 23 Oct 2012 19:44:02 -0200 Subject: qemu-common.h: Comment about usage rules MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Every time we make a tiny change on a header file, we often find circular header dependency problems. To avoid this nightmare, we need to stop including qemu-common.h from other headers, and we should gradually move the declarations from the catch-all qemu-common.h header to their specific headers. This simply adds a comment documenting the rules about qemu-common.h, hoping that people will see it before including qemu-common.h from other header files, and before adding more declarations to qemu-common.h. Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- qemu-common.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/qemu-common.h b/qemu-common.h index ac9985cc6d..093d1198ec 100644 --- a/qemu-common.h +++ b/qemu-common.h @@ -1,5 +1,14 @@ -/* Common header file that is included by all of qemu. */ +/* Common header file that is included by all of QEMU. + * + * This file is supposed to be included only by .c files. No header file should + * depend on qemu-common.h, as this would easily lead to circular header + * dependencies. + * + * If a header file uses a definition from qemu-common.h, that definition + * must be moved to a separate header file, and the header that uses it + * must include that header. + */ #ifndef QEMU_COMMON_H #define QEMU_COMMON_H -- cgit v1.2.3 From 5202ef942fb986011a31d9366fbf93a56f0056e4 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Tue, 16 Oct 2012 03:57:21 +0200 Subject: Move qemu_irq typedef out of qemu-common.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's necessary for making CPU child of DEVICE without causing circular header deps. Signed-off-by: Igor Mammedov [ehabkost: re-added the typedef to hw/irq.h after rebasing] Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- hw/arm-misc.h | 1 + hw/bt.h | 2 ++ hw/devices.h | 2 ++ hw/irq.h | 2 ++ hw/omap.h | 1 + hw/soc_dma.h | 1 + hw/xen.h | 1 + qemu-common.h | 1 - 8 files changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/arm-misc.h b/hw/arm-misc.h index adb166586b..d129678b26 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -12,6 +12,7 @@ #define ARM_MISC_H 1 #include "memory.h" +#include "hw/irq.h" /* The CPU is also modeled as an interrupt controller. */ #define ARM_PIC_CPU_IRQ 0 diff --git a/hw/bt.h b/hw/bt.h index a48b8d4b13..ebf6a370a1 100644 --- a/hw/bt.h +++ b/hw/bt.h @@ -23,6 +23,8 @@ * along with this program; if not, see . */ +#include "hw/irq.h" + /* BD Address */ typedef struct { uint8_t b[6]; diff --git a/hw/devices.h b/hw/devices.h index 1a55c1e905..c60bcabae3 100644 --- a/hw/devices.h +++ b/hw/devices.h @@ -1,6 +1,8 @@ #ifndef QEMU_DEVICES_H #define QEMU_DEVICES_H +#include "hw/irq.h" + /* ??? Not all users of this file can include cpu-common.h. */ struct MemoryRegion; diff --git a/hw/irq.h b/hw/irq.h index e640c105e7..610e6b7623 100644 --- a/hw/irq.h +++ b/hw/irq.h @@ -3,6 +3,8 @@ /* Generic IRQ/GPIO pin infrastructure. */ +typedef struct IRQState *qemu_irq; + typedef void (*qemu_irq_handler)(void *opaque, int n, int level); void qemu_set_irq(qemu_irq irq, int level); diff --git a/hw/omap.h b/hw/omap.h index 8bd7c73cf6..2b383ffc44 100644 --- a/hw/omap.h +++ b/hw/omap.h @@ -19,6 +19,7 @@ #ifndef hw_omap_h #include "memory.h" # define hw_omap_h "omap.h" +#include "hw/irq.h" # define OMAP_EMIFS_BASE 0x00000000 # define OMAP2_Q0_BASE 0x00000000 diff --git a/hw/soc_dma.h b/hw/soc_dma.h index 9340b8f38e..5948489eae 100644 --- a/hw/soc_dma.h +++ b/hw/soc_dma.h @@ -19,6 +19,7 @@ */ #include "memory.h" +#include "hw/irq.h" struct soc_dma_s; struct soc_dma_ch_s; diff --git a/hw/xen.h b/hw/xen.h index d14e92d5aa..e3cca7fb92 100644 --- a/hw/xen.h +++ b/hw/xen.h @@ -8,6 +8,7 @@ */ #include +#include "hw/irq.h" #include "qemu-common.h" /* xen-machine.c */ diff --git a/qemu-common.h b/qemu-common.h index 093d1198ec..9112e2de7a 100644 --- a/qemu-common.h +++ b/qemu-common.h @@ -292,7 +292,6 @@ typedef struct PCIEPort PCIEPort; typedef struct PCIESlot PCIESlot; typedef struct MSIMessage MSIMessage; typedef struct SerialState SerialState; -typedef struct IRQState *qemu_irq; typedef struct PCMCIACardState PCMCIACardState; typedef struct MouseTransformInfo MouseTransformInfo; typedef struct uWireSlave uWireSlave; -- cgit v1.2.3 From 074a86fccd185616469dfcdc0e157f438aebba18 Mon Sep 17 00:00:00 2001 From: Anthony Liguori Date: Fri, 10 Aug 2012 12:00:43 -0500 Subject: qdev: Split up header so it can be used in cpu.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Header file dependency is a frickin' nightmare right now. cpu.h tends to get included in our 'include everything' header files but qdev also needs to include those headers mainly for qdev-properties since it knows about CharDriverState and friends. We can solve this for now by splitting out qdev.h along the same lines that we previously split the C file. Then cpu.h just needs to include qdev-core.h. hw/qdev.h is split into following new headers: hw/qdev-core.h hw/qdev-properties.h hw/qdev-monitor.h Signed-off-by: Anthony Liguori [ehabkost: re-add DEFINE_PROP_PCI_HOST_DEVADDR, that was removed on the original patch (by mistake, I guess)] [ehabkost: kill qdev_prop_set_vlan() declaration] [ehabkost: moved get_fw_dev_path() comment to the original location (I don't know why it was moved)] [ehabkost: removed qdev_exists() declaration] [ehabkost: keep using 'QemuOpts' instead of 'struct QemuOpts', as qdev-core.h includes qemu-option.h] Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- hw/mc146818rtc.c | 1 + hw/qdev-addr.c | 1 + hw/qdev-core.h | 238 +++++++++++++++++++++++++++++++++ hw/qdev-monitor.h | 16 +++ hw/qdev-properties.c | 1 + hw/qdev-properties.h | 130 ++++++++++++++++++ hw/qdev.c | 1 + hw/qdev.h | 370 +-------------------------------------------------- 8 files changed, 392 insertions(+), 366 deletions(-) create mode 100644 hw/qdev-core.h create mode 100644 hw/qdev-monitor.h create mode 100644 hw/qdev-properties.h diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index 98839f278d..7d84ce3d74 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -25,6 +25,7 @@ #include "qemu-timer.h" #include "sysemu.h" #include "mc146818rtc.h" +#include "qapi/qapi-visit-core.h" #ifdef TARGET_I386 #include "apic.h" diff --git a/hw/qdev-addr.c b/hw/qdev-addr.c index de0ba8726e..ea32c31ab6 100644 --- a/hw/qdev-addr.c +++ b/hw/qdev-addr.c @@ -1,6 +1,7 @@ #include "qdev.h" #include "qdev-addr.h" #include "hwaddr.h" +#include "qapi/qapi-visit-core.h" /* --- target physical address --- */ diff --git a/hw/qdev-core.h b/hw/qdev-core.h new file mode 100644 index 0000000000..fce9e2249c --- /dev/null +++ b/hw/qdev-core.h @@ -0,0 +1,238 @@ +#ifndef QDEV_CORE_H +#define QDEV_CORE_H + +#include "qemu-queue.h" +#include "qemu-option.h" +#include "qemu/object.h" +#include "hw/irq.h" +#include "error.h" + +typedef struct Property Property; + +typedef struct PropertyInfo PropertyInfo; + +typedef struct CompatProperty CompatProperty; + +typedef struct BusState BusState; + +typedef struct BusClass BusClass; + +enum DevState { + DEV_STATE_CREATED = 1, + DEV_STATE_INITIALIZED, +}; + +enum { + DEV_NVECTORS_UNSPECIFIED = -1, +}; + +#define TYPE_DEVICE "device" +#define DEVICE(obj) OBJECT_CHECK(DeviceState, (obj), TYPE_DEVICE) +#define DEVICE_CLASS(klass) OBJECT_CLASS_CHECK(DeviceClass, (klass), TYPE_DEVICE) +#define DEVICE_GET_CLASS(obj) OBJECT_GET_CLASS(DeviceClass, (obj), TYPE_DEVICE) + +typedef int (*qdev_initfn)(DeviceState *dev); +typedef int (*qdev_event)(DeviceState *dev); +typedef void (*qdev_resetfn)(DeviceState *dev); + +struct VMStateDescription; + +typedef struct DeviceClass { + ObjectClass parent_class; + + const char *fw_name; + const char *desc; + Property *props; + int no_user; + + /* callbacks */ + void (*reset)(DeviceState *dev); + + /* device state */ + const struct VMStateDescription *vmsd; + + /* Private to qdev / bus. */ + qdev_initfn init; + qdev_event unplug; + qdev_event exit; + const char *bus_type; +} DeviceClass; + +/* This structure should not be accessed directly. We declare it here + so that it can be embedded in individual device state structures. */ +struct DeviceState { + Object parent_obj; + + const char *id; + enum DevState state; + QemuOpts *opts; + int hotplugged; + BusState *parent_bus; + int num_gpio_out; + qemu_irq *gpio_out; + int num_gpio_in; + qemu_irq *gpio_in; + QLIST_HEAD(, BusState) child_bus; + int num_child_bus; + int instance_id_alias; + int alias_required_for_version; +}; + +#define TYPE_BUS "bus" +#define BUS(obj) OBJECT_CHECK(BusState, (obj), TYPE_BUS) +#define BUS_CLASS(klass) OBJECT_CLASS_CHECK(BusClass, (klass), TYPE_BUS) +#define BUS_GET_CLASS(obj) OBJECT_GET_CLASS(BusClass, (obj), TYPE_BUS) + +struct BusClass { + ObjectClass parent_class; + + /* FIXME first arg should be BusState */ + void (*print_dev)(Monitor *mon, DeviceState *dev, int indent); + char *(*get_dev_path)(DeviceState *dev); + /* + * This callback is used to create Open Firmware device path in accordance + * with OF spec http://forthworks.com/standards/of1275.pdf. Individual bus + * bindings can be found at http://playground.sun.com/1275/bindings/. + */ + char *(*get_fw_dev_path)(DeviceState *dev); + int (*reset)(BusState *bus); +}; + +typedef struct BusChild { + DeviceState *child; + int index; + QTAILQ_ENTRY(BusChild) sibling; +} BusChild; + +/** + * BusState: + * @qom_allocated: Indicates whether the object was allocated by QOM. + * @glib_allocated: Indicates whether the object was initialized in-place + * yet is expected to be freed with g_free(). + */ +struct BusState { + Object obj; + DeviceState *parent; + const char *name; + int allow_hotplug; + bool qom_allocated; + bool glib_allocated; + int max_index; + QTAILQ_HEAD(ChildrenHead, BusChild) children; + QLIST_ENTRY(BusState) sibling; +}; + +struct Property { + const char *name; + PropertyInfo *info; + int offset; + uint8_t bitnr; + uint8_t qtype; + int64_t defval; +}; + +struct PropertyInfo { + const char *name; + const char *legacy_name; + const char **enum_table; + int (*parse)(DeviceState *dev, Property *prop, const char *str); + int (*print)(DeviceState *dev, Property *prop, char *dest, size_t len); + ObjectPropertyAccessor *get; + ObjectPropertyAccessor *set; + ObjectPropertyRelease *release; +}; + +typedef struct GlobalProperty { + const char *driver; + const char *property; + const char *value; + QTAILQ_ENTRY(GlobalProperty) next; +} GlobalProperty; + +/*** Board API. This should go away once we have a machine config file. ***/ + +DeviceState *qdev_create(BusState *bus, const char *name); +DeviceState *qdev_try_create(BusState *bus, const char *name); +int qdev_init(DeviceState *dev) QEMU_WARN_UNUSED_RESULT; +void qdev_init_nofail(DeviceState *dev); +void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, + int required_for_version); +void qdev_unplug(DeviceState *dev, Error **errp); +void qdev_free(DeviceState *dev); +int qdev_simple_unplug_cb(DeviceState *dev); +void qdev_machine_creation_done(void); +bool qdev_machine_modified(void); + +qemu_irq qdev_get_gpio_in(DeviceState *dev, int n); +void qdev_connect_gpio_out(DeviceState *dev, int n, qemu_irq pin); + +BusState *qdev_get_child_bus(DeviceState *dev, const char *name); + +/*** Device API. ***/ + +/* Register device properties. */ +/* GPIO inputs also double as IRQ sinks. */ +void qdev_init_gpio_in(DeviceState *dev, qemu_irq_handler handler, int n); +void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n); + +BusState *qdev_get_parent_bus(DeviceState *dev); + +/*** BUS API. ***/ + +DeviceState *qdev_find_recursive(BusState *bus, const char *id); + +/* Returns 0 to walk children, > 0 to skip walk, < 0 to terminate walk. */ +typedef int (qbus_walkerfn)(BusState *bus, void *opaque); +typedef int (qdev_walkerfn)(DeviceState *dev, void *opaque); + +void qbus_create_inplace(BusState *bus, const char *typename, + DeviceState *parent, const char *name); +BusState *qbus_create(const char *typename, DeviceState *parent, const char *name); +/* Returns > 0 if either devfn or busfn skip walk somewhere in cursion, + * < 0 if either devfn or busfn terminate walk somewhere in cursion, + * 0 otherwise. */ +int qbus_walk_children(BusState *bus, qdev_walkerfn *devfn, + qbus_walkerfn *busfn, void *opaque); +int qdev_walk_children(DeviceState *dev, qdev_walkerfn *devfn, + qbus_walkerfn *busfn, void *opaque); +void qdev_reset_all(DeviceState *dev); +void qbus_reset_all_fn(void *opaque); + +void qbus_free(BusState *bus); + +#define FROM_QBUS(type, dev) DO_UPCAST(type, qbus, dev) + +/* This should go away once we get rid of the NULL bus hack */ +BusState *sysbus_get_default(void); + +char *qdev_get_fw_dev_path(DeviceState *dev); + +/** + * @qdev_machine_init + * + * Initialize platform devices before machine init. This is a hack until full + * support for composition is added. + */ +void qdev_machine_init(void); + +/** + * @device_reset + * + * Reset a single device (by calling the reset method). + */ +void device_reset(DeviceState *dev); + +const struct VMStateDescription *qdev_get_vmsd(DeviceState *dev); + +const char *qdev_fw_name(DeviceState *dev); + +Object *qdev_get_machine(void); + +/* FIXME: make this a link<> */ +void qdev_set_parent_bus(DeviceState *dev, BusState *bus); + +extern int qdev_hotplug; + +char *qdev_get_dev_path(DeviceState *dev); + +#endif diff --git a/hw/qdev-monitor.h b/hw/qdev-monitor.h new file mode 100644 index 0000000000..220ceba4c5 --- /dev/null +++ b/hw/qdev-monitor.h @@ -0,0 +1,16 @@ +#ifndef QEMU_QDEV_MONITOR_H +#define QEMU_QDEV_MONITOR_H + +#include "qdev-core.h" +#include "monitor.h" + +/*** monitor commands ***/ + +void do_info_qtree(Monitor *mon); +void do_info_qdm(Monitor *mon); +int do_device_add(Monitor *mon, const QDict *qdict, QObject **ret_data); +int do_device_del(Monitor *mon, const QDict *qdict, QObject **ret_data); +int qdev_device_help(QemuOpts *opts); +DeviceState *qdev_device_add(QemuOpts *opts); + +#endif diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c index 8aca0d43fe..81d901c6c4 100644 --- a/hw/qdev-properties.c +++ b/hw/qdev-properties.c @@ -4,6 +4,7 @@ #include "blockdev.h" #include "hw/block-common.h" #include "net/hub.h" +#include "qapi/qapi-visit-core.h" void *qdev_get_prop_ptr(DeviceState *dev, Property *prop) { diff --git a/hw/qdev-properties.h b/hw/qdev-properties.h new file mode 100644 index 0000000000..5b046abb28 --- /dev/null +++ b/hw/qdev-properties.h @@ -0,0 +1,130 @@ +#ifndef QEMU_QDEV_PROPERTIES_H +#define QEMU_QDEV_PROPERTIES_H + +#include "qdev-core.h" + +/*** qdev-properties.c ***/ + +extern PropertyInfo qdev_prop_bit; +extern PropertyInfo qdev_prop_uint8; +extern PropertyInfo qdev_prop_uint16; +extern PropertyInfo qdev_prop_uint32; +extern PropertyInfo qdev_prop_int32; +extern PropertyInfo qdev_prop_uint64; +extern PropertyInfo qdev_prop_hex8; +extern PropertyInfo qdev_prop_hex32; +extern PropertyInfo qdev_prop_hex64; +extern PropertyInfo qdev_prop_string; +extern PropertyInfo qdev_prop_chr; +extern PropertyInfo qdev_prop_ptr; +extern PropertyInfo qdev_prop_macaddr; +extern PropertyInfo qdev_prop_losttickpolicy; +extern PropertyInfo qdev_prop_bios_chs_trans; +extern PropertyInfo qdev_prop_drive; +extern PropertyInfo qdev_prop_netdev; +extern PropertyInfo qdev_prop_vlan; +extern PropertyInfo qdev_prop_pci_devfn; +extern PropertyInfo qdev_prop_blocksize; +extern PropertyInfo qdev_prop_pci_host_devaddr; + +#define DEFINE_PROP(_name, _state, _field, _prop, _type) { \ + .name = (_name), \ + .info = &(_prop), \ + .offset = offsetof(_state, _field) \ + + type_check(_type,typeof_field(_state, _field)), \ + } +#define DEFINE_PROP_DEFAULT(_name, _state, _field, _defval, _prop, _type) { \ + .name = (_name), \ + .info = &(_prop), \ + .offset = offsetof(_state, _field) \ + + type_check(_type,typeof_field(_state, _field)), \ + .qtype = QTYPE_QINT, \ + .defval = (_type)_defval, \ + } +#define DEFINE_PROP_BIT(_name, _state, _field, _bit, _defval) { \ + .name = (_name), \ + .info = &(qdev_prop_bit), \ + .bitnr = (_bit), \ + .offset = offsetof(_state, _field) \ + + type_check(uint32_t,typeof_field(_state, _field)), \ + .qtype = QTYPE_QBOOL, \ + .defval = (bool)_defval, \ + } + +#define DEFINE_PROP_UINT8(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint8, uint8_t) +#define DEFINE_PROP_UINT16(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint16, uint16_t) +#define DEFINE_PROP_UINT32(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint32, uint32_t) +#define DEFINE_PROP_INT32(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_int32, int32_t) +#define DEFINE_PROP_UINT64(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint64, uint64_t) +#define DEFINE_PROP_HEX8(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex8, uint8_t) +#define DEFINE_PROP_HEX32(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex32, uint32_t) +#define DEFINE_PROP_HEX64(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex64, uint64_t) +#define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t) + +#define DEFINE_PROP_PTR(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_ptr, void*) +#define DEFINE_PROP_CHR(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_chr, CharDriverState*) +#define DEFINE_PROP_STRING(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_string, char*) +#define DEFINE_PROP_NETDEV(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_netdev, NetClientState*) +#define DEFINE_PROP_VLAN(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_vlan, NetClientState*) +#define DEFINE_PROP_DRIVE(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_drive, BlockDriverState *) +#define DEFINE_PROP_MACADDR(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_macaddr, MACAddr) +#define DEFINE_PROP_LOSTTICKPOLICY(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_losttickpolicy, \ + LostTickPolicy) +#define DEFINE_PROP_BIOS_CHS_TRANS(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_bios_chs_trans, int) +#define DEFINE_PROP_BLOCKSIZE(_n, _s, _f, _d) \ + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_blocksize, uint16_t) +#define DEFINE_PROP_PCI_HOST_DEVADDR(_n, _s, _f) \ + DEFINE_PROP(_n, _s, _f, qdev_prop_pci_host_devaddr, PCIHostDeviceAddress) + +#define DEFINE_PROP_END_OF_LIST() \ + {} + +/* Set properties between creation and init. */ +void *qdev_get_prop_ptr(DeviceState *dev, Property *prop); +int qdev_prop_parse(DeviceState *dev, const char *name, const char *value); +void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value); +void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value); +void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value); +void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value); +void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value); +void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value); +void qdev_prop_set_string(DeviceState *dev, const char *name, const char *value); +void qdev_prop_set_chr(DeviceState *dev, const char *name, CharDriverState *value); +void qdev_prop_set_netdev(DeviceState *dev, const char *name, NetClientState *value); +int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState *value) QEMU_WARN_UNUSED_RESULT; +void qdev_prop_set_drive_nofail(DeviceState *dev, const char *name, BlockDriverState *value); +void qdev_prop_set_macaddr(DeviceState *dev, const char *name, uint8_t *value); +void qdev_prop_set_enum(DeviceState *dev, const char *name, int value); +/* FIXME: Remove opaque pointer properties. */ +void qdev_prop_set_ptr(DeviceState *dev, const char *name, void *value); + +void qdev_prop_register_global_list(GlobalProperty *props); +void qdev_prop_set_globals(DeviceState *dev); +void error_set_from_qdev_prop_error(Error **errp, int ret, DeviceState *dev, + Property *prop, const char *value); + +/** + * @qdev_property_add_static - add a @Property to a device referencing a + * field in a struct. + */ +void qdev_property_add_static(DeviceState *dev, Property *prop, Error **errp); + +#endif diff --git a/hw/qdev.c b/hw/qdev.c index 9b9aba376b..7ddcd24299 100644 --- a/hw/qdev.c +++ b/hw/qdev.c @@ -29,6 +29,7 @@ #include "qdev.h" #include "sysemu.h" #include "error.h" +#include "qapi/qapi-visit-core.h" int qdev_hotplug = 0; static bool qdev_hot_added = false; diff --git a/hw/qdev.h b/hw/qdev.h index c6ac636200..365b8d6ca2 100644 --- a/hw/qdev.h +++ b/hw/qdev.h @@ -1,371 +1,9 @@ #ifndef QDEV_H #define QDEV_H -#include "hw.h" -#include "qemu-queue.h" -#include "qemu-char.h" -#include "qemu-option.h" -#include "qapi/qapi-visit-core.h" -#include "qemu/object.h" -#include "error.h" - -typedef struct Property Property; - -typedef struct PropertyInfo PropertyInfo; - -typedef struct CompatProperty CompatProperty; - -typedef struct BusState BusState; - -typedef struct BusClass BusClass; - -enum DevState { - DEV_STATE_CREATED = 1, - DEV_STATE_INITIALIZED, -}; - -enum { - DEV_NVECTORS_UNSPECIFIED = -1, -}; - -#define TYPE_DEVICE "device" -#define DEVICE(obj) OBJECT_CHECK(DeviceState, (obj), TYPE_DEVICE) -#define DEVICE_CLASS(klass) OBJECT_CLASS_CHECK(DeviceClass, (klass), TYPE_DEVICE) -#define DEVICE_GET_CLASS(obj) OBJECT_GET_CLASS(DeviceClass, (obj), TYPE_DEVICE) - -typedef int (*qdev_initfn)(DeviceState *dev); -typedef int (*qdev_event)(DeviceState *dev); -typedef void (*qdev_resetfn)(DeviceState *dev); - -typedef struct DeviceClass { - ObjectClass parent_class; - - const char *fw_name; - const char *desc; - Property *props; - int no_user; - - /* callbacks */ - void (*reset)(DeviceState *dev); - - /* device state */ - const VMStateDescription *vmsd; - - /* Private to qdev / bus. */ - qdev_initfn init; - qdev_event unplug; - qdev_event exit; - const char *bus_type; -} DeviceClass; - -/* This structure should not be accessed directly. We declare it here - so that it can be embedded in individual device state structures. */ -struct DeviceState { - Object parent_obj; - - const char *id; - enum DevState state; - QemuOpts *opts; - int hotplugged; - BusState *parent_bus; - int num_gpio_out; - qemu_irq *gpio_out; - int num_gpio_in; - qemu_irq *gpio_in; - QLIST_HEAD(, BusState) child_bus; - int num_child_bus; - int instance_id_alias; - int alias_required_for_version; -}; - -#define TYPE_BUS "bus" -#define BUS(obj) OBJECT_CHECK(BusState, (obj), TYPE_BUS) -#define BUS_CLASS(klass) OBJECT_CLASS_CHECK(BusClass, (klass), TYPE_BUS) -#define BUS_GET_CLASS(obj) OBJECT_GET_CLASS(BusClass, (obj), TYPE_BUS) - -struct BusClass { - ObjectClass parent_class; - - /* FIXME first arg should be BusState */ - void (*print_dev)(Monitor *mon, DeviceState *dev, int indent); - char *(*get_dev_path)(DeviceState *dev); - /* - * This callback is used to create Open Firmware device path in accordance - * with OF spec http://forthworks.com/standards/of1275.pdf. Individual bus - * bindings can be found at http://playground.sun.com/1275/bindings/. - */ - char *(*get_fw_dev_path)(DeviceState *dev); - int (*reset)(BusState *bus); -}; - -typedef struct BusChild { - DeviceState *child; - int index; - QTAILQ_ENTRY(BusChild) sibling; -} BusChild; - -/** - * BusState: - * @qom_allocated: Indicates whether the object was allocated by QOM. - * @glib_allocated: Indicates whether the object was initialized in-place - * yet is expected to be freed with g_free(). - */ -struct BusState { - Object obj; - DeviceState *parent; - const char *name; - int allow_hotplug; - bool qom_allocated; - bool glib_allocated; - int max_index; - QTAILQ_HEAD(ChildrenHead, BusChild) children; - QLIST_ENTRY(BusState) sibling; -}; - -struct Property { - const char *name; - PropertyInfo *info; - int offset; - uint8_t bitnr; - uint8_t qtype; - int64_t defval; -}; - -struct PropertyInfo { - const char *name; - const char *legacy_name; - const char **enum_table; - int (*parse)(DeviceState *dev, Property *prop, const char *str); - int (*print)(DeviceState *dev, Property *prop, char *dest, size_t len); - ObjectPropertyAccessor *get; - ObjectPropertyAccessor *set; - ObjectPropertyRelease *release; -}; - -typedef struct GlobalProperty { - const char *driver; - const char *property; - const char *value; - QTAILQ_ENTRY(GlobalProperty) next; -} GlobalProperty; - -/*** Board API. This should go away once we have a machine config file. ***/ - -DeviceState *qdev_create(BusState *bus, const char *name); -DeviceState *qdev_try_create(BusState *bus, const char *name); -int qdev_device_help(QemuOpts *opts); -DeviceState *qdev_device_add(QemuOpts *opts); -int qdev_init(DeviceState *dev) QEMU_WARN_UNUSED_RESULT; -void qdev_init_nofail(DeviceState *dev); -void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, - int required_for_version); -void qdev_unplug(DeviceState *dev, Error **errp); -void qdev_free(DeviceState *dev); -int qdev_simple_unplug_cb(DeviceState *dev); -void qdev_machine_creation_done(void); -bool qdev_machine_modified(void); - -qemu_irq qdev_get_gpio_in(DeviceState *dev, int n); -void qdev_connect_gpio_out(DeviceState *dev, int n, qemu_irq pin); - -BusState *qdev_get_child_bus(DeviceState *dev, const char *name); - -/*** Device API. ***/ - -/* Register device properties. */ -/* GPIO inputs also double as IRQ sinks. */ -void qdev_init_gpio_in(DeviceState *dev, qemu_irq_handler handler, int n); -void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n); - -BusState *qdev_get_parent_bus(DeviceState *dev); - -/*** BUS API. ***/ - -DeviceState *qdev_find_recursive(BusState *bus, const char *id); - -/* Returns 0 to walk children, > 0 to skip walk, < 0 to terminate walk. */ -typedef int (qbus_walkerfn)(BusState *bus, void *opaque); -typedef int (qdev_walkerfn)(DeviceState *dev, void *opaque); - -void qbus_create_inplace(BusState *bus, const char *typename, - DeviceState *parent, const char *name); -BusState *qbus_create(const char *typename, DeviceState *parent, const char *name); -/* Returns > 0 if either devfn or busfn skip walk somewhere in cursion, - * < 0 if either devfn or busfn terminate walk somewhere in cursion, - * 0 otherwise. */ -int qbus_walk_children(BusState *bus, qdev_walkerfn *devfn, - qbus_walkerfn *busfn, void *opaque); -int qdev_walk_children(DeviceState *dev, qdev_walkerfn *devfn, - qbus_walkerfn *busfn, void *opaque); -void qdev_reset_all(DeviceState *dev); -void qbus_reset_all_fn(void *opaque); - -void qbus_free(BusState *bus); - -#define FROM_QBUS(type, dev) DO_UPCAST(type, qbus, dev) - -/* This should go away once we get rid of the NULL bus hack */ -BusState *sysbus_get_default(void); - -/*** monitor commands ***/ - -void do_info_qtree(Monitor *mon); -void do_info_qdm(Monitor *mon); -int do_device_add(Monitor *mon, const QDict *qdict, QObject **ret_data); -int do_device_del(Monitor *mon, const QDict *qdict, QObject **ret_data); - -/*** qdev-properties.c ***/ - -extern PropertyInfo qdev_prop_bit; -extern PropertyInfo qdev_prop_uint8; -extern PropertyInfo qdev_prop_uint16; -extern PropertyInfo qdev_prop_uint32; -extern PropertyInfo qdev_prop_int32; -extern PropertyInfo qdev_prop_uint64; -extern PropertyInfo qdev_prop_hex8; -extern PropertyInfo qdev_prop_hex32; -extern PropertyInfo qdev_prop_hex64; -extern PropertyInfo qdev_prop_string; -extern PropertyInfo qdev_prop_chr; -extern PropertyInfo qdev_prop_ptr; -extern PropertyInfo qdev_prop_macaddr; -extern PropertyInfo qdev_prop_losttickpolicy; -extern PropertyInfo qdev_prop_bios_chs_trans; -extern PropertyInfo qdev_prop_drive; -extern PropertyInfo qdev_prop_netdev; -extern PropertyInfo qdev_prop_vlan; -extern PropertyInfo qdev_prop_pci_devfn; -extern PropertyInfo qdev_prop_blocksize; -extern PropertyInfo qdev_prop_pci_host_devaddr; - -#define DEFINE_PROP(_name, _state, _field, _prop, _type) { \ - .name = (_name), \ - .info = &(_prop), \ - .offset = offsetof(_state, _field) \ - + type_check(_type,typeof_field(_state, _field)), \ - } -#define DEFINE_PROP_DEFAULT(_name, _state, _field, _defval, _prop, _type) { \ - .name = (_name), \ - .info = &(_prop), \ - .offset = offsetof(_state, _field) \ - + type_check(_type,typeof_field(_state, _field)), \ - .qtype = QTYPE_QINT, \ - .defval = (_type)_defval, \ - } -#define DEFINE_PROP_BIT(_name, _state, _field, _bit, _defval) { \ - .name = (_name), \ - .info = &(qdev_prop_bit), \ - .bitnr = (_bit), \ - .offset = offsetof(_state, _field) \ - + type_check(uint32_t,typeof_field(_state, _field)), \ - .qtype = QTYPE_QBOOL, \ - .defval = (bool)_defval, \ - } - -#define DEFINE_PROP_UINT8(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint8, uint8_t) -#define DEFINE_PROP_UINT16(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint16, uint16_t) -#define DEFINE_PROP_UINT32(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint32, uint32_t) -#define DEFINE_PROP_INT32(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_int32, int32_t) -#define DEFINE_PROP_UINT64(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint64, uint64_t) -#define DEFINE_PROP_HEX8(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex8, uint8_t) -#define DEFINE_PROP_HEX32(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex32, uint32_t) -#define DEFINE_PROP_HEX64(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex64, uint64_t) -#define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t) - -#define DEFINE_PROP_PTR(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_ptr, void*) -#define DEFINE_PROP_CHR(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_chr, CharDriverState*) -#define DEFINE_PROP_STRING(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_string, char*) -#define DEFINE_PROP_NETDEV(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_netdev, NetClientState*) -#define DEFINE_PROP_VLAN(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_vlan, NetClientState*) -#define DEFINE_PROP_DRIVE(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_drive, BlockDriverState *) -#define DEFINE_PROP_MACADDR(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_macaddr, MACAddr) -#define DEFINE_PROP_LOSTTICKPOLICY(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_losttickpolicy, \ - LostTickPolicy) -#define DEFINE_PROP_BIOS_CHS_TRANS(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_bios_chs_trans, int) -#define DEFINE_PROP_BLOCKSIZE(_n, _s, _f, _d) \ - DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_blocksize, uint16_t) -#define DEFINE_PROP_PCI_HOST_DEVADDR(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_pci_host_devaddr, PCIHostDeviceAddress) - -#define DEFINE_PROP_END_OF_LIST() \ - {} - -/* Set properties between creation and init. */ -void *qdev_get_prop_ptr(DeviceState *dev, Property *prop); -int qdev_prop_parse(DeviceState *dev, const char *name, const char *value); -void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value); -void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value); -void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value); -void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value); -void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value); -void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value); -void qdev_prop_set_string(DeviceState *dev, const char *name, const char *value); -void qdev_prop_set_chr(DeviceState *dev, const char *name, CharDriverState *value); -void qdev_prop_set_netdev(DeviceState *dev, const char *name, NetClientState *value); -int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState *value) QEMU_WARN_UNUSED_RESULT; -void qdev_prop_set_drive_nofail(DeviceState *dev, const char *name, BlockDriverState *value); -void qdev_prop_set_macaddr(DeviceState *dev, const char *name, uint8_t *value); -void qdev_prop_set_enum(DeviceState *dev, const char *name, int value); -/* FIXME: Remove opaque pointer properties. */ -void qdev_prop_set_ptr(DeviceState *dev, const char *name, void *value); - -void qdev_prop_register_global_list(GlobalProperty *props); -void qdev_prop_set_globals(DeviceState *dev); -void error_set_from_qdev_prop_error(Error **errp, int ret, DeviceState *dev, - Property *prop, const char *value); - -char *qdev_get_fw_dev_path(DeviceState *dev); - -/** - * @qdev_property_add_static - add a @Property to a device referencing a - * field in a struct. - */ -void qdev_property_add_static(DeviceState *dev, Property *prop, Error **errp); - -/** - * @qdev_machine_init - * - * Initialize platform devices before machine init. This is a hack until full - * support for composition is added. - */ -void qdev_machine_init(void); - -/** - * @device_reset - * - * Reset a single device (by calling the reset method). - */ -void device_reset(DeviceState *dev); - -const VMStateDescription *qdev_get_vmsd(DeviceState *dev); - -const char *qdev_fw_name(DeviceState *dev); - -Object *qdev_get_machine(void); - -/* FIXME: make this a link<> */ -void qdev_set_parent_bus(DeviceState *dev, BusState *bus); - -extern int qdev_hotplug; - -char *qdev_get_dev_path(DeviceState *dev); +#include "hw/hw.h" +#include "qdev-core.h" +#include "qdev-properties.h" +#include "qdev-monitor.h" #endif -- cgit v1.2.3 From 017cf5b1d22f80f36dc4c5aba465b178cc209d35 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 23 Oct 2012 19:43:01 -0200 Subject: qemu-fsdev-dummy.c: Include module.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit module.h is where machine_init() is defined, but qemu-fsdev-dummy.c doesn't include it. The header is probably being included by accident because some other headers are including qemu-common.h, but those headers should eventually stop including qemu-common.h. Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- fsdev/qemu-fsdev-dummy.c | 1 + 1 file changed, 1 insertion(+) diff --git a/fsdev/qemu-fsdev-dummy.c b/fsdev/qemu-fsdev-dummy.c index 4e700dd4e4..300f2758be 100644 --- a/fsdev/qemu-fsdev-dummy.c +++ b/fsdev/qemu-fsdev-dummy.c @@ -14,6 +14,7 @@ #include #include "qemu-fsdev.h" #include "qemu-config.h" +#include "module.h" int qemu_fsdev_add(QemuOpts *opts) { -- cgit v1.2.3 From bcbb78c6b6db9e784448a8b521c14af083585ce4 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 23 Oct 2012 21:01:36 -0200 Subject: vnc-palette.h: Include MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit is needed for the 'bool' type, used in the header. The header is probably being included by accident because some other headers are including qemu-common.h, but those headers should eventually stop including qemu-common.h. Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- ui/vnc-palette.h | 1 + 1 file changed, 1 insertion(+) diff --git a/ui/vnc-palette.h b/ui/vnc-palette.h index 3260885ff0..b82dc5db91 100644 --- a/ui/vnc-palette.h +++ b/ui/vnc-palette.h @@ -32,6 +32,7 @@ #include "qlist.h" #include "qemu-queue.h" #include +#include #define VNC_PALETTE_HASH_SIZE 256 #define VNC_PALETTE_MAX_SIZE 256 -- cgit v1.2.3 From c8aba9ced945a59fe2638d34660a940a3e727038 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 23 Oct 2012 21:29:38 -0200 Subject: qemu-config.h: Include headers it needs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Include: - for FILE - qemu-option.h for QemuOptsList Some of those headers were probably being included by accident because some other headers were including qemu-common.h, but those headers should eventually stop including qemu-common.h. Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- qemu-config.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qemu-config.h b/qemu-config.h index 5557562c33..812c4c5b10 100644 --- a/qemu-config.h +++ b/qemu-config.h @@ -1,6 +1,8 @@ #ifndef QEMU_CONFIG_H #define QEMU_CONFIG_H +#include +#include "qemu-option.h" #include "error.h" extern QemuOptsList qemu_fsdev_opts; -- cgit v1.2.3 From 17e0b6ab08bd272aee24bd1a173bf0adc708d0aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Nov 2012 16:42:39 +0100 Subject: osdep: Move qemu_{open,close}() prototypes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit They are implemented in osdep.c, so keep the prototypes in osdep.h. Suggested-by: Igor Mammedov Signed-off-by: Andreas Färber Acked-by: Eduardo Habkost --- osdep.h | 3 +++ qemu-common.h | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/osdep.h b/osdep.h index 585e2c1787..87d3b9cfa8 100644 --- a/osdep.h +++ b/osdep.h @@ -136,6 +136,9 @@ void qemu_vfree(void *ptr); int qemu_madvise(void *addr, size_t len, int advice); +int qemu_open(const char *name, int flags, ...); +int qemu_close(int fd); + #if defined(__HAIKU__) && defined(__i386__) #define FMT_pid "%ld" #elif defined(WIN64) diff --git a/qemu-common.h b/qemu-common.h index 9112e2de7a..cef264cc85 100644 --- a/qemu-common.h +++ b/qemu-common.h @@ -217,8 +217,6 @@ const char *path(const char *pathname); void *qemu_oom_check(void *ptr); -int qemu_open(const char *name, int flags, ...); -int qemu_close(int fd); ssize_t qemu_write_full(int fd, const void *buf, size_t count) QEMU_WARN_UNUSED_RESULT; ssize_t qemu_send_full(int fd, const void *buf, size_t count, int flags) -- cgit v1.2.3 From da4fea066d9e08654940801d46e350a8bbd56547 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 20 Aug 2012 01:39:37 +0200 Subject: qapi-types.h: Don't include qemu-common.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Needed to prevent build breakage when CPUState becomes a child of DeviceState. Signed-off-by: Igor Mammedov [ehabkost: include too] Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- scripts/qapi-types.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/qapi-types.py b/scripts/qapi-types.py index 1b84834959..6bc2391874 100644 --- a/scripts/qapi-types.py +++ b/scripts/qapi-types.py @@ -273,7 +273,8 @@ fdecl.write(mcgen(''' #ifndef %(guard)s #define %(guard)s -#include "qemu-common.h" +#include +#include ''', guard=guardname(h_file))) -- cgit v1.2.3 From c8acc380be7c7bb489037c927a2a5c217535f864 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 14 Nov 2012 16:28:52 -0200 Subject: target-i386/cpu: Name new CPUID bits MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update QEMU's knowledge of CPUID bit names. This allows to enable/disable those new features on QEMU's command line when using KVM and prepares future feature enablement in QEMU. This adds F16C, RDRAND, LWP, TBM, TopoExt, PerfCtr_Core, PerfCtr_NB, FSGSBASE, BMI1, AVX2, BMI2, ERMS, PCID, InvPCID, RTM, RDSeed and ADX. Sources where the AMD BKDG for Family 15h/Model 10h, Intel Software Developer Manual, and the Linux kernel for the leaf 7 bits. Signed-off-by: Andre Przywara Signed-off-by: Boris Ostrovsky [ehabkost: added CPUID_EXT_PCID] [ehabkost: edited commit message] [ehabkost: rebased against latest qemu.git master] Signed-off-by: Eduardo Habkost Reviewed-by: Igor Mammedov Signed-off-by: Andreas Färber --- target-i386/cpu.c | 12 ++++++------ target-i386/cpu.h | 22 ++++++++++++++++++++++ 2 files changed, 28 insertions(+), 6 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e1db639295..f896e0cdca 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -66,7 +66,7 @@ static const char *ext_feature_name[] = { NULL, "pcid", "dca", "sse4.1|sse4_1", "sse4.2|sse4_2", "x2apic", "movbe", "popcnt", "tsc-deadline", "aes", "xsave", "osxsave", - "avx", NULL, NULL, "hypervisor", + "avx", "f16c", "rdrand", "hypervisor", }; /* Feature names that are already defined on feature_name[] but are set on * CPUID[8000_0001].EDX on AMD CPUs don't have their names on @@ -87,10 +87,10 @@ static const char *ext3_feature_name[] = { "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", "3dnowprefetch", "osvw", "ibs", "xop", - "skinit", "wdt", NULL, NULL, - "fma4", NULL, "cvt16", "nodeid_msr", - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + "skinit", "wdt", NULL, "lwp", + "fma4", "tce", NULL, "nodeid_msr", + NULL, "tbm", "topoext", "perfctr_core", + "perfctr_nb", NULL, NULL, NULL, NULL, NULL, NULL, NULL, }; @@ -119,7 +119,7 @@ static const char *svm_feature_name[] = { static const char *cpuid_7_0_ebx_feature_name[] = { "fsgsbase", NULL, NULL, "bmi1", "hle", "avx2", NULL, "smep", "bmi2", "erms", "invpcid", "rtm", NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, "smap", NULL, NULL, NULL, + NULL, NULL, "rdseed", "adx", "smap", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index cdc59dc0ca..90ef1ff1e2 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -403,9 +403,11 @@ #define CPUID_EXT_TM2 (1 << 8) #define CPUID_EXT_SSSE3 (1 << 9) #define CPUID_EXT_CID (1 << 10) +#define CPUID_EXT_FMA (1 << 12) #define CPUID_EXT_CX16 (1 << 13) #define CPUID_EXT_XTPR (1 << 14) #define CPUID_EXT_PDCM (1 << 15) +#define CPUID_EXT_PCID (1 << 17) #define CPUID_EXT_DCA (1 << 18) #define CPUID_EXT_SSE41 (1 << 19) #define CPUID_EXT_SSE42 (1 << 20) @@ -417,6 +419,8 @@ #define CPUID_EXT_XSAVE (1 << 26) #define CPUID_EXT_OSXSAVE (1 << 27) #define CPUID_EXT_AVX (1 << 28) +#define CPUID_EXT_F16C (1 << 29) +#define CPUID_EXT_RDRAND (1 << 30) #define CPUID_EXT_HYPERVISOR (1 << 31) #define CPUID_EXT2_FPU (1 << 0) @@ -472,7 +476,15 @@ #define CPUID_EXT3_IBS (1 << 10) #define CPUID_EXT3_XOP (1 << 11) #define CPUID_EXT3_SKINIT (1 << 12) +#define CPUID_EXT3_WDT (1 << 13) +#define CPUID_EXT3_LWP (1 << 15) #define CPUID_EXT3_FMA4 (1 << 16) +#define CPUID_EXT3_TCE (1 << 17) +#define CPUID_EXT3_NODEID (1 << 19) +#define CPUID_EXT3_TBM (1 << 21) +#define CPUID_EXT3_TOPOEXT (1 << 22) +#define CPUID_EXT3_PERFCORE (1 << 23) +#define CPUID_EXT3_PERFNB (1 << 24) #define CPUID_SVM_NPT (1 << 0) #define CPUID_SVM_LBRV (1 << 1) @@ -485,7 +497,17 @@ #define CPUID_SVM_PAUSEFILTER (1 << 10) #define CPUID_SVM_PFTHRESHOLD (1 << 12) +#define CPUID_7_0_EBX_FSGSBASE (1 << 0) +#define CPUID_7_0_EBX_BMI1 (1 << 3) +#define CPUID_7_0_EBX_HLE (1 << 4) +#define CPUID_7_0_EBX_AVX2 (1 << 5) #define CPUID_7_0_EBX_SMEP (1 << 7) +#define CPUID_7_0_EBX_BMI2 (1 << 8) +#define CPUID_7_0_EBX_ERMS (1 << 9) +#define CPUID_7_0_EBX_INVPCID (1 << 10) +#define CPUID_7_0_EBX_RTM (1 << 11) +#define CPUID_7_0_EBX_RDSEED (1 << 18) +#define CPUID_7_0_EBX_ADX (1 << 19) #define CPUID_7_0_EBX_SMAP (1 << 20) #define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */ -- cgit v1.2.3 From 021941b9d97127bbd62a2ca39208d6a5d486b3cb Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 14 Nov 2012 16:28:53 -0200 Subject: target-i386/cpu: Add new Opteron CPU model MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a new base CPU model called Opteron_G5 to model the latest Opteron CPUs. This increases the model value and model numbers and adds TBM, F16C and FMA over the latest G4 model. Signed-off-by: Andre Przywara Signed-off-by: Boris Ostrovsky [ehabkost: edited commit message] Signed-off-by: Eduardo Habkost Reviewed-by: Igor Mammedov Signed-off-by: Andreas Färber --- target-i386/cpu.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index f896e0cdca..c3aff4fe29 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -756,6 +756,38 @@ static x86_def_t builtin_x86_defs[] = { .xlevel = 0x8000001A, .model_id = "AMD Opteron 62xx class CPU", }, + { + .name = "Opteron_G5", + .level = 0xd, + .vendor1 = CPUID_VENDOR_AMD_1, + .vendor2 = CPUID_VENDOR_AMD_2, + .vendor3 = CPUID_VENDOR_AMD_3, + .family = 21, + .model = 2, + .stepping = 0, + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .ext_features = CPUID_EXT_F16C | CPUID_EXT_AVX | CPUID_EXT_XSAVE | + CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_FMA | + CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3, + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | + CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX | + CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT | + CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE | + CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC | + CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE | CPUID_EXT2_MSR | + CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE | CPUID_EXT2_FPU, + .ext3_features = CPUID_EXT3_TBM | CPUID_EXT3_FMA4 | CPUID_EXT3_XOP | + CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE | + CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM | + CPUID_EXT3_LAHF_LM, + .xlevel = 0x8000001A, + .model_id = "AMD Opteron 63xx class CPU", + }, }; #ifdef CONFIG_KVM -- cgit v1.2.3 From 37507094f350b75c62dc059f998e7185de3ab60a Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 14 Nov 2012 16:28:54 -0200 Subject: target-i386: Add Haswell CPU model MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Features added to the model, in relation to SandyBridge: fma CPUID[1].ECX[12] pcid CPUID[1].ECX[17] movbe CPUID[1].ECX[22] fsgsbase CPUID[EAX=7,ECX=0].EBX[0] bmi1 CPUID[EAX=7,ECX=0].EBX[3] hle CPUID[EAX=7,ECX=0].EBX[4] avx2 CPUID[EAX=7,ECX=0].EBX[5] smep CPUID[EAX=7,ECX=0].EBX[7] bmi2 CPUID[EAX=7,ECX=0].EBX[8] erms CPUID[EAX=7,ECX=0].EBX[9] invpcid CPUID[EAX=7,ECX=0].EBX[10] rtm CPUID[EAX=7,ECX=0].EBX[11] Signed-off-by: Eduardo Habkost Reviewed-by: Igor Mammedov Signed-off-by: Andreas Färber --- target-i386/cpu.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index c3aff4fe29..64c34910a0 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -646,6 +646,35 @@ static x86_def_t builtin_x86_defs[] = { .xlevel = 0x8000000A, .model_id = "Intel Xeon E312xx (Sandy Bridge)", }, + { + .name = "Haswell", + .level = 0xd, + .vendor1 = CPUID_VENDOR_INTEL_1, + .vendor2 = CPUID_VENDOR_INTEL_2, + .vendor3 = CPUID_VENDOR_INTEL_3, + .family = 6, + .model = 60, + .stepping = 1, + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | + CPUID_PGE | CPUID_MTRR | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | + CPUID_EXT_PCID, + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, + .ext3_features = CPUID_EXT3_LAHF_LM, + .cpuid_7_0_ebx_features = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM, + .xlevel = 0x8000000A, + .model_id = "Intel Core Processor (Haswell)", + }, { .name = "Opteron_G1", .level = 5, -- cgit v1.2.3