From def74c0cf05722b2e502d4b4f1219966c5b0cbd3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 4 Mar 2017 15:56:48 -0300 Subject: target-mips: fix compiler warnings (clang 5) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit static code analyzer complain: target/mips/helper.c:453:5: warning: Function call argument is an uninitialized value qemu_log_mask(CPU_LOG_MMU, ^~~~~~~~~~~~~~~~~~~~~~~~~~ 'physical' and 'prot' are uninitialized if 'ret' is not TLBRET_MATCH. Reported-by: Clang Static Analyzer Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target/mips/helper.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/target/mips/helper.c b/target/mips/helper.c index d2e77958fd..e359ca3b44 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -450,10 +450,18 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, access_type = ACCESS_INT; ret = get_physical_address(env, &physical, &prot, address, rw, access_type); - qemu_log_mask(CPU_LOG_MMU, - "%s address=%" VADDR_PRIx " ret %d physical " TARGET_FMT_plx - " prot %d\n", - __func__, address, ret, physical, prot); + switch (ret) { + case TLBRET_MATCH: + qemu_log_mask(CPU_LOG_MMU, + "%s address=%" VADDR_PRIx " physical " TARGET_FMT_plx + " prot %d\n", __func__, address, physical, prot); + break; + default: + qemu_log_mask(CPU_LOG_MMU, + "%s address=%" VADDR_PRIx " ret %d\n", __func__, address, + ret); + break; + } if (ret == TLBRET_MATCH) { tlb_set_page(cs, address & TARGET_PAGE_MASK, physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, -- cgit v1.2.3 From 989f2aa9af7f05c323761b66c0e299059a19b7b1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 4 Mar 2017 15:56:49 -0300 Subject: target-mips: remove old & unuseful comments MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target/mips/translate.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 8b4a072ecb..1fe0ff39f2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -5137,7 +5137,6 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_ld32s_tl(arg, cpu_env, @@ -5791,7 +5790,6 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_st_tl(arg, cpu_env, @@ -6454,7 +6452,6 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_dmfc0_contextconfig(arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_ld_tl(arg, cpu_env, @@ -7092,7 +7089,6 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_st_tl(arg, cpu_env, -- cgit v1.2.3 From 965447eecb6b98d6dfc4dbd97f836093c7e398a0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 4 Mar 2017 15:56:50 -0300 Subject: target-mips: log bad coprocessor0 register accesses with LOG_UNIMP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target/mips/translate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 1fe0ff39f2..5c030a90cd 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4872,7 +4872,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel) return; cp0_unimplemented: - LOG_DISAS("mfhc0 %s (reg %d sel %d)\n", rn, reg, sel); + qemu_log_mask(LOG_UNIMP, "mfhc0 %s (reg %d sel %d)\n", rn, reg, sel); tcg_gen_movi_tl(arg, 0); } @@ -4944,7 +4944,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel) (void)rn; /* avoid a compiler warning */ cp0_unimplemented: - LOG_DISAS("mthc0 %s (reg %d sel %d)\n", rn, reg, sel); + qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", rn, reg, sel); } static inline void gen_mfc0_unimplemented(DisasContext *ctx, TCGv arg) @@ -5627,7 +5627,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) return; cp0_unimplemented: - LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel); + qemu_log_mask(LOG_UNIMP, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel); gen_mfc0_unimplemented(ctx, arg); } @@ -6294,7 +6294,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) return; cp0_unimplemented: - LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel); + qemu_log_mask(LOG_UNIMP, "mtc0 %s (reg %d sel %d)\n", rn, reg, sel); } #if defined(TARGET_MIPS64) @@ -6928,7 +6928,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) return; cp0_unimplemented: - LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel); + qemu_log_mask(LOG_UNIMP, "dmfc0 %s (reg %d sel %d)\n", rn, reg, sel); gen_mfc0_unimplemented(ctx, arg); } @@ -7593,7 +7593,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) return; cp0_unimplemented: - LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel); + qemu_log_mask(LOG_UNIMP, "dmtc0 %s (reg %d sel %d)\n", rn, reg, sel); } #endif /* TARGET_MIPS64 */ -- cgit v1.2.3 From 3570d7f6672836140f0a1ec9bf95dd5ea50a2aaa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 4 Mar 2017 15:56:51 -0300 Subject: target-mips: replace break by goto cp0_unimplemented MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit this fixes many warnings like: target/mips/translate.c:6253:13: warning: Value stored to 'rn' is never read rn = "invalid sel"; ^ ~~~~~~~~~~~~~ Reported-by: Clang Static Analyzer Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target/mips/translate.c | 88 ++++++++++++++++++++++++------------------------- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 5c030a90cd..fc11e15a17 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -5458,19 +5458,19 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) case 1: // gen_helper_mfc0_tracecontrol(arg); /* PDtrace support */ rn = "TraceControl"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_mfc0_tracecontrol2(arg); /* PDtrace support */ rn = "TraceControl2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_mfc0_usertracedata(arg); /* PDtrace support */ rn = "UserTraceData"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_mfc0_tracebpc(arg); /* PDtrace support */ rn = "TraceBPC"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -5496,31 +5496,31 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) case 1: // gen_helper_mfc0_performance1(arg); rn = "Performance1"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_mfc0_performance2(arg); rn = "Performance2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_mfc0_performance3(arg); rn = "Performance3"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_mfc0_performance4(arg); rn = "Performance4"; -// break; + goto cp0_unimplemented; case 5: // gen_helper_mfc0_performance5(arg); rn = "Performance5"; -// break; + goto cp0_unimplemented; case 6: // gen_helper_mfc0_performance6(arg); rn = "Performance6"; -// break; + goto cp0_unimplemented; case 7: // gen_helper_mfc0_performance7(arg); rn = "Performance7"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -6116,13 +6116,13 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) rn = "TraceControl"; /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; -// break; + goto cp0_unimplemented; case 2: // gen_helper_mtc0_tracecontrol2(cpu_env, arg); /* PDtrace support */ rn = "TraceControl2"; /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; -// break; + goto cp0_unimplemented; case 3: /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; @@ -6130,13 +6130,13 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) rn = "UserTraceData"; /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; -// break; + goto cp0_unimplemented; case 4: // gen_helper_mtc0_tracebpc(cpu_env, arg); /* PDtrace support */ /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; rn = "TraceBPC"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -6161,31 +6161,31 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) case 1: // gen_helper_mtc0_performance1(arg); rn = "Performance1"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_mtc0_performance2(arg); rn = "Performance2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_mtc0_performance3(arg); rn = "Performance3"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_mtc0_performance4(arg); rn = "Performance4"; -// break; + goto cp0_unimplemented; case 5: // gen_helper_mtc0_performance5(arg); rn = "Performance5"; -// break; + goto cp0_unimplemented; case 6: // gen_helper_mtc0_performance6(arg); rn = "Performance6"; -// break; + goto cp0_unimplemented; case 7: // gen_helper_mtc0_performance7(arg); rn = "Performance7"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -6766,19 +6766,19 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) case 1: // gen_helper_dmfc0_tracecontrol(arg, cpu_env); /* PDtrace support */ rn = "TraceControl"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_dmfc0_tracecontrol2(arg, cpu_env); /* PDtrace support */ rn = "TraceControl2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_dmfc0_usertracedata(arg, cpu_env); /* PDtrace support */ rn = "UserTraceData"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_dmfc0_tracebpc(arg, cpu_env); /* PDtrace support */ rn = "TraceBPC"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -6803,31 +6803,31 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) case 1: // gen_helper_dmfc0_performance1(arg); rn = "Performance1"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_dmfc0_performance2(arg); rn = "Performance2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_dmfc0_performance3(arg); rn = "Performance3"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_dmfc0_performance4(arg); rn = "Performance4"; -// break; + goto cp0_unimplemented; case 5: // gen_helper_dmfc0_performance5(arg); rn = "Performance5"; -// break; + goto cp0_unimplemented; case 6: // gen_helper_dmfc0_performance6(arg); rn = "Performance6"; -// break; + goto cp0_unimplemented; case 7: // gen_helper_dmfc0_performance7(arg); rn = "Performance7"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -7417,25 +7417,25 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; rn = "TraceControl"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_mtc0_tracecontrol2(cpu_env, arg); /* PDtrace support */ /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; rn = "TraceControl2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_mtc0_usertracedata(cpu_env, arg); /* PDtrace support */ /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; rn = "UserTraceData"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_mtc0_tracebpc(cpu_env, arg); /* PDtrace support */ /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; rn = "TraceBPC"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } @@ -7460,31 +7460,31 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) case 1: // gen_helper_mtc0_performance1(cpu_env, arg); rn = "Performance1"; -// break; + goto cp0_unimplemented; case 2: // gen_helper_mtc0_performance2(cpu_env, arg); rn = "Performance2"; -// break; + goto cp0_unimplemented; case 3: // gen_helper_mtc0_performance3(cpu_env, arg); rn = "Performance3"; -// break; + goto cp0_unimplemented; case 4: // gen_helper_mtc0_performance4(cpu_env, arg); rn = "Performance4"; -// break; + goto cp0_unimplemented; case 5: // gen_helper_mtc0_performance5(cpu_env, arg); rn = "Performance5"; -// break; + goto cp0_unimplemented; case 6: // gen_helper_mtc0_performance6(cpu_env, arg); rn = "Performance6"; -// break; + goto cp0_unimplemented; case 7: // gen_helper_mtc0_performance7(cpu_env, arg); rn = "Performance7"; -// break; + goto cp0_unimplemented; default: goto cp0_unimplemented; } -- cgit v1.2.3 From b44a7fb14eaebb4f606f768c66122aa54d471887 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 4 Mar 2017 15:56:52 -0300 Subject: target-mips: replace few LOG_DISAS() with trace points MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- Makefile.objs | 1 + target/mips/trace-events | 5 +++++ target/mips/translate.c | 25 +++++++++++-------------- 3 files changed, 17 insertions(+), 14 deletions(-) create mode 100644 target/mips/trace-events diff --git a/Makefile.objs b/Makefile.objs index e740500e2d..6167e7b17d 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -157,6 +157,7 @@ trace-events-subdirs += audio trace-events-subdirs += net trace-events-subdirs += target/arm trace-events-subdirs += target/i386 +trace-events-subdirs += target/mips trace-events-subdirs += target/sparc trace-events-subdirs += target/s390x trace-events-subdirs += target/ppc diff --git a/target/mips/trace-events b/target/mips/trace-events new file mode 100644 index 0000000000..43824089b3 --- /dev/null +++ b/target/mips/trace-events @@ -0,0 +1,5 @@ +# See docs/tracing.txt for syntax documentation. + +# target/mips/translate.c +mips_translate_c0(const char *instr, const char *rn, int reg, int sel) "%s %s (reg %d sel %d)" +mips_translate_tr(const char *instr, int rt, int u, int sel, int h) "%s (reg %d u %d sel %d h %d)" diff --git a/target/mips/translate.c b/target/mips/translate.c index fc11e15a17..78b7264add 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -33,6 +33,7 @@ #include "sysemu/kvm.h" #include "exec/semihost.h" +#include "target/mips/trace.h" #include "trace-tcg.h" #include "exec/log.h" @@ -4866,9 +4867,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel) default: goto cp0_unimplemented; } - - (void)rn; /* avoid a compiler warning */ - LOG_DISAS("mfhc0 %s (reg %d sel %d)\n", rn, reg, sel); + trace_mips_translate_c0("mfhc0", rn, reg, sel); return; cp0_unimplemented: @@ -4941,8 +4940,8 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel) default: goto cp0_unimplemented; } + trace_mips_translate_c0("mthc0", rn, reg, sel); - (void)rn; /* avoid a compiler warning */ cp0_unimplemented: qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", rn, reg, sel); } @@ -5622,8 +5621,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) default: goto cp0_unimplemented; } - (void)rn; /* avoid a compiler warning */ - LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel); + trace_mips_translate_c0("mfc0", rn, reg, sel); return; cp0_unimplemented: @@ -6284,8 +6282,8 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) default: goto cp0_unimplemented; } - (void)rn; /* avoid a compiler warning */ - LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel); + trace_mips_translate_c0("mtc0", rn, reg, sel); + /* For simplicity assume that all writes can cause interrupts. */ if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); @@ -6923,8 +6921,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) default: goto cp0_unimplemented; } - (void)rn; /* avoid a compiler warning */ - LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel); + trace_mips_translate_c0("dmfc0", rn, reg, sel); return; cp0_unimplemented: @@ -7583,8 +7580,8 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) default: goto cp0_unimplemented; } - (void)rn; /* avoid a compiler warning */ - LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel); + trace_mips_translate_c0("dmtc0", rn, reg, sel); + /* For simplicity assume that all writes can cause interrupts. */ if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); @@ -7803,7 +7800,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd, default: goto die; } - LOG_DISAS("mftr (reg %d u %d sel %d h %d)\n", rt, u, sel, h); + trace_mips_translate_tr("mftr", rt, u, sel, h); gen_store_gpr(t0, rd); tcg_temp_free(t0); return; @@ -8008,7 +8005,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt, default: goto die; } - LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h); + trace_mips_translate_tr("mttr", rd, u, sel, h); tcg_temp_free(t0); return; -- cgit v1.2.3 From 075a1fe788d36b271ec25507466c30b9a90b5d54 Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Tue, 7 Mar 2017 15:37:34 +0000 Subject: target/mips: fix delay slot detection in gen_msa_branch() It is unnecessary to test R6 from delay/forbidden slot check in gen_msa_branch(). https://bugs.launchpad.net/qemu/+bug/1663287 Reported-by: Brian Campbell Signed-off-by: Yongbok Kim --- target/mips/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 78b7264add..3022f349cb 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -18162,7 +18162,7 @@ static void gen_msa_branch(CPUMIPSState *env, DisasContext *ctx, uint32_t op1) check_msa_access(ctx); - if (ctx->insn_flags & ISA_MIPS32R6 && ctx->hflags & MIPS_HFLAG_BMASK) { + if (ctx->hflags & MIPS_HFLAG_BMASK) { generate_exception_end(ctx, EXCP_RI); return; } -- cgit v1.2.3 From c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c Mon Sep 17 00:00:00 2001 From: Prasad J Pandit Date: Wed, 12 Oct 2016 18:07:41 +0530 Subject: dma: rc4030: limit interval timer reload value MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The JAZZ RC4030 chipset emulator has a periodic timer and associated interval reload register. The reload value is used as divider when computing timer's next tick value. If reload value is large, it could lead to divide by zero error. Limit the interval reload value to avoid it. Reported-by: Huawei PSIRT Signed-off-by: Prasad J Pandit Tested-by: Hervé Poussineau Signed-off-by: Yongbok Kim --- hw/dma/rc4030.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 17c8518fea..41fc043464 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -460,7 +460,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data, break; /* Interval timer reload */ case 0x0228: - s->itr = val; + s->itr = val & 0x01FF; qemu_irq_lower(s->timer_irq); set_next_tick(s); break; -- cgit v1.2.3 From c627e7526a902dd5bb1907dbbd5cf961679dfa68 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Fri, 18 Nov 2016 23:43:36 +0100 Subject: dma/rc4030: translate memory accesses only when they occur MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This simplifies the code a lot, and this fixes big memory leaks introduced in a3d586f704609a45b6037534cb2f34da5dfd8895 Windows NT is now able to boot without using gigabytes of ram on the host. Signed-off-by: Hervé Poussineau Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- hw/dma/rc4030.c | 158 +++++++++++++------------------------------------------- 1 file changed, 36 insertions(+), 122 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 41fc043464..5f10b9d918 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -34,8 +34,6 @@ /********************************************************/ /* rc4030 emulation */ -#define MAX_TL_ENTRIES 512 - typedef struct dma_pagetable_entry { int32_t frame; int32_t owner; @@ -91,14 +89,8 @@ typedef struct rc4030State qemu_irq timer_irq; qemu_irq jazz_bus_irq; - /* biggest translation table */ - MemoryRegion dma_tt; - /* translation table memory region alias, added to system RAM */ - MemoryRegion dma_tt_alias; /* whole DMA memory region, root of DMA address space */ MemoryRegion dma_mr; - /* translation table entry aliases, added to DMA memory region */ - MemoryRegion dma_mrs[MAX_TL_ENTRIES]; AddressSpace dma_as; MemoryRegion iomem_chipset; @@ -256,96 +248,6 @@ static uint64_t rc4030_read(void *opaque, hwaddr addr, unsigned int size) return val; } -static void rc4030_dma_as_update_one(rc4030State *s, int index, uint32_t frame) -{ - if (index < MAX_TL_ENTRIES) { - memory_region_set_enabled(&s->dma_mrs[index], false); - } - - if (!frame) { - return; - } - - if (index >= MAX_TL_ENTRIES) { - qemu_log_mask(LOG_UNIMP, - "rc4030: trying to use too high " - "translation table entry %d (max allowed=%d)", - index, MAX_TL_ENTRIES); - return; - } - memory_region_set_alias_offset(&s->dma_mrs[index], frame); - memory_region_set_enabled(&s->dma_mrs[index], true); -} - -static void rc4030_dma_tt_write(void *opaque, hwaddr addr, uint64_t data, - unsigned int size) -{ - rc4030State *s = opaque; - - /* write memory */ - memcpy(memory_region_get_ram_ptr(&s->dma_tt) + addr, &data, size); - - /* update dma address space (only if frame field has been written) */ - if (addr % sizeof(dma_pagetable_entry) == 0) { - int index = addr / sizeof(dma_pagetable_entry); - memory_region_transaction_begin(); - rc4030_dma_as_update_one(s, index, (uint32_t)data); - memory_region_transaction_commit(); - } -} - -static const MemoryRegionOps rc4030_dma_tt_ops = { - .write = rc4030_dma_tt_write, - .impl.min_access_size = 4, - .impl.max_access_size = 4, -}; - -static void rc4030_dma_tt_update(rc4030State *s, uint32_t new_tl_base, - uint32_t new_tl_limit) -{ - int entries, i; - dma_pagetable_entry *dma_tl_contents; - - if (s->dma_tl_limit) { - /* write old dma tl table to physical memory */ - memory_region_del_subregion(get_system_memory(), &s->dma_tt_alias); - cpu_physical_memory_write(s->dma_tl_limit & 0x7fffffff, - memory_region_get_ram_ptr(&s->dma_tt), - memory_region_size(&s->dma_tt_alias)); - } - object_unparent(OBJECT(&s->dma_tt_alias)); - - s->dma_tl_base = new_tl_base; - s->dma_tl_limit = new_tl_limit; - new_tl_base &= 0x7fffffff; - - if (s->dma_tl_limit) { - uint64_t dma_tt_size; - if (s->dma_tl_limit <= memory_region_size(&s->dma_tt)) { - dma_tt_size = s->dma_tl_limit; - } else { - dma_tt_size = memory_region_size(&s->dma_tt); - } - memory_region_init_alias(&s->dma_tt_alias, OBJECT(s), - "dma-table-alias", - &s->dma_tt, 0, dma_tt_size); - dma_tl_contents = memory_region_get_ram_ptr(&s->dma_tt); - cpu_physical_memory_read(new_tl_base, dma_tl_contents, dma_tt_size); - - memory_region_transaction_begin(); - entries = dma_tt_size / sizeof(dma_pagetable_entry); - for (i = 0; i < entries; i++) { - rc4030_dma_as_update_one(s, i, dma_tl_contents[i].frame); - } - memory_region_add_subregion(get_system_memory(), new_tl_base, - &s->dma_tt_alias); - memory_region_transaction_commit(); - } else { - memory_region_init(&s->dma_tt_alias, OBJECT(s), - "dma-table-alias", 0); - } -} - static void rc4030_write(void *opaque, hwaddr addr, uint64_t data, unsigned int size) { @@ -362,11 +264,11 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data, break; /* DMA transl. table base */ case 0x0018: - rc4030_dma_tt_update(s, val, s->dma_tl_limit); + s->dma_tl_base = val; break; /* DMA transl. table limit */ case 0x0020: - rc4030_dma_tt_update(s, s->dma_tl_base, val); + s->dma_tl_limit = val; break; /* DMA transl. table invalidated */ case 0x0028: @@ -586,6 +488,38 @@ static const MemoryRegionOps jazzio_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +static IOMMUTLBEntry rc4030_dma_translate(MemoryRegion *iommu, hwaddr addr, + bool is_write) +{ + rc4030State *s = container_of(iommu, rc4030State, dma_mr); + IOMMUTLBEntry ret = { + .target_as = &address_space_memory, + .iova = addr & ~(DMA_PAGESIZE - 1), + .translated_addr = 0, + .addr_mask = DMA_PAGESIZE - 1, + .perm = IOMMU_NONE, + }; + uint64_t i, entry_address; + dma_pagetable_entry entry; + + i = addr / DMA_PAGESIZE; + if (i < s->dma_tl_limit / sizeof(entry)) { + entry_address = (s->dma_tl_base & 0x7fffffff) + i * sizeof(entry); + if (address_space_read(ret.target_as, entry_address, + MEMTXATTRS_UNSPECIFIED, (unsigned char *)&entry, + sizeof(entry)) == MEMTX_OK) { + ret.translated_addr = entry.frame & ~(DMA_PAGESIZE - 1); + ret.perm = IOMMU_RW; + } + } + + return ret; +} + +static const MemoryRegionIOMMUOps rc4030_dma_ops = { + .translate = rc4030_dma_translate, +}; + static void rc4030_reset(DeviceState *dev) { rc4030State *s = RC4030(dev); @@ -596,7 +530,6 @@ static void rc4030_reset(DeviceState *dev) s->invalid_address_register = 0; memset(s->dma_regs, 0, sizeof(s->dma_regs)); - rc4030_dma_tt_update(s, 0, 0); s->remote_failed_address = s->memory_failed_address = 0; s->cache_maint = 0; @@ -735,7 +668,6 @@ static void rc4030_realize(DeviceState *dev, Error **errp) { rc4030State *s = RC4030(dev); Object *o = OBJECT(dev); - int i; s->periodic_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, rc4030_periodic_timer, s); @@ -745,37 +677,19 @@ static void rc4030_realize(DeviceState *dev, Error **errp) memory_region_init_io(&s->iomem_jazzio, NULL, &jazzio_ops, s, "rc4030.jazzio", 0x00001000); - memory_region_init_rom_device(&s->dma_tt, o, - &rc4030_dma_tt_ops, s, "dma-table", - MAX_TL_ENTRIES * sizeof(dma_pagetable_entry), - NULL); - memory_region_init(&s->dma_tt_alias, o, "dma-table-alias", 0); - memory_region_init(&s->dma_mr, o, "dma", INT32_MAX); - for (i = 0; i < MAX_TL_ENTRIES; ++i) { - memory_region_init_alias(&s->dma_mrs[i], o, "dma-alias", - get_system_memory(), 0, DMA_PAGESIZE); - memory_region_set_enabled(&s->dma_mrs[i], false); - memory_region_add_subregion(&s->dma_mr, i * DMA_PAGESIZE, - &s->dma_mrs[i]); - } + memory_region_init_iommu(&s->dma_mr, o, &rc4030_dma_ops, + "rc4030.dma", UINT32_MAX); address_space_init(&s->dma_as, &s->dma_mr, "rc4030-dma"); } static void rc4030_unrealize(DeviceState *dev, Error **errp) { rc4030State *s = RC4030(dev); - int i; timer_free(s->periodic_timer); address_space_destroy(&s->dma_as); - object_unparent(OBJECT(&s->dma_tt)); - object_unparent(OBJECT(&s->dma_tt_alias)); object_unparent(OBJECT(&s->dma_mr)); - for (i = 0; i < MAX_TL_ENTRIES; ++i) { - memory_region_del_subregion(&s->dma_mr, &s->dma_mrs[i]); - object_unparent(OBJECT(&s->dma_mrs[i])); - } } static void rc4030_class_init(ObjectClass *klass, void *class_data) -- cgit v1.2.3 From 1b393b310f887f22608624f62e5c7bbbc01b1fe7 Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Tue, 14 Mar 2017 16:51:56 +0000 Subject: dma/rc4030: fix a mixed declarations and code warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Yongbok Kim Reviewed-by: Hervé Poussineau --- hw/dma/rc4030.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 5f10b9d918..0080141905 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -99,8 +99,8 @@ typedef struct rc4030State static void set_next_tick(rc4030State *s) { - qemu_irq_lower(s->timer_irq); uint32_t tm_hz; + qemu_irq_lower(s->timer_irq); tm_hz = 1000 / (s->itr + 1); -- cgit v1.2.3 From 659f42d8c30bad9bf677652fc9d3f0ada63fd6e0 Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Fri, 10 Mar 2017 15:32:32 +0000 Subject: MAINTAINERS: update for MIPS devices Add myself to MIPSSIM and new entry for Fulong 2E. Add an entry for Boston machine (Paul Burton). cc: Paul Burton Signed-off-by: Yongbok Kim Reviewed-by: Thomas Huth --- MAINTAINERS | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index bf1aafb1c5..779c429059 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -600,15 +600,28 @@ S: Maintained F: hw/mips/mips_malta.c Mipssim -L: qemu-devel@nongnu.org -S: Orphan +M: Yongbok Kim +S: Odd Fixes F: hw/mips/mips_mipssim.c +F: hw/net/mipsnet.c R4000 M: Aurelien Jarno S: Maintained F: hw/mips/mips_r4k.c +Fulong 2E +M: Yongbok Kim +S: Odd Fixes +F: hw/mips/mips_fulong2e.c + +Boston +M: Paul Burton +S: Maintained +F: hw/core/loader-fit.c +F: hw/mips/boston.c +F: hw/pci-host/xilinx-pcie.c + OpenRISC Machines ----------------- or1k-sim -- cgit v1.2.3