From a66a24585fae7036dc2f358c9addd1630be5c50c Mon Sep 17 00:00:00 2001 From: Petr Pavlu Date: Thu, 13 Jan 2022 16:19:15 +0100 Subject: hw/intc/arm_gic: Implement read of GICC_IIDR Implement support for reading GICC_IIDR. This register is used by the Linux kernel to recognize that GICv2 with GICC_APRn is present. Signed-off-by: Petr Pavlu Message-id: 20220113151916.17978-2-ppavlu@suse.cz Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/intc/arm_gic.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index a994b1f024..0cd9ceca8d 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -1662,6 +1662,15 @@ static MemTxResult gic_cpu_read(GICState *s, int cpu, int offset, } break; } + case 0xfc: + if (s->revision == REV_11MPCORE) { + /* Reserved on 11MPCore */ + *data = 0; + } else { + /* GICv1 or v2; Arm implementation */ + *data = (s->revision << 16) | 0x43b; + } + break; default: qemu_log_mask(LOG_GUEST_ERROR, "gic_cpu_read: Bad offset %x\n", (int)offset); -- cgit v1.2.3