aboutsummaryrefslogtreecommitdiff
path: root/tcg
AgeCommit message (Collapse)Author
2013-09-03Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori
# By Stefan Weil (6) and others # Via Michael Tokarev * mjt/trivial-patches: aio / timers: use g_usleep() not sleep() adlib: sort offsets in portio registration qmp: fix integer usage in examples tci: Remove function tcg_out64 (fix broken build) target-arm: Report unimplemented opcodes (LOG_UNIMP) pflash_cfi02.c: fix debug macro configure: Remove unneeded redirections of stderr (pkg-config --exists) configure: Remove unneeded redirections of stderr (pkg-config --cflags, --libs) configure: Don't write .pyc files by default (python -B) curl: qemu_bh_new() can never return NULL slirp/arp_table.c: Avoid shifting into sign bit of signed integers configure: disable clang -Wstring-plus-int warning rdma: silly ipv6 bugfix misc: Fix some typos in names and comments slirp: Port redirection option behave differently on Linux and Windows Message-id: 1378119695-14568-1-git-send-email-mjt@msgid.tls.msk.ru Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-03Merge branch 'tcg-next' of git://github.com/rth7680/qemuAurelien Jarno
* 'tcg-next' of git://github.com/rth7680/qemu: (29 commits) tcg-i386: Make use of zero-extended memory helper routines tcg: Introduce zero and sign-extended versions of load helpers exec: Split softmmu_defs.h target: Include softmmu_exec.h where forgotten exec: Rename USUFFIX to LSUFFIX tcg-i386: Don't perform GETPC adjustment in TCG code exec: Reorganize the GETRA/GETPC macros configure: Allow x32 as a host tcg-i386: Adjust tcg_out_tlb_load for x32 tcg-i386: Use intptr_t appropriately tcg: Fix jit debug for x32 tcg: Use appropriate types in tcg_reg_alloc_call tcg: Change tcg_out_ld/st offset to intptr_t tcg: Change tcg_gen_exit_tb argument to uintptr_t tcg: Use uintptr_t in TCGHelperInfo tcg: Change relocation offsets to intptr_t tcg: Change memory offsets to intptr_t tcg: Change frame pointer offsets to intptr_t tcg: Define TCG_ptr properly tcg: Define TCG_TYPE_PTR properly ...
2013-09-03tcg/mips: only enable ext8s/ext16s ops on MIPS32R2Aurelien Jarno
On MIPS ext8s and ext16s ops are implemented with a dedicated instruction only on MIPS32R2, otherwise the same kind of implementation than at TCG level (shift left followed by shift right) is used. Change that by only implementing the ext8s and ext16s ops on MIPS32R2 so that optimizations can be done by the optimizer. Use an inline version to avoid having to test again for MIPS32R2 instructions. Keep the shift implementation for the ld/st routines. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-09-03tcg/mips: inline bswap16/bswap32 opsAurelien Jarno
Use an inline version for the bswap16 and bswap32 ops to avoid testing for MIPS32R2 instructions availability, as these ops are only available in that case. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-09-03tcg/mips: detect available host instructions at runtimeAurelien Jarno
Now that TCG supports enabling and disabling ops at runtime, it's possible to detect the available host instructions at runtime, and enable the corresponding ops accordingly. Unfortunately it's not easy to probe for available instructions on MIPS, the information is partially available in /proc/cpuinfo, and not available in AUXV. This patch therefore probes for the instructions by trying to execute them and by catching a possible SIGILL signal. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-09-02tcg-i386: Make use of zero-extended memory helper routinesRichard Henderson
For 8 and 16-bit unsigned loads, rely on the zero-extension from the helper and use a smaller 32-bit move insn. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Introduce zero and sign-extended versions of load helpersRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02exec: Split softmmu_defs.hRichard Henderson
The _cmmu helpers can be moved to exec-all.h. The helpers that are used from TCG will shortly need access to tcg_target_long so move their declarations into tcg.h. This requires minor include adjustments to all TCG backends. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg-i386: Don't perform GETPC adjustment in TCG codeRichard Henderson
Since we now perform it inside the helper, no need to do it here. This also lets us perform a tail-call from the store slow path to the helper. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg-i386: Adjust tcg_out_tlb_load for x32Richard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg-i386: Use intptr_t appropriatelyRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Fix jit debug for x32Richard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Use appropriate types in tcg_reg_alloc_callRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson
And update all users. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Use uintptr_t in TCGHelperInfoRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change memory offsets to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change frame pointer offsets to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Define TCG_ptr properlyRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Define TCG_TYPE_PTR properlyRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Allow TCG_TARGET_REG_BITS to be specified independantlyRichard Henderson
There are several hosts for which it would be useful to use the available 64-bit registers in a 32-bit pointer environment. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_qemu_tb_exec return to uintptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Constant fold div, remRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg-ppc64: Implement muluh, mulshRichard Henderson
Using these instead of mulu2 and muls2 lets us avoid having to argument overlap analysis in the backend. Normal register allocation will DTRT. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg-mips: Implement mulsh, muluhRichard Henderson
With the optimization in tcg_liveness_analysis, we can avoid the MFLO when it is unused. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson
Use them in places where mulu2 and muls2 are used. Optimize mulx2 with dead low part to mulxh. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-01tci: Remove function tcg_out64 (fix broken build)Stefan Weil
Commit ac26eb69a311396668809eadbf7ff4e623447d4c added tcg_out64 to tcg/tcg.c. tcg/tci/tcg-target.c already had a nearly identical implementation which is now removed to fix a compiler error. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-08-26tcg-i386: Use new return-argument ld/st helpersRichard Henderson
Discontinue the jump-around-jump-to-jump scheme, trading it for a single immediate move instruction. The two extra jumps always consume 7 bytes, whereas the immediate move is either 5 or 7 bytes depending on where the code_gen_buffer gets located. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-08-26tcg-i386: Tidy qemu_ld/st slow pathRichard Henderson
Use existing stack space for arguments; don't push/pop. Use less ifdefs and more C ifs. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-08-26tcg-i386: Try pc-relative lea for constant formationRichard Henderson
Use a 7 byte lea before the ultimate 10 byte movq. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-08-26tcg-i386: Add and use tcg_out64Richard Henderson
No point in splitting the write into 32-bit pieces. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-08-26tcg: Tidy generated code for tcg_outNRichard Henderson
Aliasing was forcing s->code_ptr to be re-read after the store. Keep the pointer in a local variable to help the compiler. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-08-08tcg/mips: fix invalid op definition errorsJames Hogan
tcg/mips/tcg-target.h defines various operations conditionally depending upon the isa revision, however these operations are included in mips_op_defs[] unconditionally resulting in the following runtime errors if CONFIG_DEBUG_TCG is defined: Invalid op definition for movcond_i32 Invalid op definition for rotl_i32 Invalid op definition for rotr_i32 Invalid op definition for deposit_i32 Invalid op definition for bswap16_i32 Invalid op definition for bswap32_i32 tcg/tcg.c:1196: tcg fatal error Fix with ifdefs like the i386 backend does for movcond_i32. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-30tci: Fix broken build (compiler warning caused by redefined macro BIT)Stefan Weil
The definition of macro BIT in tci/tcg-target.c now conflicts with the definition of the same macro in includes qemu/bitops.h. This conflict was triggered by a recent change in the include chain of tcg.c (probably commit 949fc82314cc84162e64a5323764527a542421ce). Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-id: 1375216883-23969-1-git-send-email-sw@weilnetz.de Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15Merge git://github.com/hw-claudio/qemu-aarch64-queue into tcg-nextRichard Henderson
2013-07-15tcg/aarch64: Implement tlb lookup fast pathJani Kokkonen
Supports CONFIG_QEMU_LDST_OPTIMIZATION Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
2013-07-09tcg-arm: Implement tcg_register_jitRichard Henderson
Allows unwinding past the code_gen_buffer. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame sizeRichard Henderson
We can check the condition at compile time, rather than run time. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Move the CIE and FDE header definitions to common codeRichard Henderson
These will necessarily be the same layout for all hosts. This limits the amount of boilerplate required to implement jit debug for a host. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Fix high_pc fields in .debug_infoRichard Henderson
I don't think the debugger actually looks at this for anything, using the correct .debug_frame contents, but might as well get it all correct. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-arm: Use AT_PLATFORM to detect the host ISARichard Henderson
With this we can generate armv7 insns even when the OS compiles for a lower common denominator. The macros are arranged so that when we do compile for a given ISA, all of the runtime checks for that ISA are optimized away. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-arm: Simplify logic in detecting the ARM ISA in useRichard Henderson
GCC 4.8 defines a handy __ARM_ARCH symbol that we can use, which will make us nicely forward compatible with ARMv8 AArch32. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-arm: Rename use_armv5_instructions to use_armvt5_instructionsRichard Henderson
As it really controls the availability of a thumb interworking instruction on armv5t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-arm: Make use of conditional availability of opcodes for divideRichard Henderson
We can now detect and use divide instructions at runtime, rather than having to restrict their availability to compile-time. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Simplify logic using TCG_OPF_NOT_PRESENTRichard Henderson
Expand the definition of "not present" to include "should not be present". This means we can simplify the logic surrounding the generic tcg opcodes for which the host backend ought not be providing definitions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Allow non-constant control macrosRichard Henderson
This allows TCG_TARGET_HAS_* to be a variable rather than a constant, which allows easier support for differing ISA levels for the host. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-ppc64: Don't implement remRichard Henderson
Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg-ppc: Don't implement remRichard Henderson
Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-28 15:45:08 +0000