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2019-03-04s390x: Add floating-point extension facility to "qemu" cpu modelDavid Hildenbrand
2019-03-04s390x/tcg: Handle all rounding modes overwritten by BFP instructionsDavid Hildenbrand
2019-03-04s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDEDDavid Hildenbrand
2019-03-04s390x/tcg: Implement XxC and checks for most FP instructionsDavid Hildenbrand
2019-03-04s390x/tcg: Prepare for IEEE-inexact-exception control (XxC)David Hildenbrand
2019-03-04s390x/tcg: Refactor saving/restoring the bfp rounding modeDavid Hildenbrand
2019-03-04s390x/tcg: Check for exceptions in SET BFP ROUNDING MODEDavid Hildenbrand
2019-03-04s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modesDavid Hildenbrand
2019-03-04s390x/tcg: Fix simulated-IEEE exceptionsDavid Hildenbrand
2019-03-04s390x/tcg: Refactor SET FPC AND SIGNAL handlingDavid Hildenbrand
2019-03-04s390x/tcg: Hide IEEE underflows in some scenariosDavid Hildenbrand
2019-03-04s390x/tcg: Fix parts of IEEE exception handlingDavid Hildenbrand
2019-03-04s390x/tcg: Factor out conversion of softfloat exceptionsDavid Hildenbrand
2019-03-04s390x/tcg: Fix rounding from float128 to uint64_t/uint32_tDavid Hildenbrand
2019-03-04s390x/tcg: Fix TEST DATA CLASS instructionsDavid Hildenbrand
2019-03-04s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARYDavid Hildenbrand
2019-03-04s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFPDavid Hildenbrand
2019-03-04s390x/tcg: Factor out gen_addi_and_wrap_i64() from get_address()David Hildenbrand
2019-03-04s390x/tcg: Factor out vec_full_reg_offset()David Hildenbrand
2019-03-04s390x/tcg: Clarify terminology in vec_reg_offset()David Hildenbrand
2019-03-04s390x/tcg: Simplify disassembler operands initializationDavid Hildenbrand
2019-03-04s390x/tcg: RXE has an optional M3 fieldDavid Hildenbrand
2019-03-04s390x/tcg: Save vregs to extended mchk save areaDavid Hildenbrand
2019-03-04s390x: use a QEMU-style typedef + name for SIGP save area structDavid Hildenbrand
2019-03-04s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUSDavid Hildenbrand
2019-02-28Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into stagingPeter Maydell
2019-02-28Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190228-...Peter Maydell
2019-02-28Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-27-2019' ...Peter Maydell
2019-02-28target/xtensa: implement PREFCTL SRMax Filippov
2019-02-28target/xtensa: prioritize load/store in FLIX bundlesMax Filippov
2019-02-28target/xtensa: break circular register dependenciesMax Filippov
2019-02-28target/xtensa: reorganize access to boolean registersMax Filippov
2019-02-28target/xtensa: reorganize access to MAC16 registersMax Filippov
2019-02-28target/xtensa: reorganize register handling in translatorsMax Filippov
2019-02-28target/xtensa: only rotate window in the retw helperMax Filippov
2019-02-28target/xtensa: move WINDOW_BASE SR update to postprocessingMax Filippov
2019-02-28target/xtensa: add generic instruction post-processingMax Filippov
2019-02-28target/xtensa: sort FLIX instruction opcodesMax Filippov
2019-02-28target/arm: Enable ARMv8.2-FHM for -cpu maxRichard Henderson
2019-02-28target/arm: Implement VFMAL and VFMSL for aarch32Richard Henderson
2019-02-28target/arm: Implement FMLAL and FMLSL for aarch64Richard Henderson
2019-02-28target/arm: Add helpers for FMLALRichard Henderson
2019-02-28Revert "arm: Allow system registers for KVM guests to be changed by QEMU code"Peter Maydell
2019-02-28target/arm: Gate "miscellaneous FP" insns by ID register fieldPeter Maydell
2019-02-28target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructionsPeter Maydell
2019-02-28target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()Peter Maydell
2019-02-28target/arm/cpu: Allow init-svtor property to be set after realizePeter Maydell
2019-02-27target/mips: Preparing for adding MMI instructionsMateja Marjanovic
2019-02-26target/ppc: Basic POWER9 bare-metal radix MMU supportBenjamin Herrenschmidt
2019-02-26target/ppc: Support for POWER9 native hashBenjamin Herrenschmidt