| Age | Commit message (Expand) | Author |
|---|
| 2023-05-18 | Hexagon (target/hexagon) Remove log_reg_write from op_helper.[ch] | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add overrides for clr[tf]new | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add overrides for allocframe/deallocframe | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add overrides for loop setup instructions | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add v73 scalar instructions | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add v69 HVX instructions | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add v68 HVX instructions | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add v68 scalar instructions | Taylor Simpson |
| 2023-05-18 | Hexagon (target/hexagon) Add support for v68/v69/v71/v73 | Taylor Simpson |
| 2023-05-18 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging | Richard Henderson |
| 2023-05-18 | target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing | Peter Maydell |
| 2023-05-18 | target/arm: Convert ERET, ERETAA, ERETAB to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert BR, BLR, RET to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert conditional branch insns to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert TBZ, TBNZ to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert CBZ, CBNZ to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert unconditional branch immediate to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert Extract instructions to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert Bitfield to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Convert Move wide (immediate) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Convert Logical (immediate) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Replace bitmask64 with MAKE_64BIT_MASK | Richard Henderson |
| 2023-05-18 | target/arm: Convert Add/subtract (immediate with tags) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Convert Add/subtract (immediate) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Split gen_add_CC and gen_sub_CC | Richard Henderson |
| 2023-05-18 | target/arm: Convert PC-rel addressing to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder | Peter Maydell |
| 2023-05-18 | target/arm: Create decodetree skeleton for A64 | Peter Maydell |
| 2023-05-18 | target/arm: Split out disas_a64_legacy | Richard Henderson |
| 2023-05-18 | target/arm: add RAZ/WI handling for DBGDTR[TX|RX] | Alex Bennée |
| 2023-05-18 | arm/kvm: add support for MTE | Cornelia Huck |
| 2023-05-18 | target/arm: Fix vd == vm overlap in sve_ldff1_z | Richard Henderson |
| 2023-05-18 | target/i386: Fix exception classes for MOVNTPS/MOVNTPD. | Ricky Zhou |
| 2023-05-18 | target/i386: Fix exception classes for SSE/AVX instructions. | Ricky Zhou |
| 2023-05-18 | target/i386: Fix and add some comments next to SSE/AVX instructions. | Ricky Zhou |
| 2023-05-18 | target/i386: fix avx2 instructions vzeroall and vpermdq | Xinyu Li |
| 2023-05-18 | target/i386: fix operand size for VCOMI/VUCOMI instructions | Paolo Bonzini |
| 2023-05-18 | target/i386: add support for FB_CLEAR feature | Emanuele Giuseppe Esposito |
| 2023-05-18 | target/i386: add support for FLUSH_L1D feature | Emanuele Giuseppe Esposito |
| 2023-05-16 | target/s390x: Fix EXECUTE of relative branches | Ilya Leoshkevich |
| 2023-05-16 | s390x/tcg: Fix LDER instruction format | Ilya Leoshkevich |
| 2023-05-16 | hw/core: Use a callback for target specific query-cpus-fast information | Thomas Huth |
| 2023-05-13 | Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu i... | Richard Henderson |
| 2023-05-12 | target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size checkpull-target-arm-20230512 | Peter Maydell |
| 2023-05-12 | target/arm: Select CONFIG_ARM_V7M when TCG is enabled | Fabiano Rosas |
| 2023-05-12 | target/arm: Select SEMIHOSTING when using TCG | Fabiano Rosas |
| 2023-05-12 | target/arm: Fix handling of SW and NSW bits for stage 2 walks | Peter Maydell |
