peter.maydell/qemu-arm.git - This qemu repo is mostly a place to put together pull requests for upstream

Age	Commit message (Expand)	Author
2018-11-06	target/arm: Fix ATS1Hx instructionspull-target-arm-20181106	Peter Maydell
2018-11-06	target/arm: Set S and PTW in 64-bit PAR format	Peter Maydell
2018-11-06	target/arm: Remove can't-happen if() from handle_vec_simd_shli()	Peter Maydell
2018-11-02	target/arm: Conditionalize some asserts on aarch32 support	Richard Henderson
2018-11-02	Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf1' in...	Peter Maydell
2018-11-02	Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-3.1-pull-request' ...	Peter Maydell
2018-11-01	Merge remote-tracking branch 'remotes/rth/tags/pull-dt-20181031' into staging	Peter Maydell
2018-11-01	target/m68k: use EXCP_ILLEGAL instead of EXCP_UNSUPPORTED	Laurent Vivier
2018-10-31	decodetree: Remove "insn" argument from trans_* expanders	Richard Henderson
2018-10-30	i386: Add PKU on Skylake-Server CPU model	Tao Xu
2018-10-30	i386: Add new model of Cascadelake-Server	Tao Xu
2018-10-30	x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIES	Robert Hoo
2018-10-30	x86: Data structure changes to support MSR based features	Robert Hoo
2018-10-30	kvm: Add support to KVM_GET_MSR_FEATURE_INDEX_LIST and KVM_GET_MSRS system ioctl	Robert Hoo
2018-10-30	target/i386: Remove #ifdeffed-out icebp debugging hack	Peter Maydell
2018-10-30	i386: correct cpu_x86_cpuid(0xd)	Sebastian Andrzej Siewior
2018-10-30	target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64	Dayeol Lee
2018-10-29	target/mips: Amend MXU ASE overview note	Aleksandar Markovic
2018-10-29	target/mips: Move MXU_EN check one level higher	Aleksandar Markovic
2018-10-29	target/mips: Add emulation of MXU instructions S32LDD and S32LDDR	Craig Janeczek
2018-10-29	target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSU	Craig Janeczek
2018-10-29	target/mips: Add emulation of MXU instruction D16MAC	Craig Janeczek
2018-10-29	target/mips: Add emulation of MXU instruction D16MUL	Craig Janeczek
2018-10-29	target/mips: Add emulation of MXU instruction S8LDD	Craig Janeczek
2018-10-29	target/mips: Move MUL, S32M2I, S32I2M handling out of main MXU switch	Aleksandar Markovic
2018-10-29	target/mips: Add emulation of MXU instructions S32I2M and S32M2I	Craig Janeczek
2018-10-29	target/mips: Add emulation of non-MXU MULL within MXU decoding engine	Craig Janeczek
2018-10-29	target/mips: Add bit encoding for MXU operand getting pattern 'optn3'	Craig Janeczek
2018-10-29	target/mips: Add bit encoding for MXU operand getting pattern 'optn2'	Craig Janeczek
2018-10-29	target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2'	Aleksandar Markovic
2018-10-29	target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2'	Craig Janeczek
2018-10-29	target/mips: Add bit encoding for MXU accumulate add/sub 1-bit pattern 'aptn1'	Aleksandar Markovic
2018-10-29	target/mips: Add MXU decoding engine	Aleksandar Markovic
2018-10-29	target/mips: Add and integrate MXU decoding engine placeholder	Aleksandar Markovic
2018-10-29	target/mips: Amend MXU instruction opcodes	Aleksandar Markovic
2018-10-29	target/mips: Define a bit for MXU in insn_flags	Craig Janeczek
2018-10-29	target/mips: Introduce MXU registers	Craig Janeczek
2018-10-29	target/mips: Add two missing breaks for NM_LLWPE and NM_SCWPE decoder cases	Aleksandar Markovic
2018-10-25	target/mips: Add disassembler support for nanoMIPS	Aleksandar Markovic
2018-10-25	target/mips: Implement emulation of nanoMIPS EVA instructions	Dimitrije Nikolic
2018-10-25	target/mips: Add nanoMIPS CRC32 instruction pool	Aleksandar Markovic
2018-10-25	Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' in...	Peter Maydell
2018-10-24	Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-2018-part...	Peter Maydell
2018-10-24	target/mips: Fix decoding of ALIGN and DALIGN instructions	Aleksandar Markovic
2018-10-24	target/mips: Fix the title of translate.c	Aleksandar Markovic
2018-10-24	target/mips: Define the R5900 CPU	Fredrik Noring
2018-10-24	target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only	Fredrik Noring
2018-10-24	target/mips: Support R5900 MOVN, MOVZ and PREF instructions from MIPS IV	Fredrik Noring
2018-10-24	target/mips: Support R5900 DIV1 and DIVU1 instructions	Fredrik Noring
2018-10-24	target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions	Fredrik Noring