peter.maydell/qemu-arm.git - This qemu repo is mostly a place to put together pull requests for upstream

Age	Commit message (Expand)	Author
2020-04-07	target/xtensa: statically allocate xtensa_insnbufs in DisasContext	Max Filippov
2020-04-07	target/xtensa: fix pasto in pfwait.r opcode name	Max Filippov
2020-04-07	target/xtensa: add FIXME for translation memory leak	Alex Bennée
2020-01-15	tcg: Search includes from the project root source directory	Philippe Mathieu-Daudé
2020-01-06	target/xtensa: fix ps.ring use in MPU configs	Max Filippov
2019-10-28	target/xtensa: fetch code with translator_ld	Emilio G. Cota
2019-08-20	icount: remove unnecessary gen_io_end calls	Pavel Dovgalyuk
2019-08-16	Clean up inclusion of sysemu/sysemu.h	Markus Armbruster
2019-05-28	semihosting: move semihosting configuration into its own directory	Alex Bennée
2019-05-21	Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging	Peter Maydell
2019-05-15	target/xtensa: implement exclusive access option	Max Filippov
2019-05-15	target/xtensa: implement block prefetch option opcodes	Max Filippov
2019-05-14	target/xtensa: implement DIWBUI.P opcode	Max Filippov
2019-05-13	target/xtensa: Use tcg_gen_abs_i32	Richard Henderson
2019-05-10	target/xtensa: implement MPU option	Max Filippov
2019-05-10	target/xtensa: add parity/ECC option SRs	Max Filippov
2019-05-10	target/xtensa: get rid of centralized SR properties	Max Filippov
2019-04-24	tcg: Hoist max_insns computation to tb_gen_code	Richard Henderson
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster
2019-03-21	target/xtensa: fix break_dependency for repeated resources	Max Filippov
2019-02-28	target/xtensa: implement PREFCTL SR	Max Filippov
2019-02-28	target/xtensa: prioritize load/store in FLIX bundles	Max Filippov
2019-02-28	target/xtensa: break circular register dependencies	Max Filippov
2019-02-28	target/xtensa: reorganize access to boolean registers	Max Filippov
2019-02-28	target/xtensa: reorganize access to MAC16 registers	Max Filippov
2019-02-28	target/xtensa: reorganize register handling in translators	Max Filippov
2019-02-28	target/xtensa: only rotate window in the retw helper	Max Filippov
2019-02-28	target/xtensa: move WINDOW_BASE SR update to postprocessing	Max Filippov
2019-02-28	target/xtensa: add generic instruction post-processing	Max Filippov
2019-02-28	target/xtensa: sort FLIX instruction opcodes	Max Filippov
2019-02-18	target/xtensa: implement wide branches and loops	Max Filippov
2019-02-18	target/xtensa: allow multiple names for single opcode	Max Filippov
2019-02-18	target/xtensa: don't require opcode table sorting	Max Filippov
2019-02-11	target/xtensa: get rid of gen_callw[i]	Max Filippov
2019-02-10	target/xtensa: don't specify windowed registers manually	Max Filippov
2019-01-24	target/xtensa: fix access to the INTERRUPT SR	Max Filippov
2019-01-11	target/xtensa: rework zero overhead loops implementation	Max Filippov
2018-10-01	target/xtensa: extract gen_check_interrupts call	Max Filippov
2018-10-01	target/xtensa: make rsr/wsr helpers return void	Max Filippov
2018-10-01	target/xtensa: extract unconditional TB termination via slot 0	Max Filippov
2018-10-01	target/xtensa: always end TB on CCOUNT access/CCOMPARE write	Max Filippov
2018-10-01	target/xtensa: change SR number checks to assertions	Max Filippov
2018-10-01	target/xtensa: extract unconditional TB termination	Max Filippov
2018-10-01	target/xtensa: extract test for division by zero	Max Filippov
2018-10-01	target/xtensa: extract test for cpdisabled exception	Max Filippov
2018-10-01	target/xtensa: extract test for alloca exception	Max Filippov
2018-10-01	target/xtensa: extract test for window underflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for window overflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for debug exception	Max Filippov
2018-10-01	target/xtensa: extract test for syscall instruction	Max Filippov