| Age | Commit message (Expand) | Author |
|---|
| 2020-01-17 | target/arm: Set ISSIs16Bit in make_issinfopull-target-arm-20200117-1 | Richard Henderson |
| 2020-01-15 | tcg: Search includes from the project root source directory | Philippe Mathieu-Daudé |
| 2020-01-09 | target/arm: only update pc after semihosting completes | Alex Bennée |
| 2019-12-16 | target/arm: ensure we use current exception state after SCR updatepull-target-arm-20191216-1 | Alex Bennée |
| 2019-12-16 | target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 | Marc Zyngier |
| 2019-11-19 | target/arm: Relax r13 restriction for ldrex/strex for v8.0 | Richard Henderson |
| 2019-11-19 | target/arm: Do not reject rt == rt2 for strexd | Richard Henderson |
| 2019-10-24 | target/arm: Rebuild hflags for M-profile | Richard Henderson |
| 2019-10-24 | target/arm: Rebuild hflags at MSR writes | Richard Henderson |
| 2019-10-22 | target/arm: Fix sign-extension for SMLAL* | Richard Henderson |
| 2019-09-27 | target/arm: handle A-profile semihosting at translate time | Alex Bennée |
| 2019-09-27 | target/arm: handle M-profile semihosting at translate time | Alex Bennée |
| 2019-09-05 | target/arm: Inline gen_bx_im into callers | Richard Henderson |
| 2019-09-05 | target/arm: Clean up disas_thumb_insn | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, long branches | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, Unconditional branch | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, load (literal) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, shift immediate | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, Miscellaneous 16-bit instructions | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, Conditional branches, Supervisor call | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, push and pop | Richard Henderson |
| 2019-09-05 | target/arm: Split gen_nop_hint | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, nop hints | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, Reverse bytes | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, Change processor state | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16, extract | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 adjust sp (immediate) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 add, compare, move (two high registers) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 branch and exchange | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 one low register and immediate | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 add/sub (3 low, 2 low and imm) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 load/store multiple | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 add pc/sp (immediate) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 load/store (immediate offset) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 load/store (register offset) | Richard Henderson |
| 2019-09-05 | target/arm: Convert T16 data-processing (two low regs) | Richard Henderson |
| 2019-09-05 | target/arm: Add skeleton for T16 decodetree | Richard Henderson |
| 2019-09-05 | target/arm: Simplify disas_arm_insn | Richard Henderson |
| 2019-09-05 | target/arm: Simplify disas_thumb2_insn | Richard Henderson |
| 2019-09-05 | target/arm: Convert TT | Richard Henderson |
| 2019-09-05 | target/arm: Convert SG | Richard Henderson |
| 2019-09-05 | target/arm: Convert Table Branch | Richard Henderson |
| 2019-09-05 | target/arm: Convert Unallocated memory hint | Richard Henderson |
| 2019-09-05 | target/arm: Convert PLI, PLD, PLDW | Richard Henderson |
| 2019-09-05 | target/arm: Convert SETEND | Richard Henderson |
| 2019-09-05 | target/arm: Convert CPS (privileged) | Richard Henderson |
| 2019-09-05 | target/arm: Convert Clear-Exclusive, Barriers | Richard Henderson |
| 2019-09-05 | target/arm: Convert RFE and SRS | Richard Henderson |
| 2019-09-05 | target/arm: Convert SVC | Richard Henderson |
| 2019-09-05 | target/arm: Convert B, BL, BLX (immediate) | Richard Henderson |
