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path: root/target-tilegx/translate.c
AgeCommit message (Expand)Author
2015-10-07target-tilegx: Implement table index instructionsRichard Henderson
2015-10-07target-tilegx: Implement crc instructionsRichard Henderson
2015-10-07target-tilegx: Implement v1multu instructionChen Gang
2015-10-07target-tilegx: Implement v*add and v*sub instructionsChen Gang
2015-10-07target-tilegx: Implement v*shl, v*shru, and v*shrs instructionsChen Gang
2015-09-15target-tilegx: Handle v1shl, v1shru, v1shrsRichard Henderson
2015-09-15target-tilegx: Handle v1shli, v1shruiRichard Henderson
2015-09-15target-tilegx: Handle v4int_l/hRichard Henderson
2015-09-15target-tilegx: Handle atomic instructionsRichard Henderson
2015-09-15target-tilegx: Handle mtspr, mfsprRichard Henderson
2015-09-15target-tilegx: Handle v1cmpeq, v1cmpneRichard Henderson
2015-09-15target-tilegx: Handle mask instructionsRichard Henderson
2015-09-15target-tilegx: Handle scalar multiply instructionsRichard Henderson
2015-09-15target-tilegx: Handle conditional move instructionsRichard Henderson
2015-09-15target-tilegx: Handle shift instructionsRichard Henderson
2015-09-15target-tilegx: Handle bitfield instructionsRichard Henderson
2015-09-15target-tilegx: Implement system and memory management instructionsRichard Henderson
2015-09-15target-tilegx: Handle comparison instructionsRichard Henderson
2015-09-15target-tilegx: Handle conditional branch instructionsRichard Henderson
2015-09-15target-tilegx: Handle unconditional jump instructionsRichard Henderson
2015-09-15target-tilegx: Handle post-increment load and store instructionsRichard Henderson
2015-09-15target-tilegx: Handle basic load and store instructionsRichard Henderson
2015-09-15target-tilegx: Handle most bit manipulation instructionsRichard Henderson
2015-09-15target-tilegx: Handle arithmetic instructionsRichard Henderson
2015-09-15target-tilegx: Handle simple logical operationsRichard Henderson
2015-09-15target-tilegx: Framework for decoding bundlesRichard Henderson