aboutsummaryrefslogtreecommitdiff
path: root/target-i386
AgeCommit message (Expand)Author
2016-01-21Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into st...Peter Maydell
2016-01-21target-i386: Add PKU and and OSPKE supportHuaitong Han
2016-01-21target-i386: Add support to migrate vcpu's TSC rateHaozhong Zhang
2016-01-21target-i386: Reorganize TSC rate setting codeHaozhong Zhang
2016-01-21target-i386: Fallback vcpu's TSC rate to value returned by KVMHaozhong Zhang
2016-01-21target-i386: Add suffixes to MMReg struct fieldsEduardo Habkost
2016-01-21target-i386: Define MMREG_UNION macroEduardo Habkost
2016-01-21target-i386: Define MMXReg._d fieldEduardo Habkost
2016-01-21target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_*Eduardo Habkost
2016-01-21target-i386: Rename struct XMMReg to ZMMRegEduardo Habkost
2016-01-21target-i386: Use a _q array on MMXReg tooEduardo Habkost
2016-01-21target-i386/ops_sse.h: Use MMX_Q macroEduardo Habkost
2016-01-21target-i386: Rename optimize_flags_init()Eduardo Habkost
2016-01-21exec.c: Allow target CPUs to define multiple AddressSpacesPeter Maydell
2016-01-21exec.c: Don't set cpu->as until cpu_address_space_initPeter Maydell
2016-01-15target-i386: do not duplicate page protection checksPaolo Bonzini
2015-12-17target-i386: kvm: clear unusable segments' flags in migrationMichael Chapman
2015-12-17kvm: x86: add support for KVM_CAP_SPLIT_IRQCHIPPaolo Bonzini
2015-12-17target-i386/kvm: Hyper-V SynIC timers MSR's supportAndrey Smetanin
2015-12-17target-i386/hyperv: Hyper-V SynIC SINT routing and vcpu exitAndrey Smetanin
2015-12-17target-i386/kvm: Hyper-V SynIC MSR's supportAndrey Smetanin
2015-11-26target-i386: kvm: Print warning when clearing mcg_cap bitsEduardo Habkost
2015-11-26target-i386: kvm: Use env->mcg_cap when setting up MCEEduardo Habkost
2015-11-26target-i386: kvm: Abort if MCE bank count is not supported by hostEduardo Habkost
2015-11-17target-i386: Disable rdtscp on Opteron_G* CPU modelsEduardo Habkost
2015-11-17target-i386: Fix mulx for identical target regsRichard Henderson
2015-11-06target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURESXiao Guangrong
2015-11-06target-i386: tcg: Check right CPUID bits for clflushopt/pcommitEduardo Habkost
2015-11-06target-i386: tcg: Accept clwb instructionEduardo Habkost
2015-11-05target-i386: Enable clflushopt/clwb/pcommit instructionsXiao Guangrong
2015-11-05target-i386: Remove POPCNT from qemu64 and qemu32 CPU modelsEduardo Habkost
2015-11-05target-i386: Remove ABM from qemu64 CPU modelEduardo Habkost
2015-11-05target-i386: Remove SSE4a from qemu64 CPU modelEduardo Habkost
2015-11-05kvmclock: add a new function to update env->tsc.Liang Li
2015-11-04osdep: Rename qemu_{get, set}_version() to qemu_{, set_}hw_version()Eduardo Habkost
2015-11-04target-i386: fix pcmpxstrx equal-ordered (strstr) modePaolo Bonzini
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson
2015-10-27target-i386: Enable "check" mode by defaultEduardo Habkost
2015-10-27target-i386: Don't left shift negative constantEduardo Habkost
2015-10-23target-i386: Use 1UL for bit shiftEduardo Habkost
2015-10-23target-i386: Add DE to TCG_FEATURESEduardo Habkost
2015-10-23target-i386: Ensure always-1 bits on DR6 can't be clearedEduardo Habkost
2015-10-23target-i386: Check CR4[DE] for processing DR4/DR5Richard Henderson
2015-10-23target-i386: Handle I/O breakpointsEduardo Habkost
2015-10-23target-i386: Optimize setting dr[0-3]Richard Henderson
2015-10-23target-i386: Move hw_*breakpoint_* functionsRichard Henderson
2015-10-23target-i386: Ensure bit 10 on DR7 is never clearedEduardo Habkost
2015-10-23target-i386: Re-introduce optimal breakpoint removalRichard Henderson
2015-10-23target-i386: Introduce cpu_x86_update_dr7Richard Henderson
2015-10-23target-i386: Disable cache info passthrough by defaultEduardo Habkost
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-23 11:11:10 +0000