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2014-11-24apic: avoid getting out of halted state on masked PIC interruptsPaolo Bonzini
After the next patch, if a masked PIC interrupts causes CPU_INTERRUPT_POLL to be set, the CPU will spuriously get out of halted state. While this is technically valid, we should avoid that. Make CPU_INTERRUPT_POLL run apic_update_irq in the right thread and then look at CPU_INTERRUPT_HARD. If CPU_INTERRUPT_HARD does not get set, do not report the CPU as having work. Also move the handling of software-disabled APIC from apic_update_irq to apic_irq_pending, and always trigger CPU_INTERRUPT_POLL. This will be important once we will add a case that resets CPU_INTERRUPT_HARD from apic_update_irq. We want to run it even if we go through CPU_INTERRUPT_POLL, and even if the local APIC is software disabled. Reported-by: Richard Bilson <rbilson@qnx.com> Tested-by: Richard Bilson <rbilson@qnx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-11Merge remote-tracking branch ↵Peter Maydell
'remotes/mjt/tags/pull-trivial-patches-2014-11-11' into staging trivial patches for 2014-11-11 # gpg: Signature made Tue 11 Nov 2014 14:38:39 GMT using RSA key ID A4C3D7DB # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" * remotes/mjt/tags/pull-trivial-patches-2014-11-11: block: Fix comment for bdrv_co_get_block_status sysbus: Correct SYSTEM_BUS(obj) defines target-i386: cpu: keeping function parameters alignment on new line xen-hvm: Remove redundant variable 'xstate' coroutine-sigaltstack: Change jmp_buf to sigjmp_buf pc-bios: petalogix-s3adsp1800.dtb: Use 'xlnx, xps-ethernetlite-2.00.a' instead of 'xlnx, xps-ethernetlite-2.00.b' gdbstub: Add a missing case of signal number translation in gdbstub numa: make 'info numa' take into account hotplugged memory slirp/smbd: modify/set several parameters in generated smbd.conf qemu-doc.texi: fix typos in x509 examples icc_bus: fix typo ICC_BRIGDE -> ICC_BRIDGE Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-11target-i386: cpu: keeping function parameters alignment on new lineChen Fan
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-11-04target-i386: Disable SVM by default in KVM modeEduardo Habkost
Make SVM be disabled by default on all CPU models when in KVM mode. Nested SVM is enabled by default in the KVM kernel module, but it is probably less stable than nested VMX (which is already disabled by default). Add a new compat function, x86_cpu_compat_kvm_no_autodisable(), to keep compatibility on previous machine-types. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-11-04target-i386: Don't enable nested VMX by defaultEduardo Habkost
TCG doesn't support VMX, and nested VMX is not enabled by default in the KVM kernel module. So, there's no reason to have VMX enabled by default on the core2duo and coreduo CPU models, today. Even the newer Intel CPU model definitions don't have it enabled. In this case, we need machine-type compat code, as people may be running the older machine-types on hosts that had VMX nesting enabled. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-11-04target-i386: Remove unsupported bits from all CPU modelsEduardo Habkost
The following CPU features were never supported by neither TCG or KVM, so they are useless on the CPU model definitions, today: * CPUID_DTS (DS) * CPUID_HT * CPUID_TM * CPUID_PBE * CPUID_EXT_DTES64 * CPUID_EXT_DSCPL * CPUID_EXT_EST * CPUID_EXT_TM2 * CPUID_EXT_XTPR * CPUID_EXT_PDCM * CPUID_SVM_LBRV As using "enforce" mode is the only way to ensure guest ABI doesn't change when moving to a different host, we should make "enforce" mode the default or at least encourage management software to always use it. In turn, to make "enforce" usable, we need CPU models that work without always requiring some features to be explicitly disabled. This patch removes the above features from all CPU model definitions. We won't need any machine-type compat code for those changes, because it is impossible to have existing VMs with those features enabled. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-11-04target-i386: Disable CPUID_ACPI by default in KVM modeEduardo Habkost
KVM never supported the CPUID_ACPI flag, so it doesn't make sense to have it enabled by default when KVM is enabled. The motivation here is exactly the same we had for the MONITOR flag (disabled by commit 136a7e9a85d7047461f8153f7d12c514a3d68f69). And like in the MONITOR flag case, we don't need machine-type compat code because it is currently impossible to run a KVM VM with the ACPI flag set. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-11-03target-i386: Rename KVM auto-feature-enable compat functionEduardo Habkost
The x86_cpu_compat_disable_kvm_features() name was a bit confusing, as it won't forcibly disable the feature for all CPU models (i.e. add it to kvm_default_unset_features), but it will instead turn off the KVM auto-enabling of the feature (i.e. remove it from kvm_default_features), meaning the feature may still be enabled by default in some CPU models). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-11-02target-i386: Remove unused model_features_t structEduardo Habkost
The struct is not used anymore and can be removed. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-10-24target-i386: add Intel AVX-512 supportChao Peng
Add AVX512 feature bits, register definition and corresponding xsave/vmstate support. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-10-23target-i386: warns users when CPU threads>1 for non-Intel CPUsWei Huang
Only Intel CPUs support hyperthreading. When users select threads>1 in -smp option, QEMU fixes it by adjusting CPUID_0000_0001_EBX and CPUID_8000_0008_ECX based on inputs (sockets, cores, threads); so guest VM can boot correctly. However it is still better to gives users a warning when such case happens. Signed-off-by: Wei Huang <wei@redhat.com> [As suggested by Eduardo, check for !IS_INTEL instead of AMD. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-09-26Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
Usual mix of patches, the most important being Alex and Marcelo's kvmclock fix. This was reverted last minute for 2.1, but it is now back with the problematic case fixed. Note: I will soon switch to a subkey for signing purposes. To verify future signed pull requests from me, please update my key with "gpg --recv-keys 9B4D86F2". You should see 3 new subkeys---the one for signing will be a 2048-bit RSA key, 4E6B09D7. # gpg: Signature made Fri 26 Sep 2014 15:34:44 BST using RSA key ID 9B4D86F2 # gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>" # gpg: aka "Paolo Bonzini <bonzini@gnu.org>" * remotes/bonzini/tags/for-upstream: kvm/valgrind: don't mark memory as initialized po: fix conflict with %.mo rule in rules.mak kvmvapic: fix migration when VM paused and when not running Windows serial: check if backed by a physical serial port at realize time serial: reset state at startup target-i386: update fp status fix hw/dma/i8257: Silence phony error message kvmclock: Ensure time in migration never goes backward kvmclock: Ensure proper env->tsc value for kvmclock_current_nsec calculation Introduce cpu_clean_all_dirty pit: fix pit interrupt can't inject into vm after migration Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-25target-i386: Use cpu_exec_interrupt qom hookRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 1410626734-3804-23-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-25target-i386: Use cpu_exec_enter/exit qom hooksRichard Henderson
Note that the code that was within the "exit" ifdef block was identical to the cpu_compute_eflags inline, so make that simplification at the same time. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1410626734-3804-4-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-18target-i386: update fp status fixPavel Dovgalyuk
This patch introduces cpu_set_fpuc() function, which changes fpuc field of the CPU state and calls update_fp_status() function. These calls update status of softfloat library and prevent bugs caused by non-coherent rounding settings of the FPU and softfloat. v2 changes: * Added missed calls and intoduced setter function (as suggested by TeLeMan) Reviewed-by: TeLeMan <geleman@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>
2014-09-12cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell
Make the debug_excp_handler target specific hook into a QOM CPU method. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-05target-i386: Reject invalid CPU feature names on the command-lineEduardo Habkost
Instead of simply printing a warning, report an error when invalid CPU options are provided on the CPU model string. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-09-05target-i386: Support migratable=no properlyEduardo Habkost
When the "migratable" property was implemented, the behavior was tested by changing the default on the code, but actually using the option on the command-line (e.g. "-cpu host,migratable=false") doesn't work as expected. This is a regression for a common use case of "-cpu host", which is to enable features that are supported by the host CPU + kernel before feature-specific code is added to QEMU. Fix this by initializing the feature words for "-cpu host" on x86_cpu_parse_featurestr(), right after parsing the CPU options. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Cc: qemu-stable@nongnu.org Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-08-26target-i386: Add "tsc_adjust" CPU feature nameEduardo Habkost
tsc_adjust migration support is already implemented (commit f28558d3d37ad3bc4e35e8ac93f7bf81a0d5622c), so we can add it to the list of known feature names. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-08-26target-i386: Add "mpx" CPU feature nameEduardo Habkost
Migration support for MPX is already implemented (commit 79e9ebebbf2a00c46fcedb6dc7dd5e12bbd30216), so we can add it to the list of known feature names. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-08-25x86: Clear MTRRs on vCPU resetAlex Williamson
The SDM specifies (June 2014 Vol3 11.11.5): On a hardware reset, the P6 and more recent processors clear the valid flags in variable-range MTRRs and clear the E flag in the IA32_MTRR_DEF_TYPE MSR to disable all MTRRs. All other bits in the MTRRs are undefined. We currently do none of that, so whatever MTRR settings you had prior to reset is what you have after reset. Usually this doesn't matter because KVM often ignores the guest mappings and uses write-back anyway. However, if you have an assigned device and an IOMMU that allows NoSnoop for that device, KVM defers to the guest memory mappings which are now stale after reset. The result is that OVMF rebooting on such a configuration takes a full minute to LZMA decompress the firmware volume, a process that is nearly instant on the initial boot. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-08-09target-i386/cpu.c: Fix two error output indentationchenfan
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-07-10target-i386: Add "kvmclock-stable-bit" feature bit nameEduardo Habkost
KVM_FEATURE_CLOCKSOURCE_STABLE_BIT is enabled by default and supported by KVM. But not having a name defined makes QEMU treat it as an unknown and unmigratable feature flag (as any unknown feature may possibly require state to be migrated), and disable it by default on "-cpu host". As a side-effect, the new name also makes the flag configurable, allowing the user to disable it (which may be useful for testing or for compatibility with old kernels). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-25target-i386: Broadwell CPU modelEduardo Habkost
This adds a new CPU model named "Broadwell". It has all the features from Haswell, plus PREFETCHW, RDSEED, ADX, SMAP. PREFETCHW was already supported as "3dnowprefetch". RDSEED, ADX was added on Linux v3.15-rc1. SMAP was added on Linux v3.15-rc2. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Cc: Wang, Yong Y <yong.y.wang@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Dugger, Donald D <donald.d.dugger@intel.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Fix indentation of CPU model definitionsEduardo Habkost
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Support "invariant tsc" flagMarcelo Tosatti
Expose "Invariant TSC" flag, if KVM is enabled. From Intel documentation: 17.13.1 Invariant TSC The time stamp counter in newer processors may support an enhancement, referred to as invariant TSC. Processor’s support for invariant TSC is indicated by CPUID.80000007H:EDX[8]. The invariant TSC will run at a constant rate in all ACPI P-, C-. and T-states. This is the architectural behavior moving forward. On processors with invariant TSC support, the OS may use the TSC for wall clock timer services (instead of ACPI or HPET timers). TSC reads are much more efficient and do not incur the overhead associated with a ring transition or access to a platform resource. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> [ehabkost: redo feature filtering to use .tcg_features] [ehabkost: add CPUID_APM_INVTSC macro, add it to .unmigratable_flags] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Set migratable=yes by default on "host" CPU mooelEduardo Habkost
Having only migratable flags reported by default on the "host" CPU model is safer for the following reasons: * Existing users may expect "-cpu host" to be migration-safe, if they take care of always using compatible host CPUs, host kernels, and QEMU versions. * Users who don't care aboug migration and want to enable all features supported by the host kernel can simply change their setup to use migratable=no. Without this change, people using "-cpu host" will stop being able to migrate, because now "invtsc" is getting enabled by default. We are not setting migratable=yes by default on all X86CPU subclasses, because users should be able to get non-migratable features enabled if they ask for them explicitly. Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Add "migratable" property to "host" CPU modelEduardo Habkost
This flag will allow the user to choose between two modes: * All flags that can be enabled on the host, even if unmigratable (migratable=no); * All flags that can be enabled on the host, are known to QEMU and migratable (migratable=yes). The default is still migratable=false, to keep current behavior, but this will be changed to migratable=true by another patch. My plan was to support the "migratable" flag on all CPU classes, but have the default to "false" on all CPU models except "host". However, DeviceClass has no mechanism to allow a child class to have a different property default from the parent class yet, so by now only the "host" CPU model will support the "migratable" flag. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Support check/enforce flags in TCG mode, tooEduardo Habkost
If enforce/check is specified in TCG mode, QEMU will ensure all CPU features are supported by TCG, so no CPU feature is silently disabled. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Be explicit about TCG vs. !KVM] Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Loop-based feature word filtering in TCG modeEduardo Habkost
Instead of manually filtering each feature word, add a tcg_features field to FeatureWordInfo, and use that field to filter all feature words in TCG mode. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Loop-based copying and setting/unsetting of feature wordsEduardo Habkost
Now that we have the feature word arrays, we don't need to manually copy each array item, we can simply iterate through each feature word. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Define TCG_*_FEATURES earlier in cpu.cEduardo Habkost
Those macros will be used in the feature_word_info array data, so need to be defined earlier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Filter KVM and 0xC0000001 features on TCGEduardo Habkost
TCG doesn't support any of the feature flags on FEAT_KVM and FEAT_C000_0001_EDX feature words, so clear all bits on those feature words. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Filter FEAT_7_0_EBX TCG features tooEduardo Habkost
The TCG_7_0_EBX_FEATURES macro was defined but never used (it even had a typo that was never noticed). Make the existing TCG feature filtering code use it. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Make TCG feature filtering more readableEduardo Habkost
Instead of an #ifdef in the middle of the code, just set TCG_EXT2_FEATURES to a different value depending on TARGET_X86_64. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Isolate KVM-specific code on CPU feature filtering logicEduardo Habkost
This will allow us to re-use the feature filtering logic (and the check/enforce flag logic) for TCG. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Pass FeatureWord argument to report_unavailable_features()Eduardo Habkost
This will help us simplify the code that calls report_unavailable_features() later. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Merge feature filtering/checking functionsEduardo Habkost
Merge filter_features_for_kvm() and kvm_check_features_against_host(). Both functions made exactly the same calculations, the only difference was that filter_features_for_kvm() changed the bits on cpu->features[], and kvm_check_features_against_host() did error reporting. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: Simplify reporting of unavailable featuresEduardo Habkost
Instead of checking and calling unavailable_host_feature() once for each bit, simply call the function (now renamed to report_unavailable_features()) once for each feature word. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Drop unused return value] Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-25target-i386: kvm: Don't enable MONITOR by default on any CPU modelEduardo Habkost
KVM never supported the MONITOR flag so it doesn't make sense to have it enabled by default when KVM is enabled. The rationale here is similar to the cases where it makes sense to have a feature enabled by default on all CPU models when on KVM mode (e.g. x2apic). In this case we are having a feature disabled by default for the same reasons. In this case we don't need machine-type compat code because it is currently impossible to run a KVM VM with the MONITOR flag set. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-06-10cpu/x86: correctly set errors in x86_cpu_parse_featurestrPaolo Bonzini
Because of the "goto out", the contents of local_err are leaked and lost. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-05Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell
* remotes/bonzini/softmmu-smap: (33 commits) target-i386: cleanup x86_cpu_get_phys_page_debug target-i386: fix protection bits in the TLB for SMEP target-i386: support long addresses for 4MB pages (PSE-36) target-i386: raise page fault for reserved bits in large pages target-i386: unify reserved bits and NX bit check target-i386: simplify pte/vaddr calculation target-i386: raise page fault for reserved physical address bits target-i386: test reserved PS bit on PML4Es target-i386: set correct error code for reserved bit access target-i386: introduce support for 1 GB pages target-i386: introduce do_check_protect label target-i386: tweak handling of PG_NX_MASK target-i386: commonize checks for PAE and non-PAE target-i386: commonize checks for 4MB and 4KB pages target-i386: commonize checks for 2MB and 4KB pages target-i386: fix coding standards in x86_cpu_handle_mmu_fault target-i386: simplify SMAP handling in MMU_KSMAP_IDX target-i386: fix kernel accesses with SMAP and CPL = 3 target-i386: move check_io helpers to seg_helper.c target-i386: rename KSMAP to KNOSMAP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05target-i386: support long addresses for 4MB pages (PSE-36)Paolo Bonzini
4MB pages can use 40-bit addresses by putting the higher 8 bits in bits 20-13 of the PDE. Bit 21 is reserved. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: introduce support for 1 GB pagesPaolo Bonzini
Given the simplifications to the code in the previous patches, this is now very simple to do. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-03kvm: Enable -cpu option to hide KVMAlex Williamson
The latest Nvidia driver (337.88) specifically checks for KVM as the hypervisor and reports Code 43 for the driver in a Windows guest when found. Removing or changing the KVM signature is sufficient for the driver to load and work. This patch adds an option to easily allow the KVM hypervisor signature to be hidden using '-cpu kvm=off'. We continue to expose KVM via the cpuid value by default. The state of this option does not supercede or replace -enable-kvm or the accel=kvm machine option. This only changes the visibility of KVM to the guest and paravirtual features specifically tied to the KVM cpuid. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-13target-i386: preserve FPU and MSR state on INITPaolo Bonzini
Most MSRs, plus the FPU, MMX, MXCSR, XMM and YMM registers should not be zeroed on INIT (Table 9-1 in the Intel SDM). Copy them out of CPUX86State and back in, instead of special casing env->pat. The relevant fields are already consecutive except PAT and SMBASE. However: - KVM and Hyper-V MSRs should be reset because they include memory locations written by the hypervisor. These MSRs are moved together at the end of the preserved area. - SVM state can be moved out of the way since it is written by VMRUN. Cc: Andreas Faerber <afaerber@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-13target-i386: fix set of registers zeroed on resetPaolo Bonzini
BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they should be (Intel Instruction Set Extensions Programming Reference 319433-015, pages 9-4 and 9-6). Same for YMM. XCR0 should be reset to 1. TSC and TSC_RESET were zeroed already by the memset, remove the explicit assignments. Cc: Andreas Faerber <afaerber@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-13kvm: reset state from the CPU's reset methodPaolo Bonzini
Now that we have a CPU object with a reset method, it is better to keep the KVM reset close to the CPU reset. Using qemu_register_reset as we do now keeps them far apart. With this patch, PPC no longer calls the kvm_arch_ function, so it can get removed there. Other arches call it from their CPU reset handler, and the function gets an ARMCPU/X86CPU/S390CPU. Note that ARM- and s390-specific functions are called kvm_arm_* and kvm_s390_*, while x86-specific functions are called kvm_arch_*. That follows the convention used by the different architectures. Changing that is the topic of a separate patch. Reviewed-by: Gleb Natapov <gnatapov@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-05qom: Clean up fragile use of error_is_set() in set() methodsMarkus Armbruster
Using error_is_set(ERRP) to find out whether a function failed is either wrong, fragile, or unnecessarily opaque. It's wrong when ERRP may be null, because errors go undetected when it is. It's fragile when proving ERRP non-null involves a non-local argument. Else, it's unnecessarily opaque (see commit 84d18f0). I guess the error_is_set(errp) in the ObjectProperty set() methods are merely fragile right now, because I can't find a call chain that passes a null errp argument. Make the code more robust and more obviously correct: receive the error in a local variable, then propagate it through the parameter. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-27target-i386: Add missing 'static' and 'const' attributesStefan Weil
This fixes warnings from the static code analysis (smatch). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>