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AgeCommit message (Expand)Author
2012-07-12target-arm: Add support for long format translation table walksPeter Maydell
2012-07-12target-arm: Implement TTBCR changes for LPAEPeter Maydell
2012-07-12target-arm: Implement long-descriptor PAR formatPeter Maydell
2012-07-12target-arm: Use target_phys_addr_t in get_phys_addr()Peter Maydell
2012-07-12target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAEPeter Maydell
2012-07-12target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAEPeter Maydell
2012-07-12target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registersPeter Maydell
2012-07-12target-arm: Extend feature flags to 64 bitsPeter Maydell
2012-07-12target-arm: Implement privileged-execute-never (PXN)Peter Maydell
2012-07-12ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bitsPeter Maydell
2012-07-12target-arm: Fix TCG temp handling in 64 bit cp writesPeter Maydell
2012-07-12target-arm: Fix some copy-and-paste errors in cp register namesPeter Maydell
2012-07-12target-arm: Fix typo that meant TTBR1 accesses went to TTBR0Peter Maydell
2012-07-12target-arm: Fix CP15 based WFIPaul Brook
2012-06-20target-arm: Remove ARM_CPUID_* macrosPeter Maydell
2012-06-20target-arm: Remove remaining old cp15 infrastructurePeter Maydell
2012-06-20target-arm: Move block cache ops to new cp15 frameworkPeter Maydell
2012-06-20target-arm: Remove c0_cachetype CPUARMState fieldPeter Maydell
2012-06-20target-arm: Convert final ID registersPeter Maydell
2012-06-20target-arm: Convert MPIDRPeter Maydell
2012-06-20target-arm: Convert cp15 cache ID registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=1 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=9 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=6 registersPeter Maydell
2012-06-20target-arm: convert cp15 crn=7 registersPeter Maydell
2012-06-20target-arm: Convert cp15 VA-PA translation registersPeter Maydell
2012-06-20target-arm: Convert cp15 MMU TLB controlPeter Maydell
2012-06-20target-arm: Convert cp15 crn=15 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=10 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=13 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=2 registersPeter Maydell
2012-06-20target-arm: Convert MMU fault status cp15 registersPeter Maydell
2012-06-20target-arm: Convert cp15 c3 registerPeter Maydell
2012-06-20target-arm: Convert generic timer cp15 regsPeter Maydell
2012-06-20target-arm: Convert performance monitor registersPeter Maydell
2012-06-20target-arm: Convert TLS registersPeter Maydell
2012-06-20target-arm: Convert WFI/barriers special cases to cp_reginfoPeter Maydell
2012-06-20target-arm: Convert TEECR, TEEHBR to new schemePeter Maydell
2012-06-20target-arm: Convert debug registers to cp_reginfoPeter Maydell
2012-06-20target-arm: Add register_cp_regs_for_features()Peter Maydell
2012-06-20target-arm: Remove old cpu_arm_set_cp_io infrastructurePeter Maydell
2012-06-20target-arm: initial coprocessor register frameworkPeter Maydell
2012-06-20target-arm: Fix 11MPCore cache type register valuePeter Maydell
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini
2012-06-04Kill off cpu_state_reset()Andreas Färber
2012-06-04target-arm: Use cpu_reset() in cpu_arm_init()Andreas Färber
2012-05-10target-arm/cpu.h: Make cpu_init("nonexistent cpu") return NULLPeter Maydell