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AgeCommit message (Expand)Author
2014-01-26target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc groupa64-neona64-for-marcusPeter Maydell
2014-01-26target-arm: A64: Add 2-reg-misc REV* instructionsAlex Bennée
2014-01-26target-arm: A64: Add narrowing 2-reg-misc instructionsPeter Maydell
2014-01-26target-arm: A64: Implement 2-reg-misc CNT, NOT and RBITPeter Maydell
2014-01-26target-arm: A64: Implement 2-register misc compares, ABS, NEGPeter Maydell
2014-01-26target-arm: A64: Add skeleton decode for SIMD 2-reg misc groupPeter Maydell
2014-01-25target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg miscPeter Maydell
2014-01-25target-arm: A64: Implement remaining integer scalar-3-same insnsPeter Maydell
2014-01-25target-arm: A64: Implement scalar pairwise opsPeter Maydell
2014-01-25target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMDPeter Maydell
2014-01-25target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insnsPeter Maydell
2014-01-25target-arm: A64: Implement SIMD 3-reg-same shift and saturate insnsPeter Maydell
2014-01-25target-arm: A64: Add SIMD shift by immediateAlex Bennée
2014-01-25target-arm: A64: Add simple SIMD 3-same floating point opsPeter Maydell
2014-01-23target-arm: A64: Add integer ops from SIMD 3-same groupPeter Maydell
2014-01-23target-arm: A64: Add logic ops from SIMD 3 same groupPeter Maydell
2014-01-23target-arm: A64: Add top level decode for SIMD 3-same groupPeter Maydell
2014-01-23target-arm: A64: Add SIMD scalar 3 same add, sub and compare opsPeter Maydell
2014-01-23target-arm: A64: Add SIMD three-different ABDL instructionsPeter Maydell
2014-01-23target-arm: A64: Add SIMD three-different multiply accumulate insnsPeter Maydell
2014-01-23target-arm: A64: Add SIMD scalar copy instructionsPeter Maydell
2014-01-23target-arm: A64: Add SIMD modified immediate groupAlex Bennée
2014-01-23target-arm: A64: Add SIMD copy operationsAlex Bennée
2014-01-23target-arm: A64: Add SIMD across-lanes instructionsMichael Matz
2014-01-23target-arm: A64: Add SIMD ZIP/UZP/TRNMichael Matz
2014-01-23target-arm: A64: Add SIMD TBL/TBLXMichael Matz
2014-01-23target-arm: A64: Add SIMD EXTPeter Maydell
2014-01-23target-arm: A64: Add decode skeleton for SIMD data processing insnsAlex Bennée
2014-01-23target-arm: A64: Add SIMD ld/st singlePeter Maydell
2014-01-23target-arm: A64: Add SIMD ld/st multipleAlex Bennée
2014-01-14Merge remote branch 'luiz/queue/qmp' into qmpqEdgar E. Iglesias
2014-01-14target-arm: Switch ARMCPUInfo arrays to use terminator entriesPeter Maydell
2014-01-12arm: fix compile on bigendian hostpull-target-arm-20140112Alexey Kardashevskiy
2014-01-08target-arm: A64: Add support for FCVT between half, single and doublepull-target-arm-20140108Peter Maydell
2014-01-08target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell
2014-01-08target-arm: A64: Add floating-point<->integer conversion instructionsWill Newton
2014-01-08target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf
2014-01-08target-arm: A64: Add extra VFP fixed point conversion helpersWill Newton
2014-01-08target-arm: Ignore most exceptions from scalbn when doing fixpoint conversionPeter Maydell
2014-01-08target-arm: Rename A32 VFP conversion helpersWill Newton
2014-01-08target-arm: Prepare VFP_CONV_FIX helpers for A64 usesWill Newton
2014-01-08target-arm: fix build with gcc 4.8.2Michael S. Tsirkin
2014-01-08target-arm: remove raw_read|write duplicationPeter Crosthwaite
2014-01-08target-arm: use c13_context field for CONTEXTIDRSergey Fedorov
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf
2014-01-08target-arm: A64: Add support for floating point cond selectClaudio Fontana
2014-01-08target-arm: A64: Add support for floating point conditional compareClaudio Fontana
2014-01-08target-arm: A64: Add support for floating point compareClaudio Fontana
2014-01-08target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf
2014-01-08target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf