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AgeCommit message (Expand)Author
2014-01-12arm: fix compile on bigendian hostpull-target-arm-20140112Alexey Kardashevskiy
2014-01-08target-arm: A64: Add support for FCVT between half, single and doublepull-target-arm-20140108Peter Maydell
2014-01-08target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell
2014-01-08target-arm: A64: Add floating-point<->integer conversion instructionsWill Newton
2014-01-08target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf
2014-01-08target-arm: A64: Add extra VFP fixed point conversion helpersWill Newton
2014-01-08target-arm: Ignore most exceptions from scalbn when doing fixpoint conversionPeter Maydell
2014-01-08target-arm: Rename A32 VFP conversion helpersWill Newton
2014-01-08target-arm: Prepare VFP_CONV_FIX helpers for A64 usesWill Newton
2014-01-08target-arm: fix build with gcc 4.8.2Michael S. Tsirkin
2014-01-08target-arm: remove raw_read|write duplicationPeter Crosthwaite
2014-01-08target-arm: use c13_context field for CONTEXTIDRSergey Fedorov
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf
2014-01-08target-arm: A64: Add support for floating point cond selectClaudio Fontana
2014-01-08target-arm: A64: Add support for floating point conditional compareClaudio Fontana
2014-01-08target-arm: A64: Add support for floating point compareClaudio Fontana
2014-01-08target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf
2014-01-08target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf
2014-01-08target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell
2014-01-08target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell
2014-01-08target-arm: A64: Add support for dumping AArch64 VFP register stateAlexander Graf
2014-01-08target-arm: A64: support for ld/st/cl exclusiveMichael Matz
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell
2014-01-08target-arm: aarch64: add support for ld litAlexander Graf
2014-01-08target-arm: A64: add support for conditional compare insnsClaudio Fontana
2014-01-08target-arm: A64: add support for add/sub with carryClaudio Fontana
2014-01-07target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell
2014-01-07target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell
2014-01-07target-arm: A64: Implement MRS/MSR/SYS/SYSLPeter Maydell
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell
2014-01-04target-arm: Update generic cpreg code for AArch64Peter Maydell
2014-01-04target-arm: Pull "add one cpreg to hashtable" into its own functionPeter Maydell
2013-12-23target-arm: A64: implement FMOVPeter Maydell
2013-12-23target-arm: A64: Add decoder skeleton for FP instructionsPeter Maydell
2013-12-23target-arm: A64: implement SVC, BRKAlexander Graf
2013-12-23target-arm: A64: add support for 3 src data proc insnsAlexander Graf
2013-12-23target-arm: A64: add support for move wide instructionsAlex Bennée
2013-12-23target-arm: A64: add support for add, addi, sub, subiAlex Bennée
2013-12-23target-arm: A64: add support for ld/st with indexAlex Bennée
2013-12-23target-arm: A64: add support for ld/st with reg offsetAlex Bennée
2013-12-23target-arm: A64: add support for ld/st unsigned immAlex Bennée
2013-12-23target-arm: A64: add support for ld/st pairPeter Maydell
2013-12-17target-arm: A64: add support for logical (immediate) insnsAlexander Graf
2013-12-17target-arm: A64: add support for 1-src CLS insnClaudio Fontana
2013-12-17target-arm: A64: add support for bitfield insnsClaudio Fontana
2013-12-17target-arm: A64: add support for 1-src REV insnsClaudio Fontana
2013-12-17target-arm: A64: add support for 1-src RBIT insnAlexander Graf
2013-12-17target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana
2013-12-17target-arm: A64: add support for 2-src shift reg insnsAlexander Graf
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