| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-02-21 | hw/mips_gictimer: provide API for retrieving frequency | Paul Burton | |
| Provide a new function mips_gictimer_get_freq() which returns the frequency at which a GIC timer will count. This will be useful for boards which perform setup based upon this frequency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> | |||
| 2016-07-12 | hw/mips: implement GIC Interval Timer | Yongbok Kim | |
| The interval timer is similar to the CP0 Count/Compare timer within each processor. The difference is the GIC_SH_COUNTER register is global to the system so that all processors have the same time reference. To ease implementation, all VPs are having its own QEMU timer but sharing global settings and registers such as GIC_SH_CONFIG.COUTNSTOP and GIC_SH_COUNTER. MIPS GIC Interval Timer does support upto 64 bits of Count register but in this implementation it is limited to 32 bits only. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> | |||
 |
index : peter.maydell/qemu-arm.git | |
| This qemu repo is mostly a place to put together pull requests for upstream |
| aboutsummaryrefslogtreecommitdiff |