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AgeCommit message (Expand)Author
2018-10-24hw/ssi/xilinx_spi: Use DeviceState::realize rather than SysBusDevice::initPhilippe Mathieu-Daudé
2018-09-25aspeed/smc: fix some alignment issuesCédric Le Goater
2018-08-24hw/ssi/pl022: Correct wrong DMACR and ICR handlingPeter Maydell
2018-08-24hw/ssi/pl022: Correct wrong value for PL022_INT_RTPeter Maydell
2018-08-24hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::initPeter Maydell
2018-08-24hw/ssi/pl022: Don't directly call vmstate_register()Peter Maydell
2018-08-24hw/ssi/pl022: Set up reset function in class initPeter Maydell
2018-08-24hw/ssi/pl022: Allow use as embedded-struct devicePeter Maydell
2018-08-20hw/ssi/xilinx_spips: Remove unneeded MMIO request_ptr codePeter Maydell
2018-08-16imx_spi: Unset XCH when TX FIFO becomes emptyTrent Piepho
2018-06-26hw/ssi/omap_spi: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
2018-06-26xilinx_spips: Make dma transactions as per dma_burst_sizeSai Pavan Boddu
2018-06-26aspeed/smc: rename aspeed_smc_flash_send_addr() to aspeed_smc_flash_setup()Cédric Le Goater
2018-06-26aspeed/smc: fix HW strappingCédric Le Goater
2018-06-26aspeed/smc: fix dummy cycles count when in dual IO modeCédric Le Goater
2018-06-12object: fix OBJ_PROP_LINK_UNREF_ON_RELEASE ambivalenceMarc-André Lureau
2018-04-26xilinx_spips: Correct SNOOP_NONE state when flushing the txfifopull-target-arm-20180426Sai Pavan Boddu
2018-03-01xilinx_spips: Use 8 dummy cycles with the QIOR/QIOR4 commandsFrancisco Iglesias
2018-03-01xilinx_spips: Enable only two slaves when reading/writing with stripeFrancisco Iglesias
2018-02-09Include qapi/error.h exactly where neededMarkus Armbruster
2018-01-25xilinx_spips: Correct usage of an uninitialized local variableFrancisco Iglesias
2018-01-22Replace all occurances of __FUNCTION__ with __func__Alistair Francis
2018-01-16maint: Fix macros with broken 'do/while(0); ' usageEric Blake
2017-12-18hw/ssi/aspeed_smc: remove unused #includePhilippe Mathieu-Daudé
2017-12-18misc: avoid "include/" in include pathPhilippe Mathieu-Daudé
2017-12-13xilinx_spips: Use memset instead of a for loop to zero registerspull-target-arm-20171213Alistair Francis
2017-12-13xilinx_spips: Set all of the reset valuesAlistair Francis
2017-12-13xilinx_spips: Update the QSPI Mod ID reset valueAlistair Francis
2017-12-13xilinx_spips: Add support for the ZynqMP Generic QSPIFrancisco Iglesias
2017-12-13xilinx_spips: Don't set TX FIFO UNDERFLOW at cmd doneFrancisco Iglesias
2017-12-13xilinx_spips: Add support for 4 byte addresses in the LQSPIFrancisco Iglesias
2017-12-13xilinx_spips: Add support for zero pumpingFrancisco Iglesias
2017-12-13xilinx_spips: Make tx/rx_data_bytes more generic and reusableFrancisco Iglesias
2017-12-13xilinx_spips: Add support for RX discard and RX drainFrancisco Iglesias
2017-12-13xilinx_spips: Update striping to be big-endian bit orderFrancisco Iglesias
2017-12-13xilinx_spips: Move FlashCMD, XilinxQSPIPS and XilinxSPIPSClassFrancisco Iglesias
2017-10-31msf2: Remove dead code reported by CoveritySubbaraya Sundeep
2017-09-21msf2: Add Smartfusion2 SPI controllerSubbaraya Sundeep
2017-08-14xlnx-qspi: add a property for mmio-executionKONRAD Frederic
2017-06-27xilinx_spips: allow mmio executionKONRAD Frederic
2017-02-10aspeed/smc: use a modulo to check segment limitspull-target-arm-20170210Cédric Le Goater
2017-02-10aspeed/smc: handle dummies only in fast read modeCédric Le Goater
2017-01-27aspeed/smc: handle dummy bytes when doing fast reads in command modeCédric Le Goater
2017-01-20aspeed/smc: handle SPI flash Command modeCédric Le Goater
2017-01-20aspeed/smc: adjust the size of the register regionCédric Le Goater
2017-01-20aspeed/smc: unfold the AspeedSMCController arrayCédric Le Goater
2017-01-20aspeed/smc: autostrap CE0/1 configurationCédric Le Goater
2017-01-20aspeed/smc: rework the prototype of the AspeedSMCFlash helper routinesCédric Le Goater
2017-01-20aspeed/smc: remove call to aspeed_smc_update_cs() in reset functionCédric Le Goater
2017-01-20aspeed/smc: remove call to reset in realize functionCédric Le Goater
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