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path: root/hw/sh7750.c
AgeCommit message (Expand)Author
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-03-07sh7750: Remove redundant 'struct' from MemoryRegionOpsStefan Weil
2011-11-24sh_serial: convert to memory APIBenoît Canet
2011-11-24sh_intc: convert interrupt controller to memory APIBenoît Canet
2011-11-24sh_timer: convert to memory APIBenoît Canet
2011-11-24sh7750: convert cache and tlb to memory APIBenoît Canet
2011-11-24sh7750: convert memory controller/ioport to memory APIBenoît Canet
2011-08-20Use glib memory allocation and free functionsAnthony Liguori
2011-06-26Remove exec-all.h include directivesBlue Swirl
2011-01-26sh4: implement missing mmaped TLB read functionsAurelien Jarno
2011-01-26sh4: implement missing mmaped TLB write functionsAurelien Jarno
2011-01-09target-sh4: implement writes to mmaped ITLBAurelien Jarno
2010-12-11Add endianness as io mem parameterAlexander Graf
2010-03-18Replace assert(0) with abort() or cpu_abort()Blue Swirl
2010-02-09sh7750: handle MMUCR TI bitAurelien Jarno
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
2009-10-01Get rid of _t suffixmalc
2009-09-25static and inline should came before the type of the functionsJuan Quintela
2009-08-25Make CPURead/WriteFunc structure 'const'Blue Swirl
2009-06-16Remove io_index argument from cpu_register_io_memory()Avi Kivity
2009-05-13Include assert.h from qemu-common.hPaul Brook
2009-02-07SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel32
2008-12-13Remove unnecessary trailing newlinesblueswir1
2008-12-07SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).balrog
2008-12-07SH: improve the way sh7750 registers io memory (Takashi YOSHII).balrog
2008-12-07SH: r2d pci support (Takashi YOSHII).balrog
2008-12-07sh4: Add IRL (4-bit encoded interrupt input) support (Takashi YOSHII).balrog
2008-12-01Change MMIO callbacks to use offsets, not absolute addresses.pbrook
2008-11-21SH4: Switch serial emulation to qemu_irqaurel32
2008-11-21SH4: Use qemu_irq in timer emulation.aurel32
2008-09-02sh4: CPU versioning.aurel32
2008-08-22[sh4] MMU bug fixaurel32
2008-08-22[sh4] memory mapped TLB entriesaurel32
2008-07-16Fix a bunch of type mismatch-related warnings (Jan Kiszka).balrog
2008-05-09SH4 serial controler improvementsaurel32
2008-05-09SH4 MMU improvementsaurel32
2007-12-12Adds interrupt support to the sh specific timer code (Magnus Damm).balrog
2007-12-02SH4: system emulator interrupt update, by Magnus Damm.ths
2007-11-17Break up vl.h.pbrook
2007-11-11removed invalid use of _INTC_ARRAYbellard
2007-10-04sh775x interrupt controller by Magnus Damm.balrog
2007-09-29Add FRQCR read support, by Magnus Damm.ths
2007-09-29Add INTC controller prototype, by Magnus Damm.ths
2007-09-29Stand-alone SCI/SCIF emulation code, by Magnus Damm.ths
2007-09-29Stand-alone TMU emulation code, by Magnus Damm.ths
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
2007-01-27Rearrange char event handlers to fix CHR_EVENT_RESET.pbrook
2006-06-25C99 64 bit printfbellard
2006-04-27SHIX board emulation (Samuel Tardieu)bellard