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AgeCommit message (Expand)Author
2019-04-04riscv: plic: Log guest errorsAlistair Francis
2019-04-04riscv: plic: Fix incorrect irq calculationAlistair Francis
2019-03-28Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
2019-03-19riscv: sifive_u: Correct UART0's IRQ in the device treeBin Meng
2019-03-19riscv: sifive_uart: Generate TX interruptBin Meng
2019-03-19riscv: sifive_u: Allow up to 4 CPUs to be createdAlistair Francis
2019-03-19RISC-V: Allow interrupt controllers to claim interruptsMichael Clark
2019-03-19RISC-V: Replace __builtin_popcount with ctpop8 in PLICMichael Clark
2019-03-18kconfig: add CONFIG_MSI_NONBROKENPaolo Bonzini
2019-03-18riscv: plic: Set msi_nonbroken as trueAlistair Francis
2019-03-11riscv/Kconfig: enable PCI_DEVICESDavid Abdurachmanov
2019-03-07riscv-softmmu.mak: replace CONFIG_* with Kconfig "select" directivesPaolo Bonzini
2019-03-07kconfig: introduce kconfig filesPaolo Bonzini
2019-02-11riscv: Ensure the kernel start address is correctly castAlistair Francis
2019-02-05hw/riscv/Makefile.objs: Create CONFIG_* for riscv boardsYang Zhong
2019-02-05elf: Add optional function ptr to load_elf() to parse ELF notesLiam Merwick
2018-12-20sifive_uart: Implement interrupt pending registerNathaniel Graff
2018-12-20RISC-V: Enable second UART on sifive_e and sifive_uMichael Clark
2018-12-20RISC-V: Fix PLIC pending bitfield readsMichael Clark
2018-12-20RISC-V: Fix CLINT timecmp low 32-bit writesMichael Clark
2018-12-20sifive_u: Set 'clock-frequency' DT property for SiFive UARTAnup Patel
2018-12-20sifive_u: Add clock DT node for GEM ethernetAnup Patel
2018-12-20hw/riscv/virt: Connect the gpex PCIeAlistair Francis
2018-12-20hw/riscv/virt: Adjust memory layout spacingAlistair Francis
2018-11-13hw/riscv/virt: Free the test device tree node nameAlistair Francis
2018-11-08riscv: spike: Fix memory leak in the board initAlistair Francis
2018-10-17RISC-V: Don't add NULL bootargs to device-treeMichael Clark
2018-10-17RISC-V: Add missing free for plic_hart_configMichael Clark
2018-10-17RISC-V: Allow setting and clearing multiple irqsMichael Clark
2018-09-25Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-09-24' into...Peter Maydell
2018-09-24Drop "qemu:" prefix from error_report() argumentsMao Zhongyi
2018-09-05hw/riscv/spike: Set the soc device tree node as a simple-busAlistair Francis
2018-09-05hw/riscv/virtio: Set the soc device tree node as a simple-busAlistair Francis
2018-09-04RISC-V: Use atomic_cmpxchg to update PLIC bitmapsMichael Clark
2018-07-19spike: Fix crash when introspecting the deviceAlistair Francis
2018-07-19riscv_hart: Fix crash when introspecting the deviceAlistair Francis
2018-07-19virt: Fix crash when introspecting the deviceAlistair Francis
2018-07-19sifive_u: Fix crash when introspecting the deviceAlistair Francis
2018-07-19sifive_e: Fix crash when introspecting the deviceAlistair Francis
2018-07-05hw/riscv/sifive_u: Connect the Cadence GEM Ethernet deviceAlistair Francis
2018-07-05hw/riscv/sifive_u: Move the uart device tree node under /soc/Alistair Francis
2018-07-05hw/riscv/sifive_u: Set the interrupt controller number of interruptsAlistair Francis
2018-07-05hw/riscv/sifive_u: Set the soc device tree node as a simple-busAlistair Francis
2018-07-05hw/riscv/sifive_plic: Use gpios instead of irqsAlistair Francis
2018-07-05hw/riscv/sifive_e: Create a SiFive E SoC objectAlistair Francis
2018-07-05hw/riscv/sifive_u: Create a SiFive U SoC objectAlistair Francis
2018-07-02hw/riscv: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé
2018-06-01hw: Do not include "exec/address-spaces.h" if it is not necessaryPhilippe Mathieu-Daudé
2018-05-10Merge remote-tracking branch 'remotes/riscv/tags/riscv-qemu-2.13-minor-fixes-...Peter Maydell
2018-05-09riscv: htif: increase the priority of the htif subregionKONRAD Frederic