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AgeCommit message (Expand)Author
2019-02-18xics: Drop the KVM ICS classGreg Kurz
2019-02-18xics: Handle KVM interrupt presentation from "simple" ICS codeGreg Kurz
2019-02-18xics: Handle KVM ICS reset from the "simple" ICS codeGreg Kurz
2019-02-18xics: Explicitely call KVM ICS methods from the common codeGreg Kurz
2019-02-18xics: Drop the KVM ICP classGreg Kurz
2019-02-18xics: Handle KVM ICP realize from the common codeGreg Kurz
2019-02-18xics: Handle KVM ICP reset from the common codeGreg Kurz
2019-02-18xics: Explicitely call KVM ICP methods from the common codeGreg Kurz
2019-02-17xive: Only set source type for LSIsGreg Kurz
2019-02-15hw/intc/armv7m_nvic: Allow byte accesses to SHPR1Peter Maydell
2019-02-04spapr: move the interrupt presenters under machine_dataCédric Le Goater
2019-02-04xive: add a get_tctx() method to the XiveRouterCédric Le Goater
2019-02-04ppc/xive: fix remaining XiveFabric namesCédric Le Goater
2019-02-01armv7m: Don't assume the NVIC's CPU is CPU 0Peter Maydell
2019-01-22ppc: Move spapr-related prototypes from xics.h into a seperate header fileThomas Huth
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini
2019-01-10Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-reque...Peter Maydell
2019-01-09ioapic: use TYPE_FOO MACRO than constant stringLi Qiang
2019-01-09spapr: enable XIVE MMIOs at resetCédric Le Goater
2019-01-09spapr: move the qemu_irq array under the machineCédric Le Goater
2019-01-09ppc: export the XICS and XIVE set_irq handlersCédric Le Goater
2019-01-09ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPUCédric Le Goater
2019-01-09ppc/xive: introduce a XiveTCTX pointer under PowerPCCPUCédric Le Goater
2019-01-09spapr/xive: simplify the sPAPR IRQ qirq method for XIVECédric Le Goater
2018-12-21spapr: add a 'reset' method to the sPAPR IRQ backendCédric Le Goater
2018-12-21spapr: allocate the interrupt thread context under the CPU coreCédric Le Goater
2018-12-21spapr: add device tree support for the XIVE exploitation modeCédric Le Goater
2018-12-21spapr: add hcalls support for the XIVE exploitation interrupt modeCédric Le Goater
2018-12-21spapr/xive: use the VCPU id as a NVT identifierCédric Le Goater
2018-12-21spapr/xive: introduce a XIVE interrupt controllerCédric Le Goater
2018-12-21ppc/xive: notify the CPU when the interrupt priority is more privilegedCédric Le Goater
2018-12-21ppc/xive: introduce a simplified XIVE presenterCédric Le Goater
2018-12-21ppc/xive: introduce the XIVE interrupt thread contextCédric Le Goater
2018-12-21ppc/xive: add support for the END Event State BuffersCédric Le Goater
2018-12-21ppc/xive: introduce the XIVE Event Notification DescriptorsCédric Le Goater
2018-12-21ppc/xive: introduce the XiveRouter modelCédric Le Goater
2018-12-21ppc/xive: introduce the XiveNotifier interfaceCédric Le Goater
2018-12-21ppc/xive: add support for the LSI interrupt sourcesCédric Le Goater
2018-12-21ppc/xive: introduce a XIVE interrupt source modelCédric Le Goater
2018-12-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into ...Peter Maydell
2018-12-14Rename cpu_physical_memory_write_rom() to address_space_write_rom()Peter Maydell
2018-12-13target/arm: Introduce arm_hcr_el2_effRichard Henderson
2018-12-13intc/puv3_intc: Convert sysbus init function to realize functionMao Zhongyi
2018-11-27vmstate: constify VMStateFieldMarc-André Lureau
2018-10-24target/arm: Move some system registers into a substructureRichard Henderson
2018-10-19ioapic: Fix error handling in realize()Markus Armbruster
2018-10-19Use error_fatal to simplify obvious fatal errors (again)Markus Armbruster
2018-10-19error: Fix use of error_prepend() with &error_fatal, &error_abortMarkus Armbruster
2018-09-25hw/intc/arm_gic: Drop GIC_BASE_IRQ macroPeter Maydell
2018-08-24hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes largePeter Maydell
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