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2018-07-09hw/net/dp8393x: don't make prom region 'nomigrate'pull-target-arm-20180709Peter Maydell
Currently we use memory_region_init_rom_nomigrate() to create the "dp3893x-prom" memory region, and we don't manually register it with vmstate_register_ram(). This currently means that its contents are migrated but as a ram block whose name is the empty string; in future it may mean they are not migrated at all. Use memory_region_init_ram() instead. Note that this is a a cross-version migration compatibility break for the MIPS "magnum" and "pica61" machines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <aleksandar.markovic@wavecomp.com> Message-id: 20180706174309.27110-1-peter.maydell@linaro.org
2018-07-09boards.h: Remove doc comment reference to nonexistent functionPeter Maydell
commit b08199c6fbea1 accidentally added a reference to a doc comment to a nonexistent memory_region_allocate_aux_memory(). This was a leftover from a previous version of the patchset which defined memory_region_allocate_aux_memory() for "allocate RAM MemoryRegion and register it for migration" and left "memory_region_init_ram()" with its original semantics of "allocate RAM MR but do not register for migration". In the end we decided on the approach of "memory_region_init_ram() registers the MR for migration, and memory_region_init_ram_nomigrate() is a new function which does not", but this comment change got left in by mistake. Revert that part of the commit. Reported-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180702130605.13611-1-peter.maydell@linaro.org
2018-07-09hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'Philippe Mathieu-Daudé
DeviceClass::reset models a "cold power-on" reset which can also be used to powercycle a device; but there is no "hot reset" (a.k.a. soft-reset) method available. The OMAP MMC Power-Up Control bit is not designed to powercycle a card, but to disable it without powering it off (pseudo-reset): Multimedia Card (MMC/SD/SDIO) Interface [SPRU765A] MMC_CON[11] Power-Up Control (POW) This bit must be set to 1 before any valid transaction to either MMC/SD or SPI memory cards. When 1, the card is considered powered-up and the controller core is enabled. When 0, the card is considered powered-down (system dependent), and the controller core logic is in pseudo-reset state. This is, the MMC_STAT flags and the FIFO pointers are reset, any access to MMC_DATA[DATA] has no effect, a write into the MMC.CMD register is ignored, and a setting of MMC_SPI[STR] to 1 is ignored. By splitting the 'pseudo-reset' code out of the 'power-on' reset function, this patch fixes a latent bug in omap_mmc_write(MMC_CON)i recently exposed by ecd219f7abb. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180706162155.8432-2-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09target/arm: Fix do_predset for large VLRichard Henderson
Use MAKE_64BIT_MASK instead of open-coding. Remove an odd vector size check that is unlikely to be more profitable than 3 64-bit integer stores. Correct the iteration for WORD to avoid writing too much data. Fixes RISU tests of PTRUE for VL 256. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180705191929.30773-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09tcg: Restrict check_size_impl to multiples of the line sizeRichard Henderson
Normally this is automatic in the size restrictions that are placed on vector sizes coming from the implementation. However, for the legitimate size tuple [oprsz=8, maxsz=32], we need to clear the final 24 bytes of the vector register. Without this check, do_dup selects TCG_TYPE_V128 and clears only 16 bytes. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180705191929.30773-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09target/arm: Suppress Coverity warning for PRFRichard Henderson
These instructions must perform the sve_access_check, but since they are implemented as NOPs there is no generated code to elide when the access check fails. Fixes: Coverity issues 1393780 & 1393779. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09hw/timer/cmsdk-apb-timer: run or stop timer on writes to RELOAD and VALUEPeter Maydell
If the CMSDK APB timer is set up with a zero RELOAD value then it will count down to zero, fire once and then stay at zero. From the point of view of the ptimer system, the timer is disabled; but the enable bit in the CTRL register is still set and if the guest subsequently writes to the RELOAD or VALUE registers this should cause the timer to start counting down again. Add code to the write paths for RELOAD and VALUE so that we correctly restart the timer in this situation. Conversely, if the new RELOAD and VALUE are both zero, we should stop the ptimer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20180703171044.9503-5-peter.maydell@linaro.org
2018-07-09hw/timer/cmsdk-apb-timer: Correctly identify and set one-shot modeGuenter Roeck
The CMSDK APB timer is currently always configured as periodic timer. This results in the following messages when trying to boot Linux. Timer with delta zero, disabling If the timer limit set with the RELOAD command is 0, the timer needs to be enabled as one-shot timer. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09hw/timer/cmsdk-apb-timer: Correct ptimer policy settingsPeter Maydell
The CMSDK timer interrupt triggers when the counter goes from 1 to 0, so we want to trigger immediately, rather than waiting for a clock cycle. Drop the incorrect NO_IMMEDIATE_TRIGGER setting. We also do not want to get an interrupt if the guest sets the counter directly to zero, so use the new TRIGGER_ONLY_ON_DECREMENT policy. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20180703171044.9503-3-peter.maydell@linaro.org
2018-07-09ptimer: Add TRIGGER_ONLY_ON_DECREMENT policy optionPeter Maydell
The CMSDK timer behaviour is that an interrupt is triggered when the counter counts down from 1 to 0; however one is not triggered if the counter is manually set to 0 by a guest write to the counter register. Currently ptimer can't handle this; add a policy option to allow a ptimer user to request this behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20180703171044.9503-2-peter.maydell@linaro.org
2018-07-09hw/arm/smmu-common: Fix devfn computation in smmu_iommu_mrEric Auger
smmu_iommu_mr() aims at returning the IOMMUMemoryRegion corresponding to a given sid. The function extracts both the PCIe bus number and the devfn to return this data. Current computation of devfn is wrong as it only returns the PCIe function instead of slot | function. Fixes 32cfd7f39e08 ("hw/arm/smmuv3: Cache/invalidate config data") Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1530775623-32399-1-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180709' ↵Peter Maydell
into staging ppc patch queue 2018-07-09 Here's a final pull request before tomorrow's hard freeze. There are a number of fixes and improvements to the sm501 display driver (not strictly ppc related, but used only on ppc and SH). There's also a handful of unrelated fixes. Whether all the sm501 changes are bugfixes is somewhat debatable, but Peter has indicated he's ok with merging those for 3.0. # gpg: Signature made Mon 09 Jul 2018 08:42:15 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.0-20180709: sam460ex: Make sam460ex_load_device_tree() handle all errors internally sam460ex: Don't check for errors from qemu_fdt_*() sam460ex: Check for errors from libfdt functions sam460ex: Update u-boot-sam460ex firmware ppc: fix default VGA display for PReP machines target/ppc: fix build on ppc64 host ppc440_uc: Fix a copy/paste error sm501: Set updated region dirty after 2D operation sm501: Fix support for non-zero frame buffer start address sm501: Log unimplemented raster operation modes sm501: Implement negated destination raster operation mode sm501: Use values from the pitch register for 2D operations sm501: Perform a full update after palette change sm501: Implement i2c part for reading monitor EDID spapr/vio: quiet down the "irq" property accessors ppc: fix default VGA display for Mac machines Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2018-07-07' into ↵Peter Maydell
staging nbd patches for 2018-07-07 Minor improvement for tracing of NBD block status - Vladimir Sementsov-Ogievskiy: nbd/server: fix nbd_co_send_block_status # gpg: Signature made Sun 08 Jul 2018 02:45:18 BST # gpg: using RSA key A7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" # gpg: aka "[jpeg image of size 6874]" # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2018-07-07: nbd/server: fix nbd_co_send_block_status Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-09sam460ex: Make sam460ex_load_device_tree() handle all errors internallyDavid Gibson
sam460ex_load_device_tree() handles nearly all possible errors by simply exiting (within helper functions and macros). It handles two early error cases by returning an error. There's no particular point to this, so make it handle those directly as well, removing the need for the caller to handle a failure. As a bonus it gives us more specific error messages. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-09sam460ex: Don't check for errors from qemu_fdt_*()David Gibson
The qemu_fdt_*() helper functions already exit with a message instead of returning errors, so we don't need to check for errors in the caller. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-09sam460ex: Check for errors from libfdt functionsDavid Gibson
In a couple of places sam460ex_load_device_tree() calls "raw" libfdt functions which can fail, but doesn't check for error codes. At best, if these fail the guest will be silently started in a non-standard state, or it could fail entirely. Fix this by using the _FDT() helper macro which aborts on a libfdt failure. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-09sam460ex: Update u-boot-sam460ex firmwareBALATON Zoltan
Update the submodule and u-boot-sam460-20100605.bin to include following fixes from Sebastian Bauer: - Fix build with newer gcc - Decrease unnecessary delay which fixes slow booting from CD Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07nbd/server: fix nbd_co_send_block_statusVladimir Sementsov-Ogievskiy
Call nbd_co_send_extents() with correct length parameter (extent.length may be smaller than original length). Also, switch length parameter type to uint32_t, to correspond with request->len and similar nbd_co_send_bitmap(). Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20180704112302.471456-2-vsementsov@virtuozzo.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2018-07-07ppc: fix default VGA display for PReP machinesMark Cave-Ayland
Commit 29f9cef "ppc: Include vga cirrus card into the compiling process" changed the default display adapter for all PPC machines to cirrus. Unfortunately it missed setting the default display type to stdvga for both PReP machines causing the display to fail to initialise under OpenHackWare. Update the MachineClass for both prep and 40p machines so that the default std(vga) display adapter is the default if no options are specified which fixes the display for the PReP machines. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07target/ppc: fix build on ppc64 hostLaurent Vivier
When I try to build a ppc64 target on a ppc64 host (gcc 8.1.1), I have: .../target/ppc/int_helper.c: In function 'helper_vinsertb': .../target/ppc/int_helper.c:1954:32: error: array subscript 18446744073709551608 is above array bounds of 'uint8_t[16]' {aka 'unsigned char[16]'} [-Werror=array-bounds] memmove(&r->u8[index], &b->u8[8 - sizeof(r->element)], \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .../target/ppc/int_helper.c:1965:1: note: in expansion of macro 'VINSERT' If we compare with the macro for ppc64le, we can see sizeof(r->element[0]) should be used instead of sizeof(r->element). And VINSERT uses only u8, u16, u32 and u64, so the maximum value of sizeof(r->element[0]) is 8 Suggested-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07ppc440_uc: Fix a copy/paste errorPhilippe Mathieu-Daudé
Missed in 3c409c1927e, hopefully reported by Coverity. Fixes: Coverity CID 1393788 (Copy-paste error) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Set updated region dirty after 2D operationBALATON Zoltan
Set the changed memory region dirty after performed a 2D operation to ensure that the screen is updated properly. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Fix support for non-zero frame buffer start addressBALATON Zoltan
Display updates and drawing hardware cursor did not work when frame buffer address was non-zero. Fix this by taking the frame buffer address into account in these cases. This fixes screen dragging on AmigaOS. Based on patch by Sebastian Bauer. Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Log unimplemented raster operation modesSebastian Bauer
The sm501 currently implements only a very limited set of raster operation modes. After this change, unknown raster operation modes are logged so these can be easily spotted. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Implement negated destination raster operation modeSebastian Bauer
Add support for the negated destination operation mode. This is used e.g. by AmigaOS for the INVERSEVID drawing mode. With this change, the cursor in the shell and non-immediate window adjustment are working now. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Use values from the pitch register for 2D operationsSebastian Bauer
Before, crt_h_total was used for src_width and dst_width. This is a property of the current display setting and not relevant for the 2D operation that also can be done off-screen. The pitch register's purpose is to describe line pitch relevant of the 2D operation. Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Perform a full update after palette changeSebastian Bauer
Changing the palette of a color index has as an immediate effect on all pixels with the corresponding index on real hardware. Performing a full update after a palette change is a simple way to emulate this effect. Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07sm501: Implement i2c part for reading monitor EDIDBALATON Zoltan
Emulate the i2c part of SM501 which is used to access the EDID info from a monitor. The vmstate structure is changed and its version is increased but SM501 is only used on SH and PPC sam460ex machines that don't support cross-version migration. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07spapr/vio: quiet down the "irq" property accessorsCédric Le Goater
commit efe2add7cb7f ("spapr/vio: deprecate the "irq" property") introduced get/set accessors for the "irq" property to warn of its usage, but the warning in the get pollutes the monitor 'info qtree'. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-07ppc: fix default VGA display for Mac machinesMark Cave-Ayland
Commit 29f9cef39e "ppc: Include vga cirrus card into the compiling process" changed the default display adapter for all PPC machines to cirrus. Unfortunately it missed setting the default display type to stdvga for both Mac machines causing the display to fail to initialise under OpenBIOS. Update the MachineClass for both Old World and New World Macs so that the default std(vga) display adapter is the default if no options are specified which fixes the display for the Mac machines. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-06Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
Bug fixes. # gpg: Signature made Fri 06 Jul 2018 17:40:06 BST # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: checkpatch: handle token pasting better ioapic: remove useless lower bounds check pr-manager-helper: fix memory leak on event qemu-char: check errno together with ret < 0 i386: fix '-cpu ?' output for host cpu type qtest: Use cpu address space instead of system memory pr-helper: Rework socket path handling pr-helper: avoid error on PR IN command with zero request size Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-06checkpatch: handle token pasting betterPaolo Bonzini
The mechanism to find possible type tokens can sometimes be confused and go into an infinite loop. This happens for example in QEMU for a line that looks like uint## BITS ##_t S = _S, T = _T; \ uint## BITS ##_t as, at, xs, xt, xd; \ Because the token pasting operator does not have a space before _t, it does not match $notPermitted. However, (?x) is turned on in the regular expression for modifiers, and thus ##_t matches the empty string. As a result, annotate_values goes in an infinite loop. The solution is simply to remove token pasting operators from the string before looking for modifiers. In the example above, the string uintBITS_t will be evaluated as a candidate modifier. This is not optimal, but it works as long as people do not write things like a##s##m, and it fits nicely into sub possible. For a similar reason, \# should be rejected always, even if it is not at end of line or followed by whitespace. The same patch was sent to the Linux kernel mailing list. Reported-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06ioapic: remove useless lower bounds checkPaolo Bonzini
The vector cannot be negative. Coverity now reports this because it sees an array access before the check, in ioapic_stat_update_irq. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06pr-manager-helper: fix memory leak on eventPaolo Bonzini
Reported by Coverity. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06qemu-char: check errno together with ret < 0xinhua.Cao
In the tcp_chr_write function, we checked errno, but errno was not reset before a read or write operation. Therefore, this check of errno's actions is often incorrect after EAGAIN has occurred. we need check errno together with ret < 0. Signed-off-by: xinhua.Cao <caoxinhua@huawei.com> Message-Id: <20180704033642.15996-1-caoxinhua@huawei.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Fixes: 9fc53a10f81d3a9027b23fa810147d21be29e614 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06i386: fix '-cpu ?' output for host cpu typeGreg Kurz
Since commit d6dcc5583e7, '-cpu ?' shows the description of the X86_CPU_TYPE_NAME("max") for the host CPU model: Enables all features supported by the accelerator in the current host instead of the expected: KVM processor with all supported host features or HVF processor with all supported host features This is caused by the early use of kvm_enabled() and hvf_enabled() in a class_init function. Since the accelerator isn't configured yet, both helpers return false unconditionally. A QEMU binary will only be compiled with one of these accelerators, not both. The appropriate description can thus be decided at build time. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <153055056654.212317.4697363278304826913.stgit@bahia.lan> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06qtest: Use cpu address space instead of system memoryJulia Suvorova
Some devices (like nvic in armv7m) are not accessable through address_space_memory, therefore can not be tested with qtest. Signed-off-by: Julia Suvorova <jusual@mail.ru> Message-Id: <20180702065237.27899-1-jusual@mail.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06pr-helper: Rework socket path handlingMichal Privoznik
When reviewing Paolo's pr-helper patches I've noticed couple of problems: 1) socket_path needs to be calculated at two different places (one for printing out help, the other if socket activation is NOT used), 2) even though the default socket_path is allocated in compute_default_paths() it is the only default path the function handles. For instance, pidfile is allocated outside of this function. And yet again, at different places than 1) Signed-off-by: Michal Privoznik <mprivozn@redhat.com> Message-Id: <c791ba035f26ea957e8f3602e3009b621769b1ba.1530611283.git.mprivozn@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06pr-helper: avoid error on PR IN command with zero request sizePaolo Bonzini
After reading a PR IN command with zero request size in prh_read_request, the resp->result field will be uninitialized and the resp.sz field will be also uninitialized when returning to prh_co_entry. If resp->result == GOOD (from a previous successful reply or just luck), then the assert in prh_write_response might not be triggered and uninitialized response will be sent. The fix is to remove the whole handling of sz == 0 in prh_co_entry. Those errors apply only to PR OUT commands and it's perfectly okay to catch them later in do_pr_out and multipath_pr_out; the check for too-short parameters in fact doesn't apply in the easy SG_IO case, as it can be left to the target firmware even. The result is that prh_read_request does not fail requests anymore and prh_co_entry becomes simpler. Reported-by: Dima Stepanov <dimastep@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-06tests/migration: Skip tests for ppc tcgDr. David Alan Gilbert
PPC tcg seems to be failing migration tests quite regularly; we believe this is TCG bugs in dirty bit updating; it's not clear why PPC fails more but lets skip for the moment. $ ./tests/migration-test /ppc64/migration/deprecated: OK /ppc64/migration/bad_dest: Skipping test: kvm_hv not available OK /ppc64/migration/postcopy/unix: Skipping test: kvm_hv not available OK /ppc64/migration/precopy/unix: Skipping test: kvm_hv not available OK Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Message-id: 20180706143105.93472-1-dgilbert@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-06Merge remote-tracking branch ↵Peter Maydell
'remotes/alistair/tags/pull-riscv-pull-20180705' into staging RISC-V: SoCify SiFive boards and connect GEM This series has three tasks: 1. To convert the SiFive U and E machines into SoCs and boards 2. To connect the Cadence GEM device to the SiFive U board 3. Fix some device tree problems with the SiFive U board After this series the SiFive E and U boards have their SoCs split into seperate QEMU objects, which can be used on future boards if desired. The RISC-V Virt and Spike boards have not been converted. They haven't been converted as they aren't physical boards, so it doesn't make a whole lot of sense to split them into an SoC and board. The only disadvantage with this is that they now differ to the SiFive boards. This series also connect the Cadence GEM device to the SiFive U board. There are some interrupt line changes requried before this is possible. # gpg: Signature made Fri 06 Jul 2018 02:17:21 BST # gpg: using RSA key 21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-pull-20180705: hw/riscv/sifive_u: Connect the Cadence GEM Ethernet device hw/riscv/sifive_u: Move the uart device tree node under /soc/ hw/riscv/sifive_u: Set the interrupt controller number of interrupts hw/riscv/sifive_u: Set the soc device tree node as a simple-bus hw/riscv/sifive_plic: Use gpios instead of irqs hw/riscv/sifive_e: Create a SiFive E SoC object hw/riscv/sifive_u: Create a SiFive U SoC object Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-05hw/riscv/sifive_u: Connect the Cadence GEM Ethernet deviceAlistair Francis
Connect the Cadence GEM ethernet device. This also requires us to expose the plic interrupt lines. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05hw/riscv/sifive_u: Move the uart device tree node under /soc/Alistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05hw/riscv/sifive_u: Set the interrupt controller number of interruptsAlistair Francis
Set the interrupt-controller ndev to the correct number taken from the HiFive Unleashed board. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05hw/riscv/sifive_u: Set the soc device tree node as a simple-busAlistair Francis
To allow Linux to ennumerate devices on the /soc/ node set it as a "simple-bus". Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05hw/riscv/sifive_plic: Use gpios instead of irqsAlistair Francis
Instead of creating the interrupt in lines with qemu_allocate_irq() use qdev_init_gpio_in() as this gives us the ability to use the qdev*gpio*() helpers later on. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05hw/riscv/sifive_e: Create a SiFive E SoC objectAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05hw/riscv/sifive_u: Create a SiFive U SoC objectAlistair Francis
Create a SiFive Unleashed U54 SoC and use that in the sifive_u machine. We leave the SoC, RAM, device tree and reset/fdt loading as part of the machine. All the other device creation has been moved to the SoC. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
2018-07-05Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-code-coverage-and-build-tweaks-050718-3' into staging Code coverage and other build tweaks - revert 208ecb3e (and drop filter for mingw, tweak for check-tcg) - some travis speed-ups - modernise code coverage support - docker image cleanups - clean-up binfmt_misc docker infrastructure - add debian-powerpc-user-cross image for ppc32 build # gpg: Signature made Thu 05 Jul 2018 17:00:02 BST # gpg: using RSA key FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-code-coverage-and-build-tweaks-050718-3: docker: add linux-user powered cross builder for QEMU docker: add special rule for deboostrapped images docker: add special handling for FROM:debian-%-user targets docker: debian-bootstrap.pre allow customising of variant/url docker: drop QEMU build-dep from bootstrap docker: Do not run tests in 'intermediate' images docker: Clean the MXE base image docker: ubuntu: Use SDL2 docker: ubuntu: Update the package list before installing new ones linux-user: add gcov support to preexit_cleanup linux-user: introduce preexit_cleanup build-system: add coverage-report target build-system: add clean-coverage target travis: add gcovr summary for GCOV build docker: add gcovr to travis image .gitignore: add .gcov files build-system: remove per-test GCOV reporting travis: test out-of-tree builds travis: do not waste time cloning unused submodules Revert "Makefile: Rename TARGET_DIRS to TARGET_LIST" Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-05docker: add linux-user powered cross builder for QEMUAlex Bennée
We can't use cross compilers in the current Debian stable and Debian sid is sketchy as hell. So for powerpc fall back to dog-fooding our own linux-user to do the build. As we can only build the base image with a suitably configured source tree we fall back to checking for its existence when we can't build it from scratch. However this does mean you don't have to keep a static powerpc-linux-user in your active configuration just to update the cross build image. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>