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2019-03-04s390x/tcg: Fix TEST DATA CLASS instructionsDavid Hildenbrand
Let's detect normal and denormal ("subnormal") numbers reliably. Also test for quiet NaN's. As only one class is possible, test common cases first. While at it, use a better check to test for the mask bits in the data class mask. The data class mask has 12 bits, whereby bit 0 is the leftmost bit and bit 11 the rightmost bit. In the PoP an easy to read table with the numbers is provided for the VECTOR FP TEST DATA CLASS IMMEDIATE instruction, the table for TEST DATA CLASS is more confusing as it is based on 64 bit values. Factor the checks out into separate functions, as they will also be needed for floating point vector instructions. We can use a makro to generate the functions. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-2-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARYDavid Hildenbrand
Use a new CC helper to calculate the CC lazily if needed. While the PoP mentions that "A 32-bit unsigned binary integer" is placed into the first operand, there is no word telling that the other 32 bits (high part) are left untouched. Maybe the other 32-bit are unpredictable. So store 64 bit for now. Bit magic courtesy of Richard. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-8-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFPDavid Hildenbrand
Nice trick to load a 32 bit value into vector element 0 (32 bit element size) from memory, zeroing out element1. The short HFP to long HFP conversion really only is a shift. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-7-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Factor out gen_addi_and_wrap_i64() from get_address()David Hildenbrand
Also properly wrap in 24bit mode. While at it, convert the comment (and drop the comment about fundamental TCG optimizations). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Factor out vec_full_reg_offset()David Hildenbrand
We'll use that a lot along with gvec helpers, to calculate the start address of a vector. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Clarify terminology in vec_reg_offset()David Hildenbrand
We will use s390x speak "Element Size" (es) for MO_8 == 0, MO_16 == 1 ... Simple rename of variables. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-4-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Simplify disassembler operands initializationDavid Hildenbrand
Let's simplify initialization to 0. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: RXE has an optional M3 fieldDavid Hildenbrand
Will be needed, so add it to the format description. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190225200318.16102-2-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/vfio-ap: document hot plug/unplug of vfio-ap deviceTony Krowiak
Let's update the vfio-ap.txt document to include the hot plug/unplug support. Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Message-Id: <1550519397-25359-3-git-send-email-akrowiak@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/vfio-ap: Implement hot plug/unplug of vfio-ap deviceTony Krowiak
Introduces hot plug/unplug support for the vfio-ap device. To hot plug a vfio-ap device using the QEMU device_add command: (qemu) device_add vfio-ap,sysfsdev=$path-to-mdev Where $path-to-mdev is the absolute path to the mediated matrix device to which AP resources to be used by the guest have been assigned. A vfio-ap device can be hot plugged only if: 1. A vfio-ap device has not been attached to the virtual machine's ap-bus via the QEMU command line or a prior hot plug action. 2. The guest was started with the CPU model feature for AP enabled (e.g., -cpu host,ap=on) To hot unplug a vfio-ap device using the QEMU device_del command: (qemu) device_del vfio-ap,sysfsdev=$path-to-mdev Where $path-to-mdev is the absolute path to the mediated matrix device specified when the vfio-ap device was attached to the virtual machine's ap-bus. A vfio-ap device can be hot unplugged only if: 1. A vfio-ap device has been attached to the virtual machine's ap-bus via the QEMU command line or a prior hot plug action. 2. The guest was started with the CPU model feature for AP enabled (e.g., -cpu host,ap=on) Please note that a hot plug handler is not necessary for the vfio-ap device because the AP matrix configuration for the guest is performed by the kernel device driver when the vfio-ap device is realized. The vfio-ap device represents a VFIO mediated device created in the host sysfs for use by a guest. The mdev device is configured with an AP matrix (i.e., adapters and domains) via its sysfs attribute interfaces prior to starting the guest or plugging a vfio-ap device in. When the device is realized, a file descriptor is opened on the mdev device which results in a callback to the vfio_ap kernel device driver. The device driver then configures the AP matrix in the guest's SIE state description from the AP matrix assigned via the mdev device's sysfs interfaces. The AP devices will be created for the guest when the AP bus running on the guest subsequently performs its periodic scan for AP devices. The qdev_simple_device_unplug_cb() callback function is used for the same reaons; namely, the vfio_ap kernel device driver will perform the AP resource de-configuration for the guest when the vfio-ap device is unplugged. When the vfio-ap device is unrealized, the mdev device file descriptor is closed which results in a callback to the vfio_ap kernel device driver. The device driver then clears the AP matrix configuration in the guest's SIE state description and resets all of the affected queues. The AP devices created for the guest will be removed when the AP bus running on the guest subsequently performs its periodic scan and finds there are no longer any AP resources assigned to the guest. Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Reviewed-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Halil Pasic <pasic@linux.ibm.com> Tested-by: Pierre Morel <pmorel@linux.ibm.com> Message-Id: <1550519397-25359-2-git-send-email-akrowiak@linux.ibm.com> [CH: adapt to changed qbus_set_hotplug_handler() signature] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Save vregs to extended mchk save areaDavid Hildenbrand
If we have vector registers and the designation is not zero, we have to try to write the vector registers. If the designation is zero or if storing fails, we must not indicate validity. s390_build_validity_mcic() automatically already sets validity if the vector instruction facility is installed. As long as we don't support the guarded-storage facility, the alignment and size of the area is always 1024 bytes. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190222081153.14206-4-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x: use a QEMU-style typedef + name for SIGP save area structDavid Hildenbrand
Convert this to QEMU style. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190222081153.14206-3-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUSDavid Hildenbrand
As we will support vector instructions soon, and vector registers are stored in 64bit host chunks, let's use cpu_to_be64. Same applies to the guarded storage control block. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190222081153.14206-2-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-01Merge remote-tracking branch ↵Peter Maydell
'remotes/cminyard/tags/i2c-for-release-20190228' into staging This has been out there long enough, I need to get this in. This was changed a little bit since my post on Feb 20 (to which there were no comments) due to changes I had to work around: Change b296b664abc73253 "smbus: Add a helper to generate SPD EEPROM data" added a function to include/hw/i2c/smbus.h, which I had to move to include/hw/smbus_eeprom.h. There were some changes to hw/i2c/Makefile.objs that I had to fix up. Beyond that, no changes. Thanks, -corey # gpg: Signature made Thu 28 Feb 2019 18:05:49 GMT # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/i2c-for-release-20190228: i2c: Verify that the count passed in to smbus_eeprom_init() is valid i2c:smbus_eeprom: Add a reset function to smbus_eeprom i2c:smbus_eeprom: Add vmstate handling to the smbus eeprom i2c:smbus_eeprom: Add a size constant for the smbus_eeprom size i2c:smbus_eeprom: Add normal type name and cast to smbus_eeprom.c i2c:smbus_slave: Add an SMBus vmstate structure i2c:pm_smbus: Fix state transfer migration: Add a VMSTATE_BOOL_TEST() macro i2c:pm_smbus: Fix pm_smbus handling of I2C block read boards.h: Ignore migration for SMBus devices on older machines i2c:smbus: Make white space in switch statements consistent i2c:smbus_eeprom: Get rid of the quick command i2c:smbus: Simplify read handling i2c:smbus: Simplify write operation i2c:smbus: Correct the working of quick commands i2c: Don't check return value from i2c_recv() arm:i2c: Don't mask return from i2c_recv() i2c: have I2C receive operation return uint8_t i2c: Split smbus into parts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-01Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20190228' into ↵Peter Maydell
staging Xen queue * xen-block fixes # gpg: Signature made Thu 28 Feb 2019 17:31:05 GMT # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: issuer "anthony.perard@citrix.com" # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [marginal] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20190228: xen-block: stop leaking memory in xen_block_drive_create() xen-block: report error condition from vbd_name_to_disk() xen-block: remove redundant assignment dataplane/xen-block: remove dead code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-01Merge remote-tracking branch ↵Peter Maydell
'remotes/huth-gitlab/tags/pull-request-2019-02-28' into staging - Updates to MAINTAINERS file - Re-enable the guest-agent test - Add the possibility to load a bios image on the mcf5208evb machine # gpg: Signature made Thu 28 Feb 2019 12:23:25 GMT # gpg: using RSA key 2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2019-02-28: hw/m68k/mcf5208: Support loading of bios images tests/test-qga: Reenable guest-agent qtest MAINTAINERS: Clean up the RISC-V TCG backend section MAINTAINERS: Add some missing entries for the sun4m machine MAINTAINERS: Add maintainer to the TCG/i386 subsystem MAINTAINERS: Add maintainers to the Linux subsystem MAINTAINERS: Orphanize the 'GDB stub' subsystem MAINTAINERS: Add maintainer to the POSIX subsystem MAINTAINERS: Add an entry for the Dino machine MAINTAINERS: Add missing test entries to the Cryptography section MAINTAINERS: Add missing entries for the QObject section MAINTAINERS: Add missing entries for the PC machines MAINTAINERS: Add missing entries for the sun4u machines Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into stagingPeter Maydell
target/xtensa: FLIX support, various fixes and test improvements - add FLIX (flexible length instructions extension) support; - make testsuite runnable on wider range of xtensa cores; - add floating point opcode tests; - don't add duplicate 'static' in import_core.sh script; - fix undefined opcodes detection in test_mmuhifi_c3 overlay. # gpg: Signature made Thu 28 Feb 2019 12:53:23 GMT # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20190228-xtensa: (40 commits) tests/tcg/xtensa: add FPU2000 coprocessor tests tests/tcg/xtensa: add FP1 group tests tests/tcg/xtensa: add FP0 group conversion tests tests/tcg/xtensa: add FP0 group arithmetic tests tests/tcg/xtensa: add LSCI/LSCX group tests tests/tcg/xtensa: add test for FLIX tests/tcg/xtensa: conditionalize MMU-related tests tests/tcg/xtensa: conditionalize windowed register tests tests/tcg/xtensa: conditionalize and fix s32c1i tests tests/tcg/xtensa: fix SR tests for big endian configs tests/tcg/xtensa: conditionalize and expand SR tests tests/tcg/xtensa: conditionalize timer/CCOUNT tests tests/tcg/xtensa: conditionalize interrupt tests tests/tcg/xtensa: add straightforward conditionals tests/tcg/xtensa: conditionalize cache option tests tests/tcg/xtensa: conditionalize debug option tests tests/tcg/xtensa: enable boolean tests tests/tcg/xtensa: fix endianness issues in test_b tests/tcg/xtensa: don't use optional opcodes in generic code tests/tcg/xtensa: support configs with LITBASE ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20190228-1' into staging target-arm queue: * add MHU and dual-core support to Musca boards * refactor some VFP insns to be gated by ID registers * Revert "arm: Allow system registers for KVM guests to be changed by QEMU code" * Implement ARMv8.2-FHM extension * Advertise JSCVT via HWCAP for linux-user # gpg: Signature made Thu 28 Feb 2019 11:06:55 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190228-1: linux-user: Enable HWCAP_ASIMDFHM, HWCAP_JSCVT target/arm: Enable ARMv8.2-FHM for -cpu max target/arm: Implement VFMAL and VFMSL for aarch32 target/arm: Implement FMLAL and FMLSL for aarch64 target/arm: Add helpers for FMLAL Revert "arm: Allow system registers for KVM guests to be changed by QEMU code" target/arm: Gate "miscellaneous FP" insns by ID register field target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions hw/arm/armsse: Unify init-svtor and cpuwait handling hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR* hw/arm/iotkit-sysctl: Add SSE-200 registers hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() target/arm/cpu: Allow init-svtor property to be set after realize hw/arm/armsse: Wire up the MHUs hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28xen-block: stop leaking memory in xen_block_drive_create()Paul Durrant
The locally allocated QDict-s need to be freed. ('file_layer' will be freed implicitly since it is added as an object to 'driver_layer'). Spotted by Coverity: CID 1398649 While in the neighbourhood free 'driver' and 'filename' as soon as they are added to the QDicts. Freeing after the 'done' label doesn't make that much sense as, if the error path jumps to that label, the values would be NULL anyway. This patch also makes that more obvious by taking the error path if 'params' is NULL and then asserting that both driver and filename are non-NULL in the normal path. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Message-Id: <20190219163440.15702-1-paul.durrant@citrix.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2019-02-28xen-block: report error condition from vbd_name_to_disk()Paul Durrant
The function needs to make sure it is passed a valid disk name. This is easily done by making sure that the parsing loop results in a non-zero value. Spotted by Coverity: CID 1398640 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20190215162533.19475-4-paul.durrant@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2019-02-28xen-block: remove redundant assignmentPaul Durrant
The assignment to 'p' is unnecessary as the code will either goto 'invalid' or p will get overwritten. Spotted by Coverity: CID 1398638 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20190215162533.19475-3-paul.durrant@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2019-02-28dataplane/xen-block: remove dead codePaul Durrant
The if() statement is clearly bogus (dead code which should have been cleaned up when grant mapping was removed). Spotted by Coverity: CID 1398635 While in the neighbourhood, add a missing 'fall through' annotation. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20190215162533.19475-2-paul.durrant@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2019-02-28Merge remote-tracking branch ↵Peter Maydell
'remotes/kraxel/tags/audio-20190228-pull-request' into staging audio: fixes and cleanups. # gpg: Signature made Thu 28 Feb 2019 10:08:44 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20190228-pull-request: audio/sdlaudio: Simplify the sdl_callback function audio/sdlaudio: Remove the semaphore code audio: don't build alsa and sdl by default on linux audio: Do not check for audio_calloc failure audio: Use g_strdup_printf instead of manual building a string Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-27-2019' ↵Peter Maydell
into staging MIPS queue for February 27th, 2019 # gpg: Signature made Wed 27 Feb 2019 13:27:36 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-feb-27-2019: target/mips: Preparing for adding MMI instructions tests/tcg: target/mips: Add tests for MSA integer max/min instructions tests/tcg: target/mips: Add wrappers for MSA integer max/min instructions qemu-doc: Add section on MIPS' Boston board qemu-doc: Add section on MIPS' Fulong 2E board qemu-doc: Move section on MIPS' mipssim pseudo board disas: nanoMIPS: Fix a function misnomer tests/tcg: target/mips: Add tests for MSA integer compare instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28tests/tcg/xtensa: add FPU2000 coprocessor testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP1 group testsMax Filippov
Test comparisons and conditional move operations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP0 group conversion testsMax Filippov
Test conversions for normal, NaN and Inf arguments. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP0 group arithmetic testsMax Filippov
Test arithmetic operations for normal, NaN and Inf arguments. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add LSCI/LSCX group testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add test for FLIXMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize MMU-related testsMax Filippov
Make MMU-related tests conditional on the presence of MMUv2 option. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize windowed register testsMax Filippov
Make windowed register tests conditional on the presence of this option. Fix tests to work correctly for both 32 and 64 physical registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and fix s32c1i testsMax Filippov
Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: fix SR tests for big endian configsMax Filippov
SR tests generate instructions that the assembler does not recognize and thus must take care about configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and expand SR testsMax Filippov
Make tests for specific special registers conditional on the presence of the options that add these registers and test that the registers are not accessible otherwise. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize timer/CCOUNT testsMax Filippov
Make timer/CCOUNT tests conditional on the presence of timer option and number of configured timers. Don't use hard coded interrupt levels for timers, use configured values. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize interrupt testsMax Filippov
Make interrupt tests conditional on the presence of interrupt option and on the presence of level-1 and high level software interrupts. Don't use hard-coded interrupt level for the high level interrupt tests, choose high level software IRQ and use its configured level. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add straightforward conditionalsMax Filippov
Make tests for optional instruction groups conditional on the presence of corresponding options in the config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize cache option testsMax Filippov
Make data/instruction tests conditional on the presence of data/instruction cache, whether they're lockable and whether data cache is writeback. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize debug option testsMax Filippov
Make debug tests conditional on the presence of the debug option in the config and tests that depend on the presence/number of instruction or data breakpoint registers on the corresponding definitions. Use configured debug interrupt level instead of the hardcoded value to set up IRQ handler and access debug EPC register. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: enable boolean testsMax Filippov
Uncomment test_boolean in the test makefile. Make actual tests code conditional on the presence of boolean option in the config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: fix endianness issues in test_bMax Filippov
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that accept little-endian bit number and produce correct immediate for both little and big endian configurations. Choose value loaded into register for bbc/bbs opcodes based on configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: don't use optional opcodes in generic codeMax Filippov
Don't use 'loop' opcode in generic testsuite completion code, only use core opcodes to make it work with any configuration. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: support configs with LITBASEMax Filippov
Configurations with LITBASE register may use absolute literals by default. Pass --no-absolute-literals option to assembler to use PC-relative literals instead. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: support configurations w/o vecbaseMax Filippov
Configurations w/o vecbase may have vectors not grouped together and not in fixed order. They may not always be grouped into single output sections by assigning next offset to dot, as it may sometimes move dot backwards and sometimes they may even belong to different memory region. Don't group vectors into single output section. Instead put each vector into its own section ant put it at its default virtual address. Reserve 4KBytes from the default vectors base and put rest of the code and data starting from there. Mark vectors sections as executable, otherwise their contents is discarded. There may be as little as 16 bytes reserved for some vectors, load handler address into a0 and use ret.n to jump there to make vector code fit into this 16 byte space. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: indicate failed testsMax Filippov
When test suite with multiple tests fails it's not obvious which test failed. Pring "failed" in every invocation of test_fail. Do printing when DEBUG preprocessor macro is defined. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28target/xtensa: implement PREFCTL SRMax Filippov
Cache prefetch option adds an unprivileged SR PREFCTL. Add trivial implementation for this SR. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28target/xtensa: prioritize load/store in FLIX bundlesMax Filippov
Load/store opcodes may raise MMU exceptions. Normally exceptions should be checked in priority order before any actual operations, but since MMU exceptions are tightly coupled with actual memory access, there's currently no way to do it. Approximate this behavior by executing all load, then all store, and then all other opcodes in the FLIX bundles. Use opcode dependency mechanism to express ordering. Mark load/store opcodes with XTENSA_OP_{LOAD,STORE} flags. Newer libisa has classifier functions that can tell whether opcode is a load or store, but this information is not available in the existing overlays. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28target/xtensa: break circular register dependenciesMax Filippov
Currently topologic opcode sorting stops at the first detected dependency loop. Introduce struct opcode_arg_copy that describes temporary register copy. Scan remaining opcodes searching for dependencies that can be broken, break them by introducing temporary register copies and record them in an array. In case of success create local temporaries and initialize them with current register values. Share single temporary copy between all register users. Delete temporaries after translation. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28target/xtensa: reorganize access to boolean registersMax Filippov
libisa represents boolean registers b0..b16 as a BR register file and as BR4 and BR8 register groups. Add these register files and use OpcodeArg::{in,out} parameters to access boolean registers in translators. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>