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Add Gumstix Overo board definition (an OMAP3 based board).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The 9118 ethernet controller interrupt line is active low unless
the IRQ config register is programmed to set both the IRQ_POL
(polarity: active-high) and IRQ_TYPE (type: push-pull) bits:
implement support for inverting the irq output in other configurations.
This also requires that we support setting the bits in the first
place, and that we correctly preserve them across software reset.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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gcc 4.5.2 correctly complains that r is potentially uninitialized in this
function.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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The REG_PC constant used in the ARM nwfpe code is fine in the kernel
but when used in qemu can clash with a definition in the host system
include files (in particular on Ubuntu Lucid SPARC, including signal.h
will define a REG_PC). Rename the constant to avoid this issue.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Work around a SPARC glibc bug which caused the epoll_create1 configure
test to wrongly claim that the function was present. Some versions of
SPARC glibc provided the function in the library but didn't declare
it in the include file; the result is that gcc warns about an implicit
declaration but a link succeeds. So we build the configure test with
-Werror to avoid the test passing but then a -Werror qemu build
failing.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Update the Linaro changelog for the 2011.04-0 release.
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Special-case prlimit64 to return ENOSYS without printing the default
"unhandled syscall" warning; this is a new syscall so anything trying
to use it will have a fallback case, and the warning can result in
a lot of noise (for instance, when running apt under qemu).
This will be replaced with a proper implementation later.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The OMAP UART defines new functions for MCR bits 5 and 6;
these can only be written if the appropriate bit is set in the
EFR register.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The OMAP UART provides different views of the registers depending on the
access mode specified by the value in the LCR register. Refactor this
to use an enumeration indicating the current mode rather than doing
checks of the cache LCR value everywhere. Similarly, pull out into a
function the check of whether registers 0x18/0x1c are in TCR/TLR mode.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Uncondionally enable the OMAP UART modelling of the extensions
over plain 16550A, instead of having them guarded by #ifdefs
and disabled by default. Newer Linux kernels have an OMAP
specific serial driver which relies on these being implemented.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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We emulate MMC commands with response type R1b and no data transfer
instantaneously, so we must set the TC bit as well as the CC bit,
to indicate that the "busy" period has ended.
Without this fix the Linux driver will hang waiting for a TC interrupt
that never happens when it tries to do a block erase.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Use symbolic constants rather than hardcoded numeric values for the
OMAP3 MMC status register bits, to improve readability.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Delete the binary blobs in pc-bios where we don't have corresponding
source in this git repository. This avoids problems with potentially
redistributing GPLed binaries without source; we don't need any
of them for ARM targets anyway. See:
https://bugs.launchpad.net/qemu-linaro/+bug/709965
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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In configure and Makefile, don't insist on the presence of the
binary blobs in pc-bios, but silently skip any which aren't
present. This allows us to delete them from the repository
without causing build failures.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Add a Changelog.LINARO to document the changes we make between
qemu-linaro releases.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Add a VERSION.LINARO file so it's clear that tarball releases are
from Linaro rather than upstream, and make the configure pkgversion
default to the Linaro version number so that the -version option
says Linaro too (even if the user built from the tarball without
specifying -pkgversion to configure).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Changes in the status register are immediately in effect, i.e. the guest
does not need to read the status register first before writing changes to it.
This change may cause problems if guest code does not handle properly the
case where transfers get completed immediately when initiated.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Remove code which was erroneously overriding the detection of a CHSETUP
header in an OMAP boot image loaded from an MMC card. Newer versions
of x-loader create MLO files which include this CHSETUP header, and
if we don't correctly skip over it to the actual code then they won't
boot.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Add a dummy implementation of the BCISIHCTRL register to the twl4030.
BCI interrupts are not currently implemented, but recent Linux kernels
try to write to this register so we need to at least support reading
and writing the register, so the kernel will boot.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Newer kernels are large enough that they can overlap the address
qemu places the initrd. Move the initrd up so that there is
enough space for the kernel again.
Unfortunately it's not possible to automatically determine the
size of the kernel if it is compressed, so this is the best we
can do.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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(part of a commit by Juha)
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The SDIO specification introduces new commands 52 and 53.
Handle as illegal command but do not complain on stderr,
as SDIO-aware OSes may legitimately use these in their
probing for presence of an SDIO card.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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This commit implements the prefetch engine feature of the GPMC
which can be used for NAND devices. This includes both interrupt
driven and DMA-filling modes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Refactor the gpmc state structure so items relating to
the prefetch engine are in their own sub-struct and have
more useful names.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The OMAP3 TRM is inconsistent about whether the GPMC FIFOTHRESHOLDSTATUS
bit should be set when FIFOPOINTER > FIFOTHRESHOLD or when it is >=
FIFOTHRESHOLD. Apparently the underlying functional spec from which
the TRM was created states that the behaviour is ">=", and this also
makes more conceptual sense.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The omap_gpmc wasn't actually wiring up its IRQ, so
anything that provoked an interrupt would be using
uninitialised data for its IRQ number.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Fix a bug in the handling of writes to GPMC_IRQSTATUS:
it behaves as "write one to clear, writing zero is ignored".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Refactor omap_gpmc_cs_map and omap_gpmc_cs_unmap() so that:
* they take the top level struct and a chipselect rather
than the cs_file struct
* the 'is CSVALID set?' check is done by them rather than
by all callers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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The 'beagle' machine identifies itself via the GPIO ID pins as a
BeagleBoard revision C4; this revision has 256MB of RAM, not 128.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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this patch also changes the reported rtc time from local time to utc.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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While on some OMAP models 16-bit or 32-bit access to the UART registers
can cause data corruption, modelling the faulty behavior is mostly useless
and even the current implementation of it is inaccurate. Since there is
software that does 32-bit access to the registers it should be allowed.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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The OMAP GPMC is supposed to map NAND memory devices into its
address space so that any access behaves like an access to the
appropriate GPMC_NAND_DATA_i register; implement this behaviour
in the model.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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- do not map boot rom at address zero
- make use of the arm cp15 vector base address register
- run boot rom emulation from omap3 instead of board
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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Recent Linux kernels support both beagle and beagle XM, add the GPIO's
to detect between C4 beagle and beagle XM. Add also XM machine defintion
(comes with 512MB of RAM),
Some whitespace cleanup too.
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