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2016-01-08HACK: rearrange the virt memory map to suit OP-TEEmulti-ases-2Peter Maydell
The current OP-TEE codebase expects the secure UART to be at 0x09010000 and irq 2 (it is based on an old non-upstream patch to add a second uart, and upstream used that memory map area for something else). When the TZ support is upstream in QEMU we can move OP-TEE on to a proper upstream QEMU and update it to use the new UART location, but for now this hack patch allows running a more-or-less unmodified OP-TEE. Put the secure UART at the address and irq where OP-TEE expects it, moving some other devices down to make space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08hw/arm/virt: add secure memory region and UARTPeter Maydell
Add a secure memory region to the virt board, which is the same as the nonsecure memory region except that it also has a secure-only UART in it. This is only created if the board is started with the '-machine secure=on' property. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08hw/arm/virt: Wire up memory region to CPUs explicitlyPeter Maydell
Wire up the system memory region to the CPUs explicitly by setting the QOM property. This doesn't change anything over letting it default, but will be needed for adding a secure memory region later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-08target-arm: Support multiple address spaces in page table walksPeter Maydell
If we have a secure address space, use it in page table walks: when doing the physical accesses to read descriptors, make them through the correct address space. (The descriptor reads are the only direct physical accesses made in target-arm/ for CPUs which might have TrustZone.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08target-arm: Implement cpu_get_phys_page_attrs_debugPeter Maydell
Implement cpu_get_phys_page_attrs_debug instead of cpu_get_phys_page_debug. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08target-arm: Implement asidx_from_attrsPeter Maydell
Implement the asidx_from_attrs CPU method to return the Secure or NonSecure address space as appropriate. (The function is inline so we can use it directly in target-arm code to be added in later patches.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08target-arm: Add QOM property for Secure memory regionPeter Maydell
Add QOM property to the ARM CPU which boards can use to tell us what memory region to use for secure accesses. Nonsecure accesses go via the memory region specified with the base CPU class 'memory' property. By default, if no secure region is specified it is the same as the nonsecure region, and if no nonsecure region is specified we will use address_space_memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08qom/cpu: Add MemoryRegion propertyPeter Crosthwaite
Add a MemoryRegion property, which if set is used to construct the CPU's initial (default) AddressSpace. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: code is moved from qom/cpu.c to exec.c to avoid having to make qom/cpu.o be a non-common object file; code to use the MemoryRegion and to default it to system_memory added.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08memory: Add address_space_init_shareable()Peter Crosthwaite
This will either create a new AS or return a pointer to an already existing equivalent one, if we have already created an AS for the specified root memory region. The motivation is to reuse address spaces as much as possible. It's going to be quite common that bus masters out in device land have pointers to the same memory region for their mastering yet each will need to create its own address space. Let the memory API implement sharing for them. Aside from the perf optimisations, this should reduce the amount of redundant output on info mtree as well. Thee returned value will be malloced, but the malloc will be automatically freed when the AS runs out of refs. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: dropped check for NULL root as unused; added doc-comment; squashed Peter C's reference-counting patch into this one; don't compare name string when deciding if we can share ASes; read as->malloced before the unref of as->root to avoid possible read-after-free if as->root was the owner of as] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_writePeter Maydell
In the watchpoint access routines watch_mem_read and watch_mem_write, find the correct AddressSpace to use from current_cpu and the memory transaction attributes, rather than always assuming address_space_memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec.c: Use cpu_get_phys_page_attrs_debugPeter Maydell
Use cpu_get_phys_page_attrs_debug() when doing virtual-to-physical conversions in debug related code, so that we can obtain the right address space index and thus select the correct AddressSpace, rather than always using cpu->as. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec.c: Add cpu_get_address_space()Peter Maydell
Add a function to return the AddressSpace for a CPU based on its numerical index. (Callers outside exec.c don't have access to the CPUAddressSpace struct so can't just fish it out of the CPUState struct directly.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right ASPeter Maydell
Pass the MemTxAttrs for the memory access to iotlb_to_region(); this allows it to determine the correct AddressSpace to use for the lookup. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08cputlb.c: Use correct address space when looking up MemoryRegionSectionPeter Maydell
When looking up the MemoryRegionSection for the new TLB entry in tlb_set_page_with_attrs(), use cpu_asidx_from_attrs() to determine the correct address space index for the lookup, and pass it into address_space_translate_for_iotlb(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08cpu: Add new asidx_from_attrs() methodPeter Maydell
Add a new method to CPUClass which the memory system core can use to obtain the correct address space index to use for a memory access with a given set of transaction attributes, together with the wrapper function cpu_asidx_from_attrs() which implements the default behaviour ("always use asidx 0") for CPU classes which don't provide the method. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08cpu: Add new get_phys_page_attrs_debug() methodPeter Maydell
Add a new optional method get_phys_page_attrs_debug() to CPUClass. This is like the existing get_phys_page_debug(), but also returns the memory transaction attributes to use for the access. This will be necessary for CPUs which have multiple address spaces and use the attributes to select the correct address space. We provide a wrapper function cpu_get_phys_page_attrs_debug() which falls back to the existing get_phys_page_debug(), so we don't need to change every target CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec-all.h: Document tlb_set_page_with_attrs, tlb_set_pagePeter Maydell
Add documentation comments for tlb_set_page_with_attrs() and tlb_set_page(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec.c: Allow target CPUs to define multiple AddressSpacesPeter Maydell
Allow multiple calls to cpu_address_space_init(); each call adds an entry to the cpu->ases array at the specified index. It is up to the target-specific CPU code to actually use these extra address spaces. Since this multiple AddressSpace support won't work with KVM, add an assertion to avoid confusing failures. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-08exec.c: Don't set cpu->as until cpu_address_space_initPeter Maydell
Rather than setting cpu->as unconditionally in cpu_exec_init (and then having target-i386 override this later), don't set it until the first call to cpu_address_space_init. This requires us to initialise the address space for both TCG and KVM (KVM doesn't need the AS listener but it does require cpu->as to be set). For target CPUs which don't set up any address spaces (currently everything except i386), add the default address_space_memory in qemu_init_vcpu(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-08Merge remote-tracking branch ↵Peter Maydell
'remotes/maxreitz/tags/pull-block-for-peter-2016-01-07' into staging Block patches from 2015-12-23 until 2016-01-07. # gpg: Signature made Thu 07 Jan 2016 22:46:08 GMT using RSA key ID E838ACAD # gpg: Good signature from "Max Reitz <mreitz@redhat.com>" * remotes/maxreitz/tags/pull-block-for-peter-2016-01-07: (21 commits) iotests: Add test cases for blockdev-mirror qmp: Add blockdev-mirror command block: Add check on mirror target block: Extract blockdev part of qmp_drive_mirror block: Rename BLOCK_OP_TYPE_MIRROR to BLOCK_OP_TYPE_MIRROR_SOURCE qemu-iotests: s390x: fix test 051 iotests: 095: Filter _img_info output iotests: 095: Use TEST_IMG override instead of "mv" iotests: 050: Use TEST_IMG override instead of "mv" iotests: 038: Use TEST_IMG override instead of "mv" iotests: 037: Use TEST_IMG override instead of "mv" iotests: 034: Use TEST_IMG override instead of "mv" iotests: 028: Use TEST_IMG override instead of "mv" iotests: 024: Use TEST_IMG override instead of "mv" iotests: 020: Use TEST_IMG override instead of "mv" iotests: 019: Use TEST_IMG override instead of "mv" iotests: 018: Use TEST_IMG override instead of "mv" block/qapi: Clear err for further error block: use drained section in bdrv_close qemu-iotests: make check-block.sh work on out-of-tree builds ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-07iotests: Add test cases for blockdev-mirrorFam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450932306-13717-6-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07qmp: Add blockdev-mirror commandFam Zheng
This will start a mirror job from a named device to another named device, its relation with drive-mirror is similar with blockdev-backup to drive-backup. In blockdev-mirror, the target node should be prepared by blockdev-add, which will be responsible for assigning a name to the new node, so we don't have 'node-name' parameter. Signed-off-by: Fam Zheng <famz@redhat.com> Acked-by: Markus Armbruster <armbru@redhat.com> Message-id: 1450932306-13717-5-git-send-email-famz@redhat.com Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07block: Add check on mirror targetFam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450932306-13717-4-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07block: Extract blockdev part of qmp_drive_mirrorFam Zheng
This is the part that will be reused by blockdev-mirror. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450932306-13717-3-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07block: Rename BLOCK_OP_TYPE_MIRROR to BLOCK_OP_TYPE_MIRROR_SOURCEFam Zheng
It's necessary to distinguish source and target before we can add blockdev-mirror, because we would want a concrete type of operation to check on target bs before starting. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450932306-13717-2-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07qemu-iotests: s390x: fix test 051Bo Tu
Replace the remaining "-drive file..." by "-drive file=...,if=none,id=$device_id", then x86 and s390x can get the common output. "if=ide, if=floppy, if=scsi" are not supported by s390x, so these test cases are not executed for s390x platform. Signed-off-by: Bo Tu <tubo@linux.vnet.ibm.com> Message-id: 1451885360-20236-2-git-send-email-tubo@linux.vnet.ibm.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 095: Filter _img_info outputFam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Message-id: 1450752561-9300-12-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 095: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Message-id: 1450752561-9300-11-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 050: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-10-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 038: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-9-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 037: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-8-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 034: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-7-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 028: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-6-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 024: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-5-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 020: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-4-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 019: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-3-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 018: Use TEST_IMG override instead of "mv"Fam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 1450752561-9300-2-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07block/qapi: Clear err for further errorFam Zheng
Since a5002d5 (block/qapi: allow best-effort query) we don't return at this error, however err must be cleared before passing to bdrv_query_snapshot_info_list below, as required by error API. Signed-off-by: Fam Zheng <famz@redhat.com> Message-id: 1450779107-26765-1-git-send-email-famz@redhat.com Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07block: use drained section in bdrv_closePaolo Bonzini
bdrv_close is used when ejecting a medium. Use a drained section to ensure that all I/O goes to either the old medium or the bitbucket. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1450867706-19860-2-git-send-email-pbonzini@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07qemu-iotests: make check-block.sh work on out-of-tree buildsPaolo Bonzini
Since check-block.sh, the "check" script has learnt to find the source path. On the other hand, it expects common.env to be in the build tree (both changes made in commit 76c7560, "configure: Enable out-of-tree iotests", 2014-05-24). So, it is wrong to invoke "check" from the source path like check-block.sh does. Fix it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1450867341-11100-1-git-send-email-pbonzini@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07iotests: 086: Add raw formatFam Zheng
Raw is as qualified as qcow2 for this test case, add it for more coverage. Signed-off-by: Fam Zheng <famz@redhat.com> Message-id: 1450851979-15580-1-git-send-email-famz@redhat.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2016-01-07petalogix-ml605: Set the MicroBlaze CPU version to 8.10.aEdgar E. Iglesias
Set the MicroBlaze CPU version to 8.10.a avoiding a runtime warning due to an unset CPU version. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-07s3adsp1800: Set the MicroBlaze CPU version to 7.10.dEdgar E. Iglesias
Set the MicroBlaze CPU version to 7.10.d avoiding a runtime warning due to an unset CPU version. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-07Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into ↵Peter Maydell
staging qemu-sparc update # gpg: Signature made Thu 07 Jan 2016 13:20:13 GMT using RSA key ID AE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" * remotes/mcayland/tags/qemu-sparc-signed: target-sparc: implement NPT timer bit sun4u: split NPT and INT_DIS accesses between timer and compare registers sun4u: split out NPT and INT_DIS into separate CPUTimer fields Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-07target-sparc: implement NPT timer bitMark Cave-Ayland
If the NPT bit is set in the timer register, all non-supervisor read accesses to the register should fail with a privilege exception. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-By: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-01-07sun4u: split NPT and INT_DIS accesses between timer and compare registersMark Cave-Ayland
Accesses to the timer register high bit should only set NPT, whilst accesses to the timer compare register high bit should only set INT_DIS. This fixes issues with the timer being unexpectedly disabled whilst trying to boot FreeBSD SPARC64. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-By: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-01-07sun4u: split out NPT and INT_DIS into separate CPUTimer fieldsMark Cave-Ayland
Currently there is confusion between use of these bits for the timer and timer compare registers (while they both have the same value, the behaviour is different). Split into two separate CPUTimer fields so we can always reference the correct value. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-By: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-01-07Merge remote-tracking branch 'remotes/kraxel/tags/pull-seabios-20160105-1' ↵Peter Maydell
into staging seabios: update to release 1.9.0 # gpg: Signature made Tue 05 Jan 2016 12:07:22 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-seabios-20160105-1: seabios: update binaries to release 1.9.0 seabios: stop updating aml files seabios: update 128k bios config seabios: use new EXTRAVERSION to tag qemu builds seabios: update submodule to release 1.9.0 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-07Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' ↵Peter Maydell
into staging # gpg: Signature made Thu 07 Jan 2016 09:13:22 GMT using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/tracing-pull-request: trace: add make dependencies on tracetool source trace: fix make foo-timestamp rules trace: fix PRIx64 constants in trace-events trace: reflect the file name change Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-07trace: add make dependencies on tracetool sourceStefan Hajnoczi
Patches that change tracetool can break the build if old build output files are lying around. This happens because the Makefile does not specify dependencies on tracetool. The build will use old object files that do not match the current source code. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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