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2016-01-14HACK: rearrange the virt memory map to suit OP-TEEmulti-asesPeter Maydell
The current OP-TEE codebase expects the secure UART to be at 0x09010000 and irq 2 (it is based on an old non-upstream patch to add a second uart, and upstream used that memory map area for something else). When the TZ support is upstream in QEMU we can move OP-TEE on to a proper upstream QEMU and update it to use the new UART location, but for now this hack patch allows running a more-or-less unmodified OP-TEE. Put the secure UART at the address and irq where OP-TEE expects it, moving some other devices down to make space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14hw/arm/virt: add secure memory region and UARTPeter Maydell
Add a secure memory region to the virt board, which is the same as the nonsecure memory region except that it also has a secure-only UART in it. This is only created if the board is started with the '-machine secure=on' property. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14hw/arm/virt: Wire up memory region to CPUs explicitlyPeter Maydell
Wire up the system memory region to the CPUs explicitly by setting the QOM property. This doesn't change anything over letting it default, but will be needed for adding a secure memory region later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14target-arm: Support multiple address spaces in page table walksPeter Maydell
If we have a secure address space, use it in page table walks: when doing the physical accesses to read descriptors, make them through the correct address space. (The descriptor reads are the only direct physical accesses made in target-arm/ for CPUs which might have TrustZone.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14target-arm: Implement cpu_get_phys_page_attrs_debugPeter Maydell
Implement cpu_get_phys_page_attrs_debug instead of cpu_get_phys_page_debug. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14target-arm: Implement asidx_from_attrsPeter Maydell
Implement the asidx_from_attrs CPU method to return the Secure or NonSecure address space as appropriate. (The function is inline so we can use it directly in target-arm code to be added in later patches.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14target-arm: Add QOM property for Secure memory regionPeter Maydell
Add QOM property to the ARM CPU which boards can use to tell us what memory region to use for secure accesses. Nonsecure accesses go via the memory region specified with the base CPU class 'memory' property. By default, if no secure region is specified it is the same as the nonsecure region, and if no nonsecure region is specified we will use address_space_memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14qom/cpu: Add MemoryRegion propertyPeter Crosthwaite
Add a MemoryRegion property, which if set is used to construct the CPU's initial (default) AddressSpace. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: code is moved from qom/cpu.c to exec.c to avoid having to make qom/cpu.o be a non-common object file; code to use the MemoryRegion and to default it to system_memory added.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14memory: Add address_space_init_shareable()Peter Crosthwaite
This will either create a new AS or return a pointer to an already existing equivalent one, if we have already created an AS for the specified root memory region. The motivation is to reuse address spaces as much as possible. It's going to be quite common that bus masters out in device land have pointers to the same memory region for their mastering yet each will need to create its own address space. Let the memory API implement sharing for them. Aside from the perf optimisations, this should reduce the amount of redundant output on info mtree as well. Thee returned value will be malloced, but the malloc will be automatically freed when the AS runs out of refs. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: dropped check for NULL root as unused; added doc-comment; squashed Peter C's reference-counting patch into this one; don't compare name string when deciding if we can share ASes; read as->malloced before the unref of as->root to avoid possible read-after-free if as->root was the owner of as] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_writePeter Maydell
In the watchpoint access routines watch_mem_read and watch_mem_write, find the correct AddressSpace to use from current_cpu and the memory transaction attributes, rather than always assuming address_space_memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec.c: Use cpu_get_phys_page_attrs_debugPeter Maydell
Use cpu_get_phys_page_attrs_debug() when doing virtual-to-physical conversions in debug related code, so that we can obtain the right address space index and thus select the correct AddressSpace, rather than always using cpu->as. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec.c: Add cpu_get_address_space()Peter Maydell
Add a function to return the AddressSpace for a CPU based on its numerical index. (Callers outside exec.c don't have access to the CPUAddressSpace struct so can't just fish it out of the CPUState struct directly.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right ASPeter Maydell
Pass the MemTxAttrs for the memory access to iotlb_to_region(); this allows it to determine the correct AddressSpace to use for the lookup. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14cputlb.c: Use correct address space when looking up MemoryRegionSectionPeter Maydell
When looking up the MemoryRegionSection for the new TLB entry in tlb_set_page_with_attrs(), use cpu_asidx_from_attrs() to determine the correct address space index for the lookup, and pass it into address_space_translate_for_iotlb(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14cpu: Add new asidx_from_attrs() methodPeter Maydell
Add a new method to CPUClass which the memory system core can use to obtain the correct address space index to use for a memory access with a given set of transaction attributes, together with the wrapper function cpu_asidx_from_attrs() which implements the default behaviour ("always use asidx 0") for CPU classes which don't provide the method. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14cpu: Add new get_phys_page_attrs_debug() methodPeter Maydell
Add a new optional method get_phys_page_attrs_debug() to CPUClass. This is like the existing get_phys_page_debug(), but also returns the memory transaction attributes to use for the access. This will be necessary for CPUs which have multiple address spaces and use the attributes to select the correct address space. We provide a wrapper function cpu_get_phys_page_attrs_debug() which falls back to the existing get_phys_page_debug(), so we don't need to change every target CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec-all.h: Document tlb_set_page_with_attrs, tlb_set_pagePeter Maydell
Add documentation comments for tlb_set_page_with_attrs() and tlb_set_page(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec.c: Allow target CPUs to define multiple AddressSpacesPeter Maydell
Allow multiple calls to cpu_address_space_init(); each call adds an entry to the cpu->ases array at the specified index. It is up to the target-specific CPU code to actually use these extra address spaces. Since this multiple AddressSpace support won't work with KVM, add an assertion to avoid confusing failures. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14exec.c: Don't set cpu->as until cpu_address_space_initPeter Maydell
Rather than setting cpu->as unconditionally in cpu_exec_init (and then having target-i386 override this later), don't set it until the first call to cpu_address_space_init. This requires us to initialise the address space for both TCG and KVM (KVM doesn't need the AS listener but it does require cpu->as to be set). For target CPUs which don't set up any address spaces (currently everything except i386), add the default address_space_memory in qemu_init_vcpu(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-14Merge remote-tracking branch 'remotes/amit/tags/vs-for-2.6-1' into stagingPeter Maydell
small change to qom'ify virtio-serial # gpg: Signature made Wed 13 Jan 2016 09:51:18 GMT using RSA key ID 854083B6 # gpg: Good signature from "Amit Shah <amit@amitshah.net>" # gpg: aka "Amit Shah <amit@kernel.org>" # gpg: aka "Amit Shah <amitshah@gmx.net>" * remotes/amit/tags/vs-for-2.6-1: virtio serial port: fix to incomplete QOMify Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-14Merge remote-tracking branch ↵Peter Maydell
'remotes/amit-migration/tags/migration-for-2.6-1' into staging migration fixes for postcopy, xbzrle, multithread decompression # gpg: Signature made Wed 13 Jan 2016 10:34:49 GMT using RSA key ID 854083B6 # gpg: Good signature from "Amit Shah <amit@amitshah.net>" # gpg: aka "Amit Shah <amit@kernel.org>" # gpg: aka "Amit Shah <amitshah@gmx.net>" * remotes/amit-migration/tags/migration-for-2.6-1: multithread decompression: Avoid one copy Use qemu_get_buffer_in_place for xbzrle data Migration: Emit event at start of pass Postcopy: Send events/change state on incoming side migration: Add state records for migration incoming migration: Export migrate_set_state() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-13multithread decompression: Avoid one copyDr. David Alan Gilbert
qemu_get_buffer does a copy, we can avoid the memcpy, and we can then remove the extra buffer. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Liang Li <liang.z.li@intel.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Message-Id: <1450266458-3178-7-git-send-email-dgilbert@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-13Use qemu_get_buffer_in_place for xbzrle dataDr. David Alan Gilbert
Avoid a data copy (if we're lucky) in the xbzrle code. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Message-Id: <1450266458-3178-6-git-send-email-dgilbert@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-13Migration: Emit event at start of passDr. David Alan Gilbert
Emit an event each time we sync the dirty bitmap on the source; this helps libvirt use postcopy by giving it a kick when it might be a good idea to start the postcopy. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Message-Id: <1450266458-3178-5-git-send-email-dgilbert@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-13Postcopy: Send events/change state on incoming sideDr. David Alan Gilbert
I missed the calls to send migration events on the destination side as we enter postcopy. Take care when adding them not to do it after state has been freed. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: zhanghailiang <zhang.zhanghailiang@huawei.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Message-Id: <1450266458-3178-4-git-send-email-dgilbert@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-13migration: Add state records for migration incomingzhanghailiang
For migration destination, we also need to know its state, we will use it in COLO. Here we add a new member 'state' for MigrationIncomingState, and also use migrate_set_state() to modify its value. Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com> dgilbert: Fixed early free of MigraitonIncomingState Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Message-Id: <1450266458-3178-3-git-send-email-dgilbert@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-13migration: Export migrate_set_state()zhanghailiang
Change the first parameter of migrate_set_state(), and export it. We will use it in a later patch to update incoming state. Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> dgilbert: Updated comment as per Juan's review Message-Id: <1450266458-3178-2-git-send-email-dgilbert@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-13virtio serial port: fix to incomplete QOMifyCao jin
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Message-Id: <1452068575-21543-1-git-send-email-caoj.fnst@cn.fujitsu.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2016-01-12Merge remote-tracking branch 'remotes/kvaneesh/tags/for-upstream-signed' ↵Peter Maydell
into staging VirtFS update: Cleanups mostly isolating virtio related details into separate files. This is done to enable easy addition of Xen transport for VirtFS. The changes include: 1. Rename a bunch of files and functions to make clear they are generic. 2. disentangle virtio transport code and generic 9pfs code. 3. Some function name clean-up. # gpg: Signature made Tue 12 Jan 2016 06:04:35 GMT using RSA key ID 04C4E23A # gpg: Good signature from "Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4846 9DE7 1860 360F A6E9 968C DE41 A4FE 04C4 E23A * remotes/kvaneesh/tags/for-upstream-signed: (25 commits) 9pfs: introduce V9fsVirtioState 9pfs: factor out v9fs_device_{,un}realize_common 9pfs: rename virtio-9p.c to 9p.c 9pfs: rename virtio_9p_set_fd_limit to use v9fs_ prefix 9pfs: move handle_9p_output and make it static function 9pfs: export pdu_{submit,alloc,free} 9pfs: factor out virtio_9p_push_and_notify 9pfs: break out 9p.h from virtio-9p.h 9pfs: break out virtio_init_iov_from_pdu 9pfs: factor out pdu_push_and_notify 9pfs: factor out virtio_pdu_{,un}marshal 9pfs: make pdu_{,un}marshal proper functions 9pfs: PDU processing functions should start pdu_ prefix 9pfs: PDU processing functions don't need to take V9fsState as argument fsdev: rename virtio-9p-marshal.{c,h} to 9p-iov-marshal.{c,h} fsdev: break out 9p-marshal.{c,h} from virtio-9p-marshal.{c,h} 9pfs: remove dead code 9pfs: merge hw/virtio/virtio-9p.h into hw/9pfs/virtio-9p.h 9pfs: rename virtio-9p-xattr{,-user}.{c,h} to 9p-xattr{,-user}.{c,h} 9pfs: rename virtio-9p-synth.{c,h} to 9p-synth.{c,h} ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-12disas/libvixl: Suppress gcc 4.6.3 sign-compare warningsPeter Maydell
The VIXL code includes some equality comparisons between signed and unsigned types. Modern gcc and clang do not complain about these, but older versions of gcc such as gcc 4.6.3 do. Since libvixl is an upstream library, the simplest approach is to suppress the warnings by applying -Wno-sign-compare to the relevant files. (GCC 4.6 is not quite yet irrelevant for us; it is the gcc shipped with Ubuntu Precise, for example, which is an LTS release not yet out of its support period.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1452604204-27202-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2016-01-12Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into stagingPeter Maydell
# gpg: Signature made Mon 11 Jan 2016 19:16:27 GMT using RSA key ID AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" * remotes/jnsnow/tags/ide-pull-request: libqos/ahci: organize header qtest/ahci: ATAPI data tests libqos/ahci: add ahci_exec libqos/ahci: allow nondata commands for ahci_io variants libqos: allow zero-size allocations libqos/ahci: Switch to mutable properties libqos/ahci: ATAPI identify libqos/ahci: ATAPI support ahci-test: fix memory leak ide: ahci: reset ncq object to unused on error macio: fix overflow in lba to offset conversion for ATAPI devices Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-129pfs: introduce V9fsVirtioStateWei Liu
V9fsState now only contains generic fields. Introduce V9fsVirtioState for virtio transport. Change virtio-pci and virtio-ccw to use V9fsVirtioState. Signed-off-by: Wei Liu <wei.liu2@citrix.com> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
2016-01-11libqos/ahci: organize headerJohn Snow
Organize the prototypes into nice little sections. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-10-git-send-email-jsnow@redhat.com
2016-01-11qtest/ahci: ATAPI data testsJohn Snow
Simple I/O tests for DMA and PIO pathways in the AHCI HBA. I believe at this point in time all of the common, major IO pathways in BMDMA and AHCI are covered by qtests now. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-9-git-send-email-jsnow@redhat.com
2016-01-11libqos/ahci: add ahci_execJohn Snow
add ahci_exec, which is a standard purpose flexible command dispatcher and tester for the AHCI device. The intent is to eventually cut down on the absurd amount of boilerplate inside of the AHCI qtest. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-8-git-send-email-jsnow@redhat.com
2016-01-11libqos/ahci: allow nondata commands for ahci_io variantsJohn Snow
These variants try to set a data offset, even if you don't specify one. In the cases where the offset is zero and it's a nondata command, just ignore the instruction. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-7-git-send-email-jsnow@redhat.com
2016-01-11libqos: allow zero-size allocationsJohn Snow
As part of streamlining the AHCI tests interface, it'd be nice if specying a size of zero could be handled without special branches and the allocator could handle this special case gracefully. This lets me use the "ahci_io" macros for non-data commands, too, which moves me forward towards shepherding all AHCI qtests into a common set of commands in a unified pipeline. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-6-git-send-email-jsnow@redhat.com
2016-01-11libqos/ahci: Switch to mutable propertiesJohn Snow
ATAPI commands are, unfortunately, weird in that they can be either DMA or PIO depending on a header bit. In order to accommodate them, I'll need to make AHCI command properties mutable so we can toggle between which "flavor" of ATAPI command we want to test. The default ATAPI transfer mechanism is PIO and the default properties are adjusted accordingly. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-5-git-send-email-jsnow@redhat.com
2016-01-11libqos/ahci: ATAPI identifyJohn Snow
We need to say "hello!" to our ATAPI friends in a slightly different manner. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-4-git-send-email-jsnow@redhat.com
2016-01-11libqos/ahci: ATAPI supportJohn Snow
Add pathways to tolerate ATAPI commands. Notably, unlike ATA, each SCSI command's layout is a little different, so support will have to be patched in for each command as we want to test them in e.g. ahci_command_set_sizes and ahci_command_set_offset. For now, I'm adding support for 0x28, READ (10). [Maintainer edit: replaced type-punning with stl_be_p(). --js] Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-3-git-send-email-jsnow@redhat.com
2016-01-11ahci-test: fix memory leakJohn Snow
Use the proper free command to detroy an AHCICommand. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-2-git-send-email-jsnow@redhat.com
2016-01-11ide: ahci: reset ncq object to unused on errorPrasad J Pandit
When processing NCQ commands, AHCI device emulation prepares a NCQ transfer object; To which an aio control block(aiocb) object is assigned in 'execute_ncq_command'. In case, when the NCQ command is invalid, the 'aiocb' object is not assigned, and NCQ transfer object is left as 'used'. This leads to a use after free kind of error in 'bdrv_aio_cancel_async' via 'ahci_reset_port'. Reset NCQ transfer object to 'unused' to avoid it. [Maintainer edit: s/ACHI/AHCI/ in the commit message. --js] Reported-by: Qinghao Tang <luodalongde@gmail.com> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 1452282511-4116-1-git-send-email-ppandit@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2016-01-11macio: fix overflow in lba to offset conversion for ATAPI devicesMark Cave-Ayland
As the IDEState lba field is an int32_t, make sure we cast to int64_t before shifting to calculate the offset. Otherwise we end up with an overflow when trying to access sectors beyond 2GB as can occur when using DVD images. [Maintainer edit: fixed extraneous parentheses. --js] Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 1451928613-29476-1-git-send-email-mark.cave-ayland@ilande.co.uk Signed-off-by: John Snow <jsnow@redhat.com>
2016-01-11Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20160111-1' into staging target-arm queue: * i.MX: move i.MX31 CCM object to register array * xilinx_axidma: remove dead code * disas/libvixl: Update to upstream VIXL 1.12 * virt: Support legacy -nic command line syntax # gpg: Signature made Mon 11 Jan 2016 16:05:58 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20160111-1: hw/arm/virt: Support legacy -nic command line syntax disas/libvixl: Update to upstream VIXL 1.12 hw/dma/xilinx_axidma: remove dead code i.MX: move i.MX31 CCM object to register array Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11hw/arm/virt: Support legacy -nic command line syntaxpull-target-arm-20160111-1Ashok Kumar
Support the legacy -nic syntax for creating PCI network devices as well as the new-style -device options. This makes life easier for people moving from x86 KVM virtualization to ARM KVM virtualization and expecting their network configuration options to work the same way for both setups. We use "virtio" as the default NIC model if the user doesn't specify one. Signed-off-by: Ashok Kumar <ashoks@broadcom.com> Message-id: 1452091659-17698-1-git-send-email-ashoks@broadcom.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: expanded and clarified commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11disas/libvixl: Update to upstream VIXL 1.12Peter Maydell
Update our copy of libvixl to upstream's 1.12 release. The major benefit from QEMU's point of view is that some instructions previously disassembled as "unimplemented (System)" are now displayed as something more useful. It also fixes some warnings about format strings that newer w64-mingw32 compilers were emitting. We didn't have any local changes to libvixl so nothing needed to be forward-ported. Although this is a large commit (due to upstream renaming most of the files), only a few of the files changed in this commit are not just straight copies of upstream libvixl files: disas/arm-a64.cc disas/libvixl/Makefile.objs disas/libvixl/README Note that this commit introduces some signed-unsigned comparison warnings on the old mingw compilers. Those compilers have broken TLS support anyway so have only ever been much use for compile tests; anybody still using them should add -Wno-sign-compare to their --extra-cflags. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11hw/dma/xilinx_axidma: remove dead codeAndrew Jones
stream_desc_show() (and DEBUG_ENET) appear to be unused, as the function isn't compilable (there are broken PRI format strings). Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1452084792-17424-1-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11i.MX: move i.MX31 CCM object to register arrayJean-Christophe DUBOIS
With this i.MX25 and i.MX31 will have closer implementations. Moreover all i.MX31 CCM registers are now present. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160111' ↵Peter Maydell
into staging January 2016 Linux-user queque # gpg: Signature made Mon 11 Jan 2016 14:13:57 GMT using RSA key ID DE3C9BC0 # gpg: Good signature from "Riku Voipio <riku.voipio@iki.fi>" # gpg: aka "Riku Voipio <riku.voipio@linaro.org>" * remotes/riku/tags/pull-linux-user-20160111: linux-user/mmap.c: Use end instead of real_end in target_mmap linux-user: Add SOCKOP_sendmmsg and SOCKOP_recvmmsg socket call, wire them up. linux-user: Update m68k syscall definitions to match Linux 4.4. linux-user/syscall.c: Use SOL_SOCKET instead of level for setsockopt() linux-user: enable sigaltstack for all architectures unicore32: convert get_sp_from_cpustate from macro to inline linux-user/mmap.c: Always zero MAP_ANONYMOUS memory in mmap_frag() linux-user,sh4: fix signal retcode address linux-user: check fd is >= 0 in fd_trans_host_to_target_data/fd_trans_host_to_target_addr linux-user: manage bind with a socket of SOCK_PACKET type. linux-user: add a function hook to translate sockaddr linux-user: rename TargetFdFunc to TargetFdDataFunc, and structure fields accordingly linux-user: SOCK_PACKET uses network endian to encode protocol in socket() linux-user/syscall.c: malloc()/calloc() to g_malloc()/g_try_malloc()/g_new0() linux-user: in poll(), if nfds is 0, pfd can be NULL linux-user: correctly align target_epoll_event linux-user: add signalfd/signalfd4 syscalls Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11linux-user/mmap.c: Use end instead of real_end in target_mmapChen Gang
The fragment must effectively be mapped only to "end" not to "real_end" (which is a host page aligned address, and thus this is not a fragment). It is consistent with what it is done in the case of one single page. Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>