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2012-03-19Merge remote-tracking branch 'qemu-kvm/memory/urgent' into stagingAnthony Liguori
* qemu-kvm/memory/urgent: (42 commits) memory: check for watchpoints when getting code ram_addr exec: fix write tlb entry misused as iotlb Sparc: avoid AREG0 wrappers for memory access helpers Sparc: avoid AREG0 for memory access helpers TCG: add 5 arg helpers to def-helper.h softmmu templates: optionally pass CPUState to memory access functions i386: Remove REGPARM sparc64: implement PCI and ISA irqs sparc: reset CPU state on reset apb: use normal PCI device header for PBM device w64: Fix data type of next_tb and tcg_qemu_tb_exec softfloat: fix for C99 vmstate: fix varrays with uint32_t indexes Fix large memory chunks allocation with tcg_malloc. hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state ARM: Remove unnecessary subpage workarounds malta: Fix display for LED array malta: Use symbolic hardware addresses ...
2012-03-19Merge remote-tracking branch 'qmp/queue/qmp' into stagingAnthony Liguori
* qmp/queue/qmp: qapi: Convert migrate Purge migration of (almost) everything to do with monitors Error: Introduce error_copy() QError: Introduce new errors for the migration command
2012-03-19spice: fix broken initializationAlon Levy
Commit 1b71f7c14fab6f00c2680d4489fbee7baf796e4f moved MODULE_INIT_QOM to way before MODULE_INIT_MACHINE, thereby breaking assumptions made in spice-core.c which registered both a type initializer and a machine intializer. This fix removes the type registration, and replaces it with calling qemu_spice_init in vl.c after command line parsing (second pass) is done, and after timers are armed, required by spice server. Signed-off-by: Alon Levy <alevy@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19hw/qxl.c: Fix compilation failures on 32 bit hostsPeter Maydell
Fix compilation failures on 32 bit hosts (cast from pointer to integer of different size; %ld expects 'long int' not uint64_t). Reported-by: Steve Langasek <steve.langasek@canonical.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qxl/qxl_render.c: add trace eventsAlon Levy
Signed-off-by: Alon Levy <alevy@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qxl: switch qxl.c to trace-eventsAlon Levy
dprint is still used for qxl_init_common one time prints. also switched parts of spice-display.c over, mainly all the callbacks to spice server. All qxl device trace events start with the qxl device id. Signed-off-by: Alon Levy <alevy@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qxl: init_pipe_signaling: exit on failureAlon Levy
If pipe creation fails, exit, don't log and continue. Fix indentation at the same time. Signed-off-by: Alon Levy <alevy@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19monitor: fix client_migrate_info error handlingYonit Halperin
Report QERR_MISSING_PARAMETER when port is missing. Otherwise QERR_UNDEFINED_ERROR will occur. rhbz #795652 Signed-off-by: Yonit Halperin <yhalperi@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19spice: set spice uuid and nameMarc-André Lureau
This allows a Spice client to identify a VM Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19qemu-ga: for w32, fix leaked handle ov.hEvent in ga_channel_write()Jeff Cody
In the function ga_channel_write(), the handle ov.hEvent is created by the call to CreateEvent(). However, the handle is not closed prior to the function return. This patch closes the handle before the return of the function. Kudos to Paolo Bonzini for spotting this bug. Signed-off-by: Jeff Cody <jcody@redhat.com> Acked-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19ioapic: fix build with DEBUG_IOAPICJason Wang
ioapic.c:198: error: format ‘%08x’ expects type ‘unsigned int’, but argument 3 has type ‘uint64_t’ Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19.gitignore: add qemu-bridge-helper and option rom build productsDavid Gibson
This adds a few previously missing generated files to .gitignore: the qemu-bridge-helper binary, and more generated versions of the linuxboot, multiboot and kvmvapic roms from pc-bios/optionrom. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19cleanup obsolete typedefJoshua Housh
There are no users of i2c_slave. Signed-off-by: Joshua Housh <joshua.housh@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19monitor: Remove unused bool field 'qapi' in mon_cmd_t structJeff Cody
Some minor code cleanup: the 'qapi' bool field in mon_cmd_t is unused, and can be removed. Signed-off-by: Jeff Cody <jcody@redhat.com> Acked-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19ds1338: Add missing break statementStefan Weil
Without the break statement, case 5 sets month and year from the same data. This does not look correct. The missing break was reported by splint. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19vnc: Fix packed boolean struct membersStefan Weil
This patch fixes warnings reported by splint: For variables which are packed in a single bit, a signed data type like 'int' does not make much sense. There is no obvious reason why the two values should be packed, so I removed the packing and changed the data type to bool because both are used as boolean values. v2: Some versions of gcc complain after this modification, for example gcc (Debian 4.4.5-8) 4.4.5): ui/vnc-auth-sasl.c: In function ‘vnc_sasl_client_cleanup’: ui/vnc-auth-sasl.c:34: error: suggest parentheses around assignment used as truth value Obviously, the compiler does not like code which does bool = unsigned = bool = 0 Splitting that code in three statements works. Cc: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19Remove type field in ModuleEntry as it's not usedChen Yufei
Signed-off-by: Chen Yufei <cyfdecyf@gmail.com> Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19memory: check for watchpoints when getting code ram_addrAvi Kivity
The code to get the ram_addr from a (tlb entry, vaddr) pair checks that the resulting memory is not MMIO, but neglects to check whether the region is hidden by a watchpoint page. Add the missing check. Signed-off-by: Avi Kivity <avi@redhat.com>
2012-03-19exec: fix write tlb entry misused as iotlbAvi Kivity
A couple of code paths check the lower bits of CPUTLBEntry::addr_write against io_mem_ram as a way of looking for a dirty RAM page. This works by accident since the value is zero, which matches all clear bits for TLB_INVALID, TLB_MMIO, and TLB_NOTDIRTY (indicating dirty RAM). Make it work by design by checking for the proper bits. Signed-off-by: Avi Kivity <avi@redhat.com>
2012-03-18tcg: fix sparc host for AREG0 free operationBlue Swirl
e141ab52d2ea5d0bc6ad3b1ad32841127ca04adc didn't handle the other memory access helper case, fix. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl
Adjust generation of load and store templates so that the functions take a parameter for CPUState instead of relying on global env. Remove wrappers. Move remaining memory helpers to ldst_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18Sparc: avoid AREG0 for memory access helpersBlue Swirl
Make memory access helpers take a parameter for CPUState instead of relying on global env. Introduce wrappers for load and store ops. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18TCG: add 5 arg helpers to def-helper.hBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl
Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18i386: Remove REGPARMBlue Swirl
Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17sparc64: implement PCI and ISA irqsBlue Swirl
Generate correct trap for external interrupts. Map PCI and ISA IRQs to RIC/UltraSPARC-IIi interrupt vectors. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17sparc: reset CPU state on resetBlue Swirl
Not strictly accurate for Sparc64 but avoid confusing Valgrind. Reported-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17apb: use normal PCI device header for PBM deviceBlue Swirl
PBM has a normal PCI device header, fix. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17Merge branch 'arm-devs.for-upstream' of ↵Blue Swirl
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state ARM: Remove unnecessary subpage workarounds hw/omap_i2c: Convert to qdev
2012-03-17w64: Fix data type of next_tb and tcg_qemu_tb_execStefan Weil
next_tb is the numeric value of a tcg target (= QEMU host) address. Using tcg_target_ulong instead of unsigned long shows this and makes the code portable for hosts with an unusual size of long (w64). The type cast '(long)(next_tb & ~3)' was not needed (casting unsigned long to long does not change the bits, and nor does casting long to pointer for most (= all non w64) hosts. It is removed here. Macro or function tcg_qemu_tb_exec is used to set next_tb. The function also returns next_tb. Therefore tcg_qemu_tb_exec must return a tcg_target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17softfloat: fix for C99Avi Kivity
C99 appears to consider compound literals as non-constants, and complains when they are used in static initializers. Switch to ordinary initializer syntax. Signed-off-by: Avi Kivity <avi@redhat.com> Acked-by: Andreas Färber <afaerber@suse.de> Reported-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17Merge branch 'target-arm.for-upstream' of ↵Blue Swirl
git://git.linaro.org/people/pmaydell/qemu-arm * 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: target-arm: Decode SETEND correctly in Thumb target-arm: Clear IT bits when taking exceptions in v7M target-arm: Fix typo in ARM946 cp15 c5 handling
2012-03-17Merge branch 'malta' of git://qemu.weilnetz.de/qemuBlue Swirl
* 'malta' of git://qemu.weilnetz.de/qemu: malta: Fix display for LED array malta: Use symbolic hardware addresses malta: Always allocate flash memory malta: Clean allocation of bios region alias
2012-03-17Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agrafBlue Swirl
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: PPC: Fix openpic with relative memregions pseries: Configure PCI bridge using properties PPC: KVM: Synchronize regs on CPU dump kvm: Comparison with ioctl number macros needs to be unsigned ppc: Correctly define POWERPC_INSNS2_DEFAULT pseries: Add support for level interrupts to XICS PPC: Fix large page support in TCG PPC: Add PIR register to POWER7 CPU pseries: Remove PCI device from PCI host bridge code pseries: Remove unused constant from PCI code pseries: Update SLOF firmware image PPC64: Add support for ldbrx and stdbrx instructions pseries: Don't try to munmap() a malloc()ed TCE table ppc: Add missing 'static' to spin_rw_ops PPC: 405: Fix ppc405ep initialization Bad zero comparison for sas_ss_flags on powerpc
2012-03-17vmstate: fix varrays with uint32_t indexesAmos Kong
VMSTATE_VARRAY_UINT32() is used in hw/ds1225y.c, and we checked VMS_VARRAY_UINT32 bit of field->flags in vmstate_load_state(), but we don't check this bit in vmstate_save_state(). Signed-off-by: Amos Kong <akong@redhat.com> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17Fix large memory chunks allocation with tcg_malloc.Kirill Batuzov
An attempt to allocate a large memory chunk after a small one resulted in circular links in list of pools. It caused the same memory being allocated twice for different arrays. Now pools for large memory chunks are kept in separate list and are freed during pool reset because current allocator can not reuse them. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-16Merge remote-tracking branch 'kraxel/seabios-1.6.3.2' into stagingAnthony Liguori
* kraxel/seabios-1.6.3.2: Update seabios to 1.6.3.2 Add seabios build scripts to roms/
2012-03-16pci: fix double free of romfile propertyAnthony Liguori
The qdev property release function frees any string properties. This was resulting in a double free during hot unplug. It manifests in network devices because block devices have a NULL romfile property by default. Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-16hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within regionPeter Maydell
The pxa2xx I2C controller can have its registers at an arbitrary offset within the MemoryRegion it creates. We use this to create two controllers, one which covers a region of size 0x10000 with registers starting at an offset 0x1600 into that region, and a second one which covers a region of size just 0x100 with the registers starting at the base of the region. The implementation of this offsetting uses two qdev properties, "offset" (which sets the offset which must be subtracted from the address to get the offset into the actual register bank) and "size", which is the size of the MemoryRegion. We were actually using "offset" for two purposes: firstly the required one of handling the registers not being at the base of the MemoryRegion, and secondly as a workaround for a deficiency of QEMU. Until commit 5312bd8b3, if a MemoryRegion was mapped at a non-page boundary, the address passed into the read and write functions would be the offset from the start of the page, not the offset from the start of the MemoryRegion. So when calculating the value to set the "offset" qdev property we included a rounding to a page boundary. Following commit 5312bd8b3 MemoryRegion read/write functions are now correctly passed the offset from the base of the region, and our workaround now means we're subtracting too much from addresses, resulting in warnings like "pxa2xx_i2c_read: Bad register 0xffffff90". The fix for this is simply to remove the rounding to a page boundary; this allows us to slightly simplify the expression since base - (base & (~region_size)) == base & region_size The qdev property "offset" itself must remain because it is still performing its primary job of handling register banks not being at the base of the MemoryRegion. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-03-16hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device stateMitsyanko Igor
Pxa2xx LCD controller is intended to work with 32-bit bus and it has no knowledge of system's physical address size, so it should not use target_phys_addr_t in it's state. Convert three variables in DMAChannel state from target_phys_addr_t to uint32_t, use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables. We can do this safely because: 1) pxa2xx has 32-bit physical address; 2) rest of the code in file never assumes converted variables to have any size different from uint32_t; 3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro is for target_ulong type (which can be different from target_phys_addr_t). Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-16hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device stateMitsyanko Igor
Pxa2xx DMA controller is a 32-bit device and it has no knowledge of system's physical address size, so it should not use target_phys_addr_t in it's state. Convert variables descr, src and dest from type target_phys_addr_t to uint32_t, use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables. We can do this safely because: 1) pxa2xx actually has 32-bit physical address size; 2) rest of the code in file never assumes descr, src and dest variables to have size different from uint32_t; 3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro is for target_ulong type (which can be different from target_phys_addr_t). Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-16ARM: Remove unnecessary subpage workaroundsPeter Maydell
In the ARM per-CPU peripherals (GIC, private timers, SCU, etc), remove workarounds for subpage memory region read/write functions being passed offsets from the start of the page rather than the start of the region. Following commit 5312bd8b3 the masking off of high bits of the address offset is now harmless but unnecessary. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-03-15malta: Fix display for LED arrayStefan Weil
The 8-LED array was already implemented in the first commit to Malta, but this implementation was incomplete. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-15malta: Use symbolic hardware addressesStefan Weil
The patch adds definitions of some hardware addresses and uses these definitions. It also replaces the type of all addresses from signed to unsigned values. This is only a cosmetic change because addresses are unsigned values, the functions called also expect unsigned values, and we need no sign extension here. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-15malta: Always allocate flash memoryStefan Weil
There is no reason why there should not be a flash memory when the Malta emulation is started with a Linux kernel. When flash memory is always available, the code is simpler, and it can be better tested. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-15malta: Clean allocation of bios region aliasStefan Weil
It is sufficient to define the region alias once for all code branches. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-15target-arm: Decode SETEND correctly in ThumbPeter Maydell
Decode the SETEND instruction correctly in Thumb mode, rather than accidentally treating it like CPS. We don't support BE8 mode, but this change brings the Thumb mode in to line with behaviour in ARM mode: 'SETEND BE' is not supported and will provoke an UNDEF exception, but 'SETEND LE' is correctly handled as a no-op. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reported-by: Daniel Forsgren <daniel.forsgren@enea.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
2012-03-15target-arm: Clear IT bits when taking exceptions in v7MPeter Maydell
When taking an exception for an M profile core, we must clear the IT bits. Since the IT bits are cached in env->condexec_bits we must clear them there: writing the bits in env->uncached_cpsr has no effect. (Reported as LP:944645.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-15target-arm: Fix typo in ARM946 cp15 c5 handlingPeter Maydell
Fix a typo in handling of the ARM946 cp15 c5 c0 0 1 handling (instruction access permission bits) that meant it would return the data access permission bits by mistake. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-15hw/omap_i2c: Convert to qdevJuha Riihimäki
Convert the omap_i2c device to qdev. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> [Riku Voipio: Fixes and restructuring patchset] Signed-off-by: Riku Voipio <riku.voipio@iki.fi> [Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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