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-rw-r--r--target/mips/cpu.c11
-rw-r--r--target/mips/cpu.h4
2 files changed, 13 insertions, 2 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 461edfe22b..2a6f4840e2 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -27,6 +27,7 @@
#include "sysemu/kvm.h"
#include "exec/exec-all.h"
#include "hw/qdev-properties.h"
+#include "hw/qdev-clock.h"
static void mips_cpu_set_pc(CPUState *cs, vaddr value)
{
@@ -144,8 +145,9 @@ static void mips_cp0_period_set(MIPSCPU *cpu)
{
CPUMIPSState *env = &cpu->env;
- env->cp0_count_ns = muldiv64(NANOSECONDS_PER_SECOND, cpu->cp0_count_rate,
- CPU_FREQ_HZ_DEFAULT);
+ env->cp0_count_ns = cpu->cp0_count_rate
+ * clock_get_ns(MIPS_CPU(cpu)->clock);
+ assert(env->cp0_count_ns);
}
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
@@ -155,6 +157,10 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
Error *local_err = NULL;
+ if (!clock_get(cpu->clock)) {
+ /* Initialize the frequency in case the clock remains unconnected. */
+ clock_set_hz(cpu->clock, CPU_FREQ_HZ_DEFAULT);
+ }
mips_cp0_period_set(cpu);
cpu_exec_realizefn(cs, &local_err);
@@ -178,6 +184,7 @@ static void mips_cpu_initfn(Object *obj)
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(obj);
cpu_set_cpustate_pointers(cpu);
+ cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, cpu);
env->cpu_model = mcc->cpu_def;
}
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index baeceb892e..062a4ba622 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -4,6 +4,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
+#include "hw/clock.h"
#include "mips-defs.h"
#define TCG_GUEST_DEFAULT_MO (0)
@@ -1151,6 +1152,8 @@ struct CPUMIPSState {
/**
* MIPSCPU:
* @env: #CPUMIPSState
+ * @clock: this CPU input clock (may be connected
+ * to an output clock from another device).
* @cp0_count_rate: rate at which the coprocessor 0 counter increments
*
* A MIPS CPU.
@@ -1160,6 +1163,7 @@ struct MIPSCPU {
CPUState parent_obj;
/*< public >*/
+ Clock *clock;
CPUNegativeOffsetState neg;
CPUMIPSState env;
/*