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Diffstat (limited to 'target/xtensa/helper.c')
-rw-r--r--target/xtensa/helper.c61
1 files changed, 21 insertions, 40 deletions
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index f18ab383fd..ca214b948a 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -26,9 +26,10 @@
*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "cpu.h"
#include "exec/exec-all.h"
-#include "exec/gdbstub.h"
+#include "gdbstub/helpers.h"
#include "exec/helper-proto.h"
#include "qemu/error-report.h"
#include "qemu/qemu-print.h"
@@ -216,8 +217,7 @@ static uint32_t check_hw_breakpoints(CPUXtensaState *env)
void xtensa_breakpoint_handler(CPUState *cs)
{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
+ CPUXtensaState *env = cpu_env(cs);
if (cs->watchpoint_hit) {
if (cs->watchpoint_hit->flags & BP_CPU) {
@@ -230,39 +230,22 @@ void xtensa_breakpoint_handler(CPUState *cs)
}
cpu_loop_exit_noexc(cs);
}
+ } else {
+ if (cpu_breakpoint_test(cs, env->pc, BP_GDB)
+ || !cpu_breakpoint_test(cs, env->pc, BP_CPU)) {
+ return;
+ }
+ if (env->sregs[ICOUNT] == 0xffffffff &&
+ xtensa_get_cintlevel(env) < env->sregs[ICOUNTLEVEL]) {
+ debug_exception_env(env, DEBUGCAUSE_IC);
+ } else {
+ debug_exception_env(env, DEBUGCAUSE_IB);
+ }
+ cpu_loop_exit_noexc(cs);
}
}
-void xtensa_cpu_list(void)
-{
- XtensaConfigList *core = xtensa_cores;
- qemu_printf("Available CPUs:\n");
- for (; core; core = core->next) {
- qemu_printf(" %s\n", core->config->name);
- }
-}
-
-#ifdef CONFIG_USER_ONLY
-
-bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
-
- qemu_log_mask(CPU_LOG_INT,
- "%s: rw = %d, address = 0x%08" VADDR_PRIx ", size = %d\n",
- __func__, access_type, address, size);
- env->sregs[EXCVADDR] = address;
- env->sregs[EXCCAUSE] = (access_type == MMU_DATA_STORE ?
- STORE_PROHIBITED_CAUSE : LOAD_PROHIBITED_CAUSE);
- cs->exception_index = EXC_USER;
- cpu_loop_exit_restore(cs, retaddr);
-}
-
-#else /* !CONFIG_USER_ONLY */
-
+#ifndef CONFIG_USER_ONLY
void xtensa_cpu_do_unaligned_access(CPUState *cs,
vaddr addr, MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr)
@@ -272,7 +255,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs,
assert(xtensa_option_enabled(env->config,
XTENSA_OPTION_UNALIGNED_EXCEPTION));
- cpu_restore_state(CPU(cpu), retaddr, true);
+ cpu_restore_state(CPU(cpu), retaddr);
HELPER(exception_cause_vaddr)(env,
env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
addr);
@@ -282,8 +265,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
+ CPUXtensaState *env = cpu_env(cs);
uint32_t paddr;
uint32_t page_size;
unsigned access;
@@ -303,7 +285,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
} else if (probe) {
return false;
} else {
- cpu_restore_state(cs, retaddr, true);
+ cpu_restore_state(cs, retaddr);
HELPER(exception_cause_vaddr)(env, env->pc, ret, address);
}
}
@@ -313,10 +295,9 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr)
{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
+ CPUXtensaState *env = cpu_env(cs);
- cpu_restore_state(cs, retaddr, true);
+ cpu_restore_state(cs, retaddr);
HELPER(exception_cause_vaddr)(env, env->pc,
access_type == MMU_INST_FETCH ?
INSTR_PIF_ADDR_ERROR_CAUSE :