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-rw-r--r--target-arm/op_helper.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index cfdbc8da94..538887ce0c 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -468,6 +468,14 @@ void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val)
uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode)
{
+ if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_SYS) {
+ /* SRS instruction is UNPREDICTABLE from System mode; we UNDEF.
+ * Other UNPREDICTABLE and UNDEF cases were caught at translate time.
+ */
+ raise_exception(env, EXCP_UDEF, syn_uncategorized(),
+ exception_target_el(env));
+ }
+
if ((env->uncached_cpsr & CPSR_M) == mode) {
return env->regs[13];
} else {