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-rw-r--r--hw/9pfs/cofile.c24
-rw-r--r--hw/9pfs/cofs.c2
-rw-r--r--hw/9pfs/virtio-9p-coth.h3
-rw-r--r--hw/9pfs/virtio-9p-debug.c646
-rw-r--r--hw/9pfs/virtio-9p-debug.h6
-rw-r--r--hw/9pfs/virtio-9p-device.c70
-rw-r--r--hw/9pfs/virtio-9p-handle.c120
-rw-r--r--hw/9pfs/virtio-9p-local.c126
-rw-r--r--hw/9pfs/virtio-9p.c170
-rw-r--r--hw/9pfs/virtio-9p.h35
-rw-r--r--hw/collie.c4
-rw-r--r--hw/devices.h3
-rw-r--r--hw/pci.c13
-rw-r--r--hw/ppc_oldworld.c13
-rw-r--r--hw/ppc_prep.c107
-rw-r--r--hw/ppce500_mpc8544ds.c5
-rw-r--r--hw/pxa.h6
-rw-r--r--hw/pxa2xx.c264
-rw-r--r--hw/r2d.c35
-rw-r--r--hw/realview.c54
-rw-r--r--hw/s390-virtio.c8
-rw-r--r--hw/sm501.c143
-rw-r--r--hw/spapr.c9
-rw-r--r--hw/spitz.c48
-rw-r--r--hw/strongarm.c171
-rw-r--r--hw/strongarm.h6
-rw-r--r--hw/sun4m.c49
-rw-r--r--hw/sun4u.c22
-rw-r--r--hw/syborg.c8
-rw-r--r--hw/tc6393xb.c71
-rw-r--r--hw/tcx.c152
-rw-r--r--hw/tosa.c2
-rw-r--r--hw/virtio-pci.c5
-rw-r--r--hw/virtio-pci.h5
34 files changed, 983 insertions, 1422 deletions
diff --git a/hw/9pfs/cofile.c b/hw/9pfs/cofile.c
index 7ad4bec005..692811e5ab 100644
--- a/hw/9pfs/cofile.c
+++ b/hw/9pfs/cofile.c
@@ -17,6 +17,30 @@
#include "qemu-coroutine.h"
#include "virtio-9p-coth.h"
+int v9fs_co_st_gen(V9fsPDU *pdu, V9fsPath *path, mode_t st_mode,
+ V9fsStatDotl *v9stat)
+{
+ int err = 0;
+ V9fsState *s = pdu->s;
+
+ if (v9fs_request_cancelled(pdu)) {
+ return -EINTR;
+ }
+ if (s->ctx.exops.get_st_gen) {
+ v9fs_path_read_lock(s);
+ v9fs_co_run_in_worker(
+ {
+ err = s->ctx.exops.get_st_gen(&s->ctx, path, st_mode,
+ &v9stat->st_gen);
+ if (err < 0) {
+ err = -errno;
+ }
+ });
+ v9fs_path_unlock(s);
+ }
+ return err;
+}
+
int v9fs_co_lstat(V9fsPDU *pdu, V9fsPath *path, struct stat *stbuf)
{
int err;
diff --git a/hw/9pfs/cofs.c b/hw/9pfs/cofs.c
index 68745add1e..83f125bd47 100644
--- a/hw/9pfs/cofs.c
+++ b/hw/9pfs/cofs.c
@@ -323,7 +323,7 @@ int v9fs_co_name_to_path(V9fsPDU *pdu, V9fsPath *dirpath,
int err;
V9fsState *s = pdu->s;
- if (s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT) {
err = s->ops->name_to_path(&s->ctx, dirpath, name, path);
if (err < 0) {
err = -errno;
diff --git a/hw/9pfs/virtio-9p-coth.h b/hw/9pfs/virtio-9p-coth.h
index 4630080e53..ca96b9cf2f 100644
--- a/hw/9pfs/virtio-9p-coth.h
+++ b/hw/9pfs/virtio-9p-coth.h
@@ -101,4 +101,7 @@ extern int v9fs_co_preadv(V9fsPDU *, V9fsFidState *,
struct iovec *, int, int64_t);
extern int v9fs_co_name_to_path(V9fsPDU *, V9fsPath *,
const char *, V9fsPath *);
+extern int v9fs_co_st_gen(V9fsPDU *pdu, V9fsPath *path, mode_t,
+ V9fsStatDotl *v9stat);
+
#endif
diff --git a/hw/9pfs/virtio-9p-debug.c b/hw/9pfs/virtio-9p-debug.c
deleted file mode 100644
index 96925f04a4..0000000000
--- a/hw/9pfs/virtio-9p-debug.c
+++ /dev/null
@@ -1,646 +0,0 @@
-/*
- * Virtio 9p PDU debug
- *
- * Copyright IBM, Corp. 2010
- *
- * Authors:
- * Anthony Liguori <aliguori@us.ibm.com>
- *
- * This work is licensed under the terms of the GNU GPL, version 2. See
- * the COPYING file in the top-level directory.
- *
- */
-
-#include "hw/virtio.h"
-#include "hw/pc.h"
-#include "virtio-9p.h"
-#include "virtio-9p-debug.h"
-
-#define BUG_ON(cond) assert(!(cond))
-
-static FILE *llogfile;
-
-static struct iovec *get_sg(V9fsPDU *pdu, int rx)
-{
- if (rx) {
- return pdu->elem.in_sg;
- }
- return pdu->elem.out_sg;
-}
-
-static int get_sg_count(V9fsPDU *pdu, int rx)
-{
- if (rx) {
- return pdu->elem.in_num;
- }
- return pdu->elem.out_num;
-
-}
-
-static void pprint_int8(V9fsPDU *pdu, int rx, size_t *offsetp,
- const char *name)
-{
- size_t copied;
- int count = get_sg_count(pdu, rx);
- size_t offset = *offsetp;
- struct iovec *sg = get_sg(pdu, rx);
- int8_t value;
-
- copied = do_pdu_unpack(&value, sg, count, offset, sizeof(value));
-
- BUG_ON(copied != sizeof(value));
- offset += sizeof(value);
- fprintf(llogfile, "%s=0x%x", name, value);
- *offsetp = offset;
-}
-
-static void pprint_int16(V9fsPDU *pdu, int rx, size_t *offsetp,
- const char *name)
-{
- size_t copied;
- int count = get_sg_count(pdu, rx);
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- int16_t value;
-
-
- copied = do_pdu_unpack(&value, sg, count, offset, sizeof(value));
-
- BUG_ON(copied != sizeof(value));
- offset += sizeof(value);
- fprintf(llogfile, "%s=0x%x", name, value);
- *offsetp = offset;
-}
-
-static void pprint_int32(V9fsPDU *pdu, int rx, size_t *offsetp,
- const char *name)
-{
- size_t copied;
- int count = get_sg_count(pdu, rx);
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- int32_t value;
-
-
- copied = do_pdu_unpack(&value, sg, count, offset, sizeof(value));
-
- BUG_ON(copied != sizeof(value));
- offset += sizeof(value);
- fprintf(llogfile, "%s=0x%x", name, value);
- *offsetp = offset;
-}
-
-static void pprint_int64(V9fsPDU *pdu, int rx, size_t *offsetp,
- const char *name)
-{
- size_t copied;
- int count = get_sg_count(pdu, rx);
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- int64_t value;
-
-
- copied = do_pdu_unpack(&value, sg, count, offset, sizeof(value));
-
- BUG_ON(copied != sizeof(value));
- offset += sizeof(value);
- fprintf(llogfile, "%s=0x%" PRIx64, name, value);
- *offsetp = offset;
-}
-
-static void pprint_str(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- int sg_count = get_sg_count(pdu, rx);
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- uint16_t tmp_size, size;
- size_t result;
- size_t copied = 0;
- int i = 0;
-
- /* get the size */
- copied = do_pdu_unpack(&tmp_size, sg, sg_count, offset, sizeof(tmp_size));
- BUG_ON(copied != sizeof(tmp_size));
- size = le16_to_cpupu(&tmp_size);
- offset += copied;
-
- fprintf(llogfile, "%s=", name);
- for (i = 0; size && i < sg_count; i++) {
- size_t len;
- if (offset >= sg[i].iov_len) {
- /* skip this sg */
- offset -= sg[i].iov_len;
- continue;
- } else {
- len = MIN(sg[i].iov_len - offset, size);
- result = fwrite(sg[i].iov_base + offset, 1, len, llogfile);
- BUG_ON(result != len);
- size -= len;
- copied += len;
- if (size) {
- offset = 0;
- continue;
- }
- }
- }
- *offsetp += copied;
-}
-
-static void pprint_qid(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- fprintf(llogfile, "%s={", name);
- pprint_int8(pdu, rx, offsetp, "type");
- pprint_int32(pdu, rx, offsetp, ", version");
- pprint_int64(pdu, rx, offsetp, ", path");
- fprintf(llogfile, "}");
-}
-
-static void pprint_stat(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- fprintf(llogfile, "%s={", name);
- pprint_int16(pdu, rx, offsetp, "size");
- pprint_int16(pdu, rx, offsetp, ", type");
- pprint_int32(pdu, rx, offsetp, ", dev");
- pprint_qid(pdu, rx, offsetp, ", qid");
- pprint_int32(pdu, rx, offsetp, ", mode");
- pprint_int32(pdu, rx, offsetp, ", atime");
- pprint_int32(pdu, rx, offsetp, ", mtime");
- pprint_int64(pdu, rx, offsetp, ", length");
- pprint_str(pdu, rx, offsetp, ", name");
- pprint_str(pdu, rx, offsetp, ", uid");
- pprint_str(pdu, rx, offsetp, ", gid");
- pprint_str(pdu, rx, offsetp, ", muid");
- pprint_str(pdu, rx, offsetp, ", extension");
- pprint_int32(pdu, rx, offsetp, ", uid");
- pprint_int32(pdu, rx, offsetp, ", gid");
- pprint_int32(pdu, rx, offsetp, ", muid");
- fprintf(llogfile, "}");
-}
-
-static void pprint_stat_dotl(V9fsPDU *pdu, int rx, size_t *offsetp,
- const char *name)
-{
- fprintf(llogfile, "%s={", name);
- pprint_qid(pdu, rx, offsetp, "qid");
- pprint_int32(pdu, rx, offsetp, ", st_mode");
- pprint_int64(pdu, rx, offsetp, ", st_nlink");
- pprint_int32(pdu, rx, offsetp, ", st_uid");
- pprint_int32(pdu, rx, offsetp, ", st_gid");
- pprint_int64(pdu, rx, offsetp, ", st_rdev");
- pprint_int64(pdu, rx, offsetp, ", st_size");
- pprint_int64(pdu, rx, offsetp, ", st_blksize");
- pprint_int64(pdu, rx, offsetp, ", st_blocks");
- pprint_int64(pdu, rx, offsetp, ", atime");
- pprint_int64(pdu, rx, offsetp, ", atime_nsec");
- pprint_int64(pdu, rx, offsetp, ", mtime");
- pprint_int64(pdu, rx, offsetp, ", mtime_nsec");
- pprint_int64(pdu, rx, offsetp, ", ctime");
- pprint_int64(pdu, rx, offsetp, ", ctime_nsec");
- fprintf(llogfile, "}");
-}
-
-
-
-static void pprint_strs(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- int sg_count = get_sg_count(pdu, rx);
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- uint16_t tmp_count, count, i;
- size_t copied = 0;
-
- fprintf(llogfile, "%s={", name);
-
- /* Get the count */
- copied = do_pdu_unpack(&tmp_count, sg, sg_count, offset, sizeof(tmp_count));
- BUG_ON(copied != sizeof(tmp_count));
- count = le16_to_cpupu(&tmp_count);
- offset += copied;
-
- for (i = 0; i < count; i++) {
- char str[512];
- if (i) {
- fprintf(llogfile, ", ");
- }
- snprintf(str, sizeof(str), "[%d]", i);
- pprint_str(pdu, rx, &offset, str);
- }
-
- fprintf(llogfile, "}");
-
- *offsetp = offset;
-}
-
-static void pprint_qids(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- int sg_count = get_sg_count(pdu, rx);
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- uint16_t tmp_count, count, i;
- size_t copied = 0;
-
- fprintf(llogfile, "%s={", name);
-
- copied = do_pdu_unpack(&tmp_count, sg, sg_count, offset, sizeof(tmp_count));
- BUG_ON(copied != sizeof(tmp_count));
- count = le16_to_cpupu(&tmp_count);
- offset += copied;
-
- for (i = 0; i < count; i++) {
- char str[512];
- if (i) {
- fprintf(llogfile, ", ");
- }
- snprintf(str, sizeof(str), "[%d]", i);
- pprint_qid(pdu, rx, &offset, str);
- }
-
- fprintf(llogfile, "}");
-
- *offsetp = offset;
-}
-
-static void pprint_sg(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- struct iovec *sg = get_sg(pdu, rx);
- unsigned int count;
- int i;
-
- if (rx) {
- count = pdu->elem.in_num;
- } else {
- count = pdu->elem.out_num;
- }
-
- fprintf(llogfile, "%s={", name);
- for (i = 0; i < count; i++) {
- if (i) {
- fprintf(llogfile, ", ");
- }
- fprintf(llogfile, "(%p, 0x%zx)", sg[i].iov_base, sg[i].iov_len);
- }
- fprintf(llogfile, "}");
-}
-
-/* FIXME: read from a directory fid returns serialized stat_t's */
-#ifdef DEBUG_DATA
-static void pprint_data(V9fsPDU *pdu, int rx, size_t *offsetp, const char *name)
-{
- struct iovec *sg = get_sg(pdu, rx);
- size_t offset = *offsetp;
- unsigned int count;
- int32_t size;
- int total, i, j;
- ssize_t len;
-
- if (rx) {
- count = pdu->elem.in_num;
- } else {
- count = pdu->elem.out_num;
- }
-
- BUG_ON((offset + sizeof(size)) > sg[0].iov_len);
-
- memcpy(&size, sg[0].iov_base + offset, sizeof(size));
- offset += sizeof(size);
-
- fprintf(llogfile, "size: %x\n", size);
-
- sg[0].iov_base += 11; /* skip header */
- sg[0].iov_len -= 11;
-
- total = 0;
- for (i = 0; i < count; i++) {
- total += sg[i].iov_len;
- if (total >= size) {
- /* trim sg list so writev does the right thing */
- sg[i].iov_len -= (total - size);
- i++;
- break;
- }
- }
-
- fprintf(llogfile, "%s={\"", name);
- fflush(llogfile);
- for (j = 0; j < i; j++) {
- if (j) {
- fprintf(llogfile, "\", \"");
- fflush(llogfile);
- }
-
- do {
- len = writev(fileno(llogfile), &sg[j], 1);
- } while (len == -1 && errno == EINTR);
- fprintf(llogfile, "len == %ld: %m\n", len);
- BUG_ON(len != sg[j].iov_len);
- }
- fprintf(llogfile, "\"}");
-
- sg[0].iov_base -= 11;
- sg[0].iov_len += 11;
-
-}
-#endif
-
-void pprint_pdu(V9fsPDU *pdu)
-{
- size_t offset = 7;
-
- if (llogfile == NULL) {
- llogfile = fopen("/tmp/pdu.log", "w");
- }
-
- BUG_ON(!llogfile);
-
- switch (pdu->id) {
- case P9_TREADDIR:
- fprintf(llogfile, "TREADDIR: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int64(pdu, 0, &offset, ", initial offset");
- pprint_int32(pdu, 0, &offset, ", max count");
- break;
- case P9_RREADDIR:
- fprintf(llogfile, "RREADDIR: (");
- pprint_int32(pdu, 1, &offset, "count");
-#ifdef DEBUG_DATA
- pprint_data(pdu, 1, &offset, ", data");
-#endif
- break;
- case P9_TMKDIR:
- fprintf(llogfile, "TMKDIR: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_str(pdu, 0, &offset, "name");
- pprint_int32(pdu, 0, &offset, "mode");
- pprint_int32(pdu, 0, &offset, "gid");
- break;
- case P9_RMKDIR:
- fprintf(llogfile, "RMKDIR: (");
- pprint_qid(pdu, 0, &offset, "qid");
- break;
- case P9_TVERSION:
- fprintf(llogfile, "TVERSION: (");
- pprint_int32(pdu, 0, &offset, "msize");
- pprint_str(pdu, 0, &offset, ", version");
- break;
- case P9_RVERSION:
- fprintf(llogfile, "RVERSION: (");
- pprint_int32(pdu, 1, &offset, "msize");
- pprint_str(pdu, 1, &offset, ", version");
- break;
- case P9_TGETATTR:
- fprintf(llogfile, "TGETATTR: (");
- pprint_int32(pdu, 0, &offset, "fid");
- break;
- case P9_RGETATTR:
- fprintf(llogfile, "RGETATTR: (");
- pprint_stat_dotl(pdu, 1, &offset, "getattr");
- break;
- case P9_TAUTH:
- fprintf(llogfile, "TAUTH: (");
- pprint_int32(pdu, 0, &offset, "afid");
- pprint_str(pdu, 0, &offset, ", uname");
- pprint_str(pdu, 0, &offset, ", aname");
- pprint_int32(pdu, 0, &offset, ", n_uname");
- break;
- case P9_RAUTH:
- fprintf(llogfile, "RAUTH: (");
- pprint_qid(pdu, 1, &offset, "qid");
- break;
- case P9_TATTACH:
- fprintf(llogfile, "TATTACH: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int32(pdu, 0, &offset, ", afid");
- pprint_str(pdu, 0, &offset, ", uname");
- pprint_str(pdu, 0, &offset, ", aname");
- pprint_int32(pdu, 0, &offset, ", n_uname");
- break;
- case P9_RATTACH:
- fprintf(llogfile, "RATTACH: (");
- pprint_qid(pdu, 1, &offset, "qid");
- break;
- case P9_TERROR:
- fprintf(llogfile, "TERROR: (");
- break;
- case P9_RERROR:
- fprintf(llogfile, "RERROR: (");
- pprint_str(pdu, 1, &offset, "ename");
- pprint_int32(pdu, 1, &offset, ", ecode");
- break;
- case P9_TFLUSH:
- fprintf(llogfile, "TFLUSH: (");
- pprint_int16(pdu, 0, &offset, "oldtag");
- break;
- case P9_RFLUSH:
- fprintf(llogfile, "RFLUSH: (");
- break;
- case P9_TWALK:
- fprintf(llogfile, "TWALK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int32(pdu, 0, &offset, ", newfid");
- pprint_strs(pdu, 0, &offset, ", wnames");
- break;
- case P9_RWALK:
- fprintf(llogfile, "RWALK: (");
- pprint_qids(pdu, 1, &offset, "wqids");
- break;
- case P9_TOPEN:
- fprintf(llogfile, "TOPEN: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int8(pdu, 0, &offset, ", mode");
- break;
- case P9_ROPEN:
- fprintf(llogfile, "ROPEN: (");
- pprint_qid(pdu, 1, &offset, "qid");
- pprint_int32(pdu, 1, &offset, ", iounit");
- break;
- case P9_TCREATE:
- fprintf(llogfile, "TCREATE: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_str(pdu, 0, &offset, ", name");
- pprint_int32(pdu, 0, &offset, ", perm");
- pprint_int8(pdu, 0, &offset, ", mode");
- pprint_str(pdu, 0, &offset, ", extension");
- break;
- case P9_RCREATE:
- fprintf(llogfile, "RCREATE: (");
- pprint_qid(pdu, 1, &offset, "qid");
- pprint_int32(pdu, 1, &offset, ", iounit");
- break;
- case P9_TSYMLINK:
- fprintf(llogfile, "TSYMLINK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_str(pdu, 0, &offset, ", name");
- pprint_str(pdu, 0, &offset, ", symname");
- pprint_int32(pdu, 0, &offset, ", gid");
- break;
- case P9_RSYMLINK:
- fprintf(llogfile, "RSYMLINK: (");
- pprint_qid(pdu, 1, &offset, "qid");
- break;
- case P9_TLCREATE:
- fprintf(llogfile, "TLCREATE: (");
- pprint_int32(pdu, 0, &offset, "dfid");
- pprint_str(pdu, 0, &offset, ", name");
- pprint_int32(pdu, 0, &offset, ", flags");
- pprint_int32(pdu, 0, &offset, ", mode");
- pprint_int32(pdu, 0, &offset, ", gid");
- break;
- case P9_RLCREATE:
- fprintf(llogfile, "RLCREATE: (");
- pprint_qid(pdu, 1, &offset, "qid");
- pprint_int32(pdu, 1, &offset, ", iounit");
- break;
- case P9_TMKNOD:
- fprintf(llogfile, "TMKNOD: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_str(pdu, 0, &offset, "name");
- pprint_int32(pdu, 0, &offset, "mode");
- pprint_int32(pdu, 0, &offset, "major");
- pprint_int32(pdu, 0, &offset, "minor");
- pprint_int32(pdu, 0, &offset, "gid");
- break;
- case P9_RMKNOD:
- fprintf(llogfile, "RMKNOD: )");
- pprint_qid(pdu, 0, &offset, "qid");
- break;
- case P9_TREADLINK:
- fprintf(llogfile, "TREADLINK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- break;
- case P9_RREADLINK:
- fprintf(llogfile, "RREADLINK: (");
- pprint_str(pdu, 0, &offset, "target");
- break;
- case P9_TREAD:
- fprintf(llogfile, "TREAD: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int64(pdu, 0, &offset, ", offset");
- pprint_int32(pdu, 0, &offset, ", count");
- pprint_sg(pdu, 0, &offset, ", sg");
- break;
- case P9_RREAD:
- fprintf(llogfile, "RREAD: (");
- pprint_int32(pdu, 1, &offset, "count");
- pprint_sg(pdu, 1, &offset, ", sg");
- offset = 7;
-#ifdef DEBUG_DATA
- pprint_data(pdu, 1, &offset, ", data");
-#endif
- break;
- case P9_TWRITE:
- fprintf(llogfile, "TWRITE: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int64(pdu, 0, &offset, ", offset");
- pprint_int32(pdu, 0, &offset, ", count");
- break;
- case P9_RWRITE:
- fprintf(llogfile, "RWRITE: (");
- pprint_int32(pdu, 1, &offset, "count");
- break;
- case P9_TCLUNK:
- fprintf(llogfile, "TCLUNK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- break;
- case P9_RCLUNK:
- fprintf(llogfile, "RCLUNK: (");
- break;
- case P9_TFSYNC:
- fprintf(llogfile, "TFSYNC: (");
- pprint_int32(pdu, 0, &offset, "fid");
- break;
- case P9_RFSYNC:
- fprintf(llogfile, "RFSYNC: (");
- break;
- case P9_TLINK:
- fprintf(llogfile, "TLINK: (");
- pprint_int32(pdu, 0, &offset, "dfid");
- pprint_int32(pdu, 0, &offset, ", fid");
- pprint_str(pdu, 0, &offset, ", newpath");
- break;
- case P9_RLINK:
- fprintf(llogfile, "RLINK: (");
- break;
- case P9_TREMOVE:
- fprintf(llogfile, "TREMOVE: (");
- pprint_int32(pdu, 0, &offset, "fid");
- break;
- case P9_RREMOVE:
- fprintf(llogfile, "RREMOVE: (");
- break;
- case P9_TSTAT:
- fprintf(llogfile, "TSTAT: (");
- pprint_int32(pdu, 0, &offset, "fid");
- break;
- case P9_RSTAT:
- fprintf(llogfile, "RSTAT: (");
- offset += 2; /* ignored */
- pprint_stat(pdu, 1, &offset, "stat");
- break;
- case P9_TWSTAT:
- fprintf(llogfile, "TWSTAT: (");
- pprint_int32(pdu, 0, &offset, "fid");
- offset += 2; /* ignored */
- pprint_stat(pdu, 0, &offset, ", stat");
- break;
- case P9_RWSTAT:
- fprintf(llogfile, "RWSTAT: (");
- break;
- case P9_TXATTRWALK:
- fprintf(llogfile, "TXATTRWALK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int32(pdu, 0, &offset, ", newfid");
- pprint_str(pdu, 0, &offset, ", xattr name");
- break;
- case P9_RXATTRWALK:
- fprintf(llogfile, "RXATTRWALK: (");
- pprint_int64(pdu, 1, &offset, "xattrsize");
- case P9_TXATTRCREATE:
- fprintf(llogfile, "TXATTRCREATE: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_str(pdu, 0, &offset, ", name");
- pprint_int64(pdu, 0, &offset, ", xattrsize");
- pprint_int32(pdu, 0, &offset, ", flags");
- break;
- case P9_RXATTRCREATE:
- fprintf(llogfile, "RXATTRCREATE: (");
- break;
- case P9_TLOCK:
- fprintf(llogfile, "TLOCK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int8(pdu, 0, &offset, ", type");
- pprint_int32(pdu, 0, &offset, ", flags");
- pprint_int64(pdu, 0, &offset, ", start");
- pprint_int64(pdu, 0, &offset, ", length");
- pprint_int32(pdu, 0, &offset, ", proc_id");
- pprint_str(pdu, 0, &offset, ", client_id");
- break;
- case P9_RLOCK:
- fprintf(llogfile, "RLOCK: (");
- pprint_int8(pdu, 0, &offset, "status");
- break;
- case P9_TGETLOCK:
- fprintf(llogfile, "TGETLOCK: (");
- pprint_int32(pdu, 0, &offset, "fid");
- pprint_int8(pdu, 0, &offset, ", type");
- pprint_int64(pdu, 0, &offset, ", start");
- pprint_int64(pdu, 0, &offset, ", length");
- pprint_int32(pdu, 0, &offset, ", proc_id");
- pprint_str(pdu, 0, &offset, ", client_id");
- break;
- case P9_RGETLOCK:
- fprintf(llogfile, "RGETLOCK: (");
- pprint_int8(pdu, 0, &offset, "type");
- pprint_int64(pdu, 0, &offset, ", start");
- pprint_int64(pdu, 0, &offset, ", length");
- pprint_int32(pdu, 0, &offset, ", proc_id");
- pprint_str(pdu, 0, &offset, ", client_id");
- break;
- default:
- fprintf(llogfile, "unknown(%d): (", pdu->id);
- break;
- }
-
- fprintf(llogfile, ")\n");
- /* Flush the log message out */
- fflush(llogfile);
-}
diff --git a/hw/9pfs/virtio-9p-debug.h b/hw/9pfs/virtio-9p-debug.h
deleted file mode 100644
index d9a249118d..0000000000
--- a/hw/9pfs/virtio-9p-debug.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _QEMU_VIRTIO_9P_DEBUG_H
-#define _QEMU_VIRTIO_9P_DEBUG_H
-
-void pprint_pdu(V9fsPDU *pdu);
-
-#endif
diff --git a/hw/9pfs/virtio-9p-device.c b/hw/9pfs/virtio-9p-device.c
index 513e181c82..bba4c54762 100644
--- a/hw/9pfs/virtio-9p-device.c
+++ b/hw/9pfs/virtio-9p-device.c
@@ -49,7 +49,8 @@ VirtIODevice *virtio_9p_init(DeviceState *dev, V9fsConf *conf)
V9fsState *s;
int i, len;
struct stat stat;
- FsTypeEntry *fse;
+ FsDriverEntry *fse;
+ V9fsPath path;
s = (V9fsState *)virtio_common_init("virtio-9p",
VIRTIO_ID_9P,
@@ -82,55 +83,33 @@ VirtIODevice *virtio_9p_init(DeviceState *dev, V9fsConf *conf)
exit(1);
}
- if (!strcmp(fse->security_model, "passthrough")) {
- /* Files on the Fileserver set to client user credentials */
- s->ctx.fs_sm = SM_PASSTHROUGH;
+ s->ctx.export_flags = fse->export_flags;
+ s->ctx.fs_root = g_strdup(fse->path);
+ s->ctx.exops.get_st_gen = NULL;
+
+ if (fse->export_flags & V9FS_SM_PASSTHROUGH) {
s->ctx.xops = passthrough_xattr_ops;
- } else if (!strcmp(fse->security_model, "mapped")) {
- /* Files on the fileserver are set to QEMU credentials.
- * Client user credentials are saved in extended attributes.
- */
- s->ctx.fs_sm = SM_MAPPED;
+ } else if (fse->export_flags & V9FS_SM_MAPPED) {
s->ctx.xops = mapped_xattr_ops;
- } else if (!strcmp(fse->security_model, "none")) {
- /*
- * Files on the fileserver are set to QEMU credentials.
- */
- s->ctx.fs_sm = SM_NONE;
- s->ctx.xops = none_xattr_ops;
- } else {
- fprintf(stderr, "Default to security_model=none. You may want"
- " enable advanced security model using "
- "security option:\n\t security_model=passthrough\n\t "
- "security_model=mapped\n");
- s->ctx.fs_sm = SM_NONE;
+ } else if (fse->export_flags & V9FS_SM_NONE) {
s->ctx.xops = none_xattr_ops;
}
- if (lstat(fse->path, &stat)) {
- fprintf(stderr, "share path %s does not exist\n", fse->path);
- exit(1);
- } else if (!S_ISDIR(stat.st_mode)) {
- fprintf(stderr, "share path %s is not a directory\n", fse->path);
- exit(1);
- }
-
- s->ctx.fs_root = g_strdup(fse->path);
len = strlen(conf->tag);
if (len > MAX_TAG_LEN) {
- len = MAX_TAG_LEN;
+ fprintf(stderr, "mount tag '%s' (%d bytes) is longer than "
+ "maximum (%d bytes)", conf->tag, len, MAX_TAG_LEN);
+ exit(1);
}
/* s->tag is non-NULL terminated string */
s->tag = g_malloc(len);
memcpy(s->tag, conf->tag, len);
s->tag_len = len;
s->ctx.uid = -1;
- s->ctx.flags = 0;
s->ops = fse->ops;
s->vdev.get_features = virtio_9p_get_features;
- s->config_size = sizeof(struct virtio_9p_config) +
- s->tag_len;
+ s->config_size = sizeof(struct virtio_9p_config) + s->tag_len;
s->vdev.get_config = virtio_9p_get_config;
s->fid_list = NULL;
qemu_co_rwlock_init(&s->rename_lock);
@@ -144,6 +123,27 @@ VirtIODevice *virtio_9p_init(DeviceState *dev, V9fsConf *conf)
fprintf(stderr, "worker thread initialization failed\n");
exit(1);
}
+
+ /*
+ * Check details of export path, We need to use fs driver
+ * call back to do that. Since we are in the init path, we don't
+ * use co-routines here.
+ */
+ v9fs_path_init(&path);
+ if (s->ops->name_to_path(&s->ctx, NULL, "/", &path) < 0) {
+ fprintf(stderr,
+ "error in converting name to path %s", strerror(errno));
+ exit(1);
+ }
+ if (s->ops->lstat(&s->ctx, &path, &stat)) {
+ fprintf(stderr, "share path %s does not exist\n", fse->path);
+ exit(1);
+ } else if (!S_ISDIR(stat.st_mode)) {
+ fprintf(stderr, "share path %s is not a directory\n", fse->path);
+ exit(1);
+ }
+ v9fs_path_free(&path);
+
return &s->vdev;
}
@@ -169,6 +169,8 @@ static PCIDeviceInfo virtio_9p_info = {
.revision = VIRTIO_PCI_ABI_VERSION,
.class_id = 0x2,
.qdev.props = (Property[]) {
+ DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
+ VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
DEFINE_PROP_STRING("mount_tag", VirtIOPCIProxy, fsconf.tag),
diff --git a/hw/9pfs/virtio-9p-handle.c b/hw/9pfs/virtio-9p-handle.c
index 5c8b5ed471..98809f1642 100644
--- a/hw/9pfs/virtio-9p-handle.c
+++ b/hw/9pfs/virtio-9p-handle.c
@@ -21,49 +21,56 @@
#include <sys/un.h>
#include <attr/xattr.h>
#include <unistd.h>
-
-struct handle_data {
- int mountfd;
- int handle_bytes;
-};
-
-#if __GLIBC__ <= 2 && __GLIBC_MINOR__ < 14
-struct file_handle {
- unsigned int handle_bytes;
- int handle_type;
- unsigned char handle[0];
-};
+#include <linux/fs.h>
+#ifdef CONFIG_LINUX_MAGIC_H
+#include <linux/magic.h>
#endif
+#include <sys/ioctl.h>
-#ifndef AT_EMPTY_PATH
-#define AT_EMPTY_PATH 0x1000 /* Allow empty relative pathname */
+#ifndef XFS_SUPER_MAGIC
+#define XFS_SUPER_MAGIC 0x58465342
#endif
-#ifndef O_PATH
-#define O_PATH 010000000
+#ifndef EXT2_SUPER_MAGIC
+#define EXT2_SUPER_MAGIC 0xEF53
#endif
-
-#ifndef __NR_name_to_handle_at
-#if defined(__i386__)
-#define __NR_name_to_handle_at 341
-#define __NR_open_by_handle_at 342
-#elif defined(__x86_64__)
-#define __NR_name_to_handle_at 303
-#define __NR_open_by_handle_at 304
+#ifndef REISERFS_SUPER_MAGIC
+#define REISERFS_SUPER_MAGIC 0x52654973
#endif
+#ifndef BTRFS_SUPER_MAGIC
+#define BTRFS_SUPER_MAGIC 0x9123683E
#endif
-#ifdef __NR_name_to_handle_at
+struct handle_data {
+ int mountfd;
+ int handle_bytes;
+};
+
+#ifdef CONFIG_OPEN_BY_HANDLE
static inline int name_to_handle(int dirfd, const char *name,
struct file_handle *fh, int *mnt_id, int flags)
{
- return syscall(__NR_name_to_handle_at, dirfd, name, fh, mnt_id, flags);
+ return name_to_handle_at(dirfd, name, fh, mnt_id, flags);
}
static inline int open_by_handle(int mountfd, const char *fh, int flags)
{
- return syscall(__NR_open_by_handle_at, mountfd, fh, flags);
+ return open_by_handle_at(mountfd, (struct file_handle *)fh, flags);
}
#else
+
+struct file_handle {
+ unsigned int handle_bytes;
+ int handle_type;
+ unsigned char handle[0];
+};
+
+#ifndef AT_EMPTY_PATH
+#define AT_EMPTY_PATH 0x1000 /* Allow empty relative pathname */
+#endif
+#ifndef O_PATH
+#define O_PATH 010000000
+#endif
+
static inline int name_to_handle(int dirfd, const char *name,
struct file_handle *fh, int *mnt_id, int flags)
{
@@ -192,16 +199,29 @@ static ssize_t handle_preadv(FsContext *ctx, int fd, const struct iovec *iov,
static ssize_t handle_pwritev(FsContext *ctx, int fd, const struct iovec *iov,
int iovcnt, off_t offset)
{
+ ssize_t ret;
#ifdef CONFIG_PREADV
- return pwritev(fd, iov, iovcnt, offset);
+ ret = pwritev(fd, iov, iovcnt, offset);
#else
int err = lseek(fd, offset, SEEK_SET);
if (err == -1) {
return err;
} else {
- return writev(fd, iov, iovcnt);
+ ret = writev(fd, iov, iovcnt);
}
#endif
+#ifdef CONFIG_SYNC_FILE_RANGE
+ if (ret > 0 && ctx->export_flags & V9FS_IMMEDIATE_WRITEOUT) {
+ /*
+ * Initiate a writeback. This is not a data integrity sync.
+ * We want to ensure that we don't leave dirty pages in the cache
+ * after write when writeout=immediate is sepcified.
+ */
+ sync_file_range(fd, offset, ret,
+ SYNC_FILE_RANGE_WAIT_BEFORE | SYNC_FILE_RANGE_WRITE);
+ }
+#endif
+ return ret;
}
static int handle_chmod(FsContext *fs_ctx, V9fsPath *fs_path, FsCred *credp)
@@ -367,7 +387,9 @@ static int handle_chown(FsContext *fs_ctx, V9fsPath *fs_path, FsCred *credp)
static int handle_utimensat(FsContext *ctx, V9fsPath *fs_path,
const struct timespec *buf)
{
- int fd, ret;
+ int ret;
+#ifdef CONFIG_UTIMENSAT
+ int fd;
struct handle_data *data = (struct handle_data *)ctx->private;
fd = open_by_handle(data->mountfd, fs_path->data, O_NONBLOCK);
@@ -376,6 +398,10 @@ static int handle_utimensat(FsContext *ctx, V9fsPath *fs_path,
}
ret = futimens(fd, buf);
close(fd);
+#else
+ ret = -1;
+ errno = ENOSYS;
+#endif
return ret;
}
@@ -546,16 +572,50 @@ static int handle_unlinkat(FsContext *ctx, V9fsPath *dir,
return ret;
}
+static int handle_ioc_getversion(FsContext *ctx, V9fsPath *path,
+ mode_t st_mode, uint64_t *st_gen)
+{
+ int err, fd;
+
+ /*
+ * Do not try to open special files like device nodes, fifos etc
+ * We can get fd for regular files and directories only
+ */
+ if (!S_ISREG(st_mode) && !S_ISDIR(st_mode)) {
+ return 0;
+ }
+ fd = handle_open(ctx, path, O_RDONLY);
+ if (fd < 0) {
+ return fd;
+ }
+ err = ioctl(fd, FS_IOC_GETVERSION, st_gen);
+ handle_close(ctx, fd);
+ return err;
+}
+
static int handle_init(FsContext *ctx)
{
int ret, mnt_id;
+ struct statfs stbuf;
struct file_handle fh;
struct handle_data *data = g_malloc(sizeof(struct handle_data));
+
data->mountfd = open(ctx->fs_root, O_DIRECTORY);
if (data->mountfd < 0) {
ret = data->mountfd;
goto err_out;
}
+ ret = statfs(ctx->fs_root, &stbuf);
+ if (!ret) {
+ switch (stbuf.f_type) {
+ case EXT2_SUPER_MAGIC:
+ case BTRFS_SUPER_MAGIC:
+ case REISERFS_SUPER_MAGIC:
+ case XFS_SUPER_MAGIC:
+ ctx->exops.get_st_gen = handle_ioc_getversion;
+ break;
+ }
+ }
memset(&fh, 0, sizeof(struct file_handle));
ret = name_to_handle(data->mountfd, ".", &fh, &mnt_id, 0);
if (ret && errno == EOVERFLOW) {
diff --git a/hw/9pfs/virtio-9p-local.c b/hw/9pfs/virtio-9p-local.c
index 9559ff6550..d561de88f0 100644
--- a/hw/9pfs/virtio-9p-local.c
+++ b/hw/9pfs/virtio-9p-local.c
@@ -20,6 +20,24 @@
#include <sys/socket.h>
#include <sys/un.h>
#include <attr/xattr.h>
+#include <linux/fs.h>
+#ifdef CONFIG_LINUX_MAGIC_H
+#include <linux/magic.h>
+#endif
+#include <sys/ioctl.h>
+
+#ifndef XFS_SUPER_MAGIC
+#define XFS_SUPER_MAGIC 0x58465342
+#endif
+#ifndef EXT2_SUPER_MAGIC
+#define EXT2_SUPER_MAGIC 0xEF53
+#endif
+#ifndef REISERFS_SUPER_MAGIC
+#define REISERFS_SUPER_MAGIC 0x52654973
+#endif
+#ifndef BTRFS_SUPER_MAGIC
+#define BTRFS_SUPER_MAGIC 0x9123683E
+#endif
static int local_lstat(FsContext *fs_ctx, V9fsPath *fs_path, struct stat *stbuf)
{
@@ -31,7 +49,7 @@ static int local_lstat(FsContext *fs_ctx, V9fsPath *fs_path, struct stat *stbuf)
if (err) {
return err;
}
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
/* Actual credentials are part of extended attrs */
uid_t tmp_uid;
gid_t tmp_gid;
@@ -106,7 +124,7 @@ static int local_post_create_passthrough(FsContext *fs_ctx, const char *path,
* If we fail to change ownership and if we are
* using security model none. Ignore the error
*/
- if (fs_ctx->fs_sm != SM_NONE) {
+ if ((fs_ctx->export_flags & V9FS_SEC_MASK) != V9FS_SM_NONE) {
return -1;
}
}
@@ -120,7 +138,7 @@ static ssize_t local_readlink(FsContext *fs_ctx, V9fsPath *fs_path,
char buffer[PATH_MAX];
char *path = fs_path->data;
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
int fd;
fd = open(rpath(fs_ctx, path, buffer), O_RDONLY);
if (fd == -1) {
@@ -131,8 +149,8 @@ static ssize_t local_readlink(FsContext *fs_ctx, V9fsPath *fs_path,
} while (tsize == -1 && errno == EINTR);
close(fd);
return tsize;
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
tsize = readlink(rpath(fs_ctx, path, buffer), buf, bufsz);
}
return tsize;
@@ -203,16 +221,30 @@ static ssize_t local_preadv(FsContext *ctx, int fd, const struct iovec *iov,
static ssize_t local_pwritev(FsContext *ctx, int fd, const struct iovec *iov,
int iovcnt, off_t offset)
{
+ ssize_t ret
+;
#ifdef CONFIG_PREADV
- return pwritev(fd, iov, iovcnt, offset);
+ ret = pwritev(fd, iov, iovcnt, offset);
#else
int err = lseek(fd, offset, SEEK_SET);
if (err == -1) {
return err;
} else {
- return writev(fd, iov, iovcnt);
+ ret = writev(fd, iov, iovcnt);
}
#endif
+#ifdef CONFIG_SYNC_FILE_RANGE
+ if (ret > 0 && ctx->export_flags & V9FS_IMMEDIATE_WRITEOUT) {
+ /*
+ * Initiate a writeback. This is not a data integrity sync.
+ * We want to ensure that we don't leave dirty pages in the cache
+ * after write when writeout=immediate is sepcified.
+ */
+ sync_file_range(fd, offset, ret,
+ SYNC_FILE_RANGE_WAIT_BEFORE | SYNC_FILE_RANGE_WRITE);
+ }
+#endif
+ return ret;
}
static int local_chmod(FsContext *fs_ctx, V9fsPath *fs_path, FsCred *credp)
@@ -220,10 +252,10 @@ static int local_chmod(FsContext *fs_ctx, V9fsPath *fs_path, FsCred *credp)
char buffer[PATH_MAX];
char *path = fs_path->data;
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
return local_set_xattr(rpath(fs_ctx, path, buffer), credp);
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
return chmod(rpath(fs_ctx, path, buffer), credp->fc_mode);
}
return -1;
@@ -243,7 +275,7 @@ static int local_mknod(FsContext *fs_ctx, V9fsPath *dir_path,
path = fullname.data;
/* Determine the security model */
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
err = mknod(rpath(fs_ctx, path, buffer),
SM_LOCAL_MODE_BITS|S_IFREG, 0);
if (err == -1) {
@@ -254,8 +286,8 @@ static int local_mknod(FsContext *fs_ctx, V9fsPath *dir_path,
serrno = errno;
goto err_end;
}
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
err = mknod(rpath(fs_ctx, path, buffer), credp->fc_mode,
credp->fc_rdev);
if (err == -1) {
@@ -291,7 +323,7 @@ static int local_mkdir(FsContext *fs_ctx, V9fsPath *dir_path,
path = fullname.data;
/* Determine the security model */
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
err = mkdir(rpath(fs_ctx, path, buffer), SM_LOCAL_DIR_MODE_BITS);
if (err == -1) {
goto out;
@@ -302,8 +334,8 @@ static int local_mkdir(FsContext *fs_ctx, V9fsPath *dir_path,
serrno = errno;
goto err_end;
}
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
err = mkdir(rpath(fs_ctx, path, buffer), credp->fc_mode);
if (err == -1) {
goto out;
@@ -331,7 +363,7 @@ static int local_fstat(FsContext *fs_ctx, int fd, struct stat *stbuf)
if (err) {
return err;
}
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
/* Actual credentials are part of extended attrs */
uid_t tmp_uid;
gid_t tmp_gid;
@@ -369,7 +401,7 @@ static int local_open2(FsContext *fs_ctx, V9fsPath *dir_path, const char *name,
path = fullname.data;
/* Determine the security model */
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
fd = open(rpath(fs_ctx, path, buffer), flags, SM_LOCAL_MODE_BITS);
if (fd == -1) {
err = fd;
@@ -382,8 +414,8 @@ static int local_open2(FsContext *fs_ctx, V9fsPath *dir_path, const char *name,
serrno = errno;
goto err_end;
}
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
fd = open(rpath(fs_ctx, path, buffer), flags, credp->fc_mode);
if (fd == -1) {
err = fd;
@@ -422,7 +454,7 @@ static int local_symlink(FsContext *fs_ctx, const char *oldpath,
newpath = fullname.data;
/* Determine the security model */
- if (fs_ctx->fs_sm == SM_MAPPED) {
+ if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
int fd;
ssize_t oldpath_size, write_size;
fd = open(rpath(fs_ctx, newpath, buffer), O_CREAT|O_EXCL|O_RDWR,
@@ -451,8 +483,8 @@ static int local_symlink(FsContext *fs_ctx, const char *oldpath,
serrno = errno;
goto err_end;
}
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
err = symlink(oldpath, rpath(fs_ctx, newpath, buffer));
if (err) {
goto out;
@@ -464,7 +496,7 @@ static int local_symlink(FsContext *fs_ctx, const char *oldpath,
* If we fail to change ownership and if we are
* using security model none. Ignore the error
*/
- if (fs_ctx->fs_sm != SM_NONE) {
+ if ((fs_ctx->export_flags & V9FS_SEC_MASK) != V9FS_SM_NONE) {
serrno = errno;
goto err_end;
} else
@@ -519,13 +551,13 @@ static int local_chown(FsContext *fs_ctx, V9fsPath *fs_path, FsCred *credp)
char *path = fs_path->data;
if ((credp->fc_uid == -1 && credp->fc_gid == -1) ||
- (fs_ctx->fs_sm == SM_PASSTHROUGH)) {
+ (fs_ctx->export_flags & V9FS_SM_PASSTHROUGH)) {
return lchown(rpath(fs_ctx, path, buffer), credp->fc_uid,
credp->fc_gid);
- } else if (fs_ctx->fs_sm == SM_MAPPED) {
+ } else if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
return local_set_xattr(rpath(fs_ctx, path, buffer), credp);
- } else if ((fs_ctx->fs_sm == SM_PASSTHROUGH) ||
- (fs_ctx->fs_sm == SM_NONE)) {
+ } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) ||
+ (fs_ctx->export_flags & V9FS_SM_NONE)) {
return lchown(rpath(fs_ctx, path, buffer), credp->fc_uid,
credp->fc_gid);
}
@@ -645,10 +677,44 @@ static int local_unlinkat(FsContext *ctx, V9fsPath *dir,
return ret;
}
+static int local_ioc_getversion(FsContext *ctx, V9fsPath *path,
+ mode_t st_mode, uint64_t *st_gen)
+{
+ int err, fd;
+ /*
+ * Do not try to open special files like device nodes, fifos etc
+ * We can get fd for regular files and directories only
+ */
+ if (!S_ISREG(st_mode) && !S_ISDIR(st_mode)) {
+ return 0;
+ }
+ fd = local_open(ctx, path, O_RDONLY);
+ if (fd < 0) {
+ return fd;
+ }
+ err = ioctl(fd, FS_IOC_GETVERSION, st_gen);
+ local_close(ctx, fd);
+ return err;
+}
+
static int local_init(FsContext *ctx)
{
- ctx->flags |= PATHNAME_FSCONTEXT;
- return 0;
+ int err;
+ struct statfs stbuf;
+
+ ctx->export_flags |= V9FS_PATHNAME_FSCONTEXT;
+ err = statfs(ctx->fs_root, &stbuf);
+ if (!err) {
+ switch (stbuf.f_type) {
+ case EXT2_SUPER_MAGIC:
+ case BTRFS_SUPER_MAGIC:
+ case REISERFS_SUPER_MAGIC:
+ case XFS_SUPER_MAGIC:
+ ctx->exops.get_st_gen = local_ioc_getversion;
+ break;
+ }
+ }
+ return err;
}
FileOperations local_ops = {
diff --git a/hw/9pfs/virtio-9p.c b/hw/9pfs/virtio-9p.c
index c01c31aa25..aab3bebcc7 100644
--- a/hw/9pfs/virtio-9p.c
+++ b/hw/9pfs/virtio-9p.c
@@ -17,11 +17,10 @@
#include "hw/virtio-pci.h"
#include "virtio-9p.h"
#include "fsdev/qemu-fsdev.h"
-#include "virtio-9p-debug.h"
#include "virtio-9p-xattr.h"
#include "virtio-9p-coth.h"
+#include "trace.h"
-int debug_9p_pdu;
int open_fd_hw;
int total_open_fd;
static int open_fd_rc;
@@ -72,6 +71,55 @@ static int omode_to_uflags(int8_t mode)
return ret;
}
+static int dotl_to_at_flags(int flags)
+{
+ int rflags = 0;
+ if (flags & P9_DOTL_AT_REMOVEDIR) {
+ rflags |= AT_REMOVEDIR;
+ }
+ return rflags;
+}
+
+struct dotl_openflag_map {
+ int dotl_flag;
+ int open_flag;
+};
+
+static int dotl_to_open_flags(int flags)
+{
+ int i;
+ /*
+ * We have same bits for P9_DOTL_READONLY, P9_DOTL_WRONLY
+ * and P9_DOTL_NOACCESS
+ */
+ int oflags = flags & O_ACCMODE;
+
+ struct dotl_openflag_map dotl_oflag_map[] = {
+ { P9_DOTL_CREATE, O_CREAT },
+ { P9_DOTL_EXCL, O_EXCL },
+ { P9_DOTL_NOCTTY , O_NOCTTY },
+ { P9_DOTL_TRUNC, O_TRUNC },
+ { P9_DOTL_APPEND, O_APPEND },
+ { P9_DOTL_NONBLOCK, O_NONBLOCK } ,
+ { P9_DOTL_DSYNC, O_DSYNC },
+ { P9_DOTL_FASYNC, FASYNC },
+ { P9_DOTL_DIRECT, O_DIRECT },
+ { P9_DOTL_LARGEFILE, O_LARGEFILE },
+ { P9_DOTL_DIRECTORY, O_DIRECTORY },
+ { P9_DOTL_NOFOLLOW, O_NOFOLLOW },
+ { P9_DOTL_NOATIME, O_NOATIME },
+ { P9_DOTL_SYNC, O_SYNC },
+ };
+
+ for (i = 0; i < ARRAY_SIZE(dotl_oflag_map); i++) {
+ if (flags & dotl_oflag_map[i].dotl_flag) {
+ oflags |= dotl_oflag_map[i].open_flag;
+ }
+ }
+
+ return oflags;
+}
+
void cred_init(FsCred *credp)
{
credp->fc_uid = -1;
@@ -80,6 +128,21 @@ void cred_init(FsCred *credp)
credp->fc_rdev = -1;
}
+static int get_dotl_openflags(V9fsState *s, int oflags)
+{
+ int flags;
+ /*
+ * Filter the client open flags
+ */
+ flags = dotl_to_open_flags(oflags);
+ flags &= ~(O_NOCTTY | O_ASYNC | O_CREAT);
+ /*
+ * Ignore direct disk access hint until the server supports it.
+ */
+ flags &= ~O_DIRECT;
+ return flags;
+}
+
void v9fs_string_init(V9fsString *str)
{
str->data = NULL;
@@ -621,9 +684,6 @@ static V9fsPDU *alloc_pdu(V9fsState *s)
static void free_pdu(V9fsState *s, V9fsPDU *pdu)
{
if (pdu) {
- if (debug_9p_pdu) {
- pprint_pdu(pdu);
- }
/*
* Cancelled pdu are added back to the freelist
* by flush request .
@@ -909,6 +969,7 @@ static void complete_pdu(V9fsState *s, V9fsPDU *pdu, ssize_t len)
if (s->proto_version == V9FS_PROTO_2000L) {
id = P9_RLERROR;
}
+ trace_complete_pdu(pdu->tag, pdu->id, err); /* Trace ERROR */
}
/* fill out the header */
@@ -1218,6 +1279,7 @@ static void v9fs_version(void *opaque)
size_t offset = 7;
pdu_unmarshal(pdu, offset, "ds", &s->msize, &version);
+ trace_v9fs_version(pdu->tag, pdu->id, s->msize, version.data);
if (!strcmp(version.data, "9P2000.u")) {
s->proto_version = V9FS_PROTO_2000U;
@@ -1228,6 +1290,8 @@ static void v9fs_version(void *opaque)
}
offset += pdu_marshal(pdu, offset, "ds", s->msize, &version);
+ trace_v9fs_version_return(pdu->tag, pdu->id, s->msize, version.data);
+
complete_pdu(s, pdu, offset);
v9fs_string_free(&version);
@@ -1246,6 +1310,7 @@ static void v9fs_attach(void *opaque)
ssize_t err;
pdu_unmarshal(pdu, offset, "ddssd", &fid, &afid, &uname, &aname, &n_uname);
+ trace_v9fs_attach(pdu->tag, pdu->id, fid, afid, uname.data, aname.data);
fidp = alloc_fid(s, fid);
if (fidp == NULL) {
@@ -1270,6 +1335,8 @@ static void v9fs_attach(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_attach_return(pdu->tag, pdu->id,
+ qid.type, qid.version, qid.path);
complete_pdu(s, pdu, err);
v9fs_string_free(&uname);
v9fs_string_free(&aname);
@@ -1287,6 +1354,7 @@ static void v9fs_stat(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "d", &fid);
+ trace_v9fs_stat(pdu->tag, pdu->id, fid);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -1307,6 +1375,9 @@ static void v9fs_stat(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_stat_return(pdu->tag, pdu->id, v9stat.mode,
+ v9stat.atime, v9stat.mtime, v9stat.length);
+
complete_pdu(s, pdu, err);
}
@@ -1323,6 +1394,7 @@ static void v9fs_getattr(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "dq", &fid, &request_mask);
+ trace_v9fs_getattr(pdu->tag, pdu->id, fid, request_mask);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -1338,11 +1410,24 @@ static void v9fs_getattr(void *opaque)
goto out;
}
stat_to_v9stat_dotl(s, &stbuf, &v9stat_dotl);
+
+ /* fill st_gen if requested and supported by underlying fs */
+ if (request_mask & P9_STATS_GEN) {
+ retval = v9fs_co_st_gen(pdu, &fidp->path, stbuf.st_mode, &v9stat_dotl);
+ if (retval < 0) {
+ goto out;
+ }
+ v9stat_dotl.st_result_mask |= P9_STATS_GEN;
+ }
retval = offset;
retval += pdu_marshal(pdu, offset, "A", &v9stat_dotl);
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_getattr_return(pdu->tag, pdu->id, v9stat_dotl.st_result_mask,
+ v9stat_dotl.st_mode, v9stat_dotl.st_uid,
+ v9stat_dotl.st_gid);
+
complete_pdu(s, pdu, retval);
}
@@ -1470,6 +1555,8 @@ static void v9fs_walk(void *opaque)
offset += pdu_unmarshal(pdu, offset, "ddw", &fid,
&newfid, &nwnames);
+ trace_v9fs_walk(pdu->tag, pdu->id, fid, newfid, nwnames);
+
if (nwnames && nwnames <= P9_MAXWELEM) {
wnames = g_malloc0(sizeof(wnames[0]) * nwnames);
qids = g_malloc0(sizeof(qids[0]) * nwnames);
@@ -1526,6 +1613,7 @@ out:
v9fs_path_free(&dpath);
v9fs_path_free(&path);
out_nofid:
+ trace_v9fs_walk_return(pdu->tag, pdu->id, nwnames, qids);
complete_pdu(s, pdu, err);
if (nwnames && nwnames <= P9_MAXWELEM) {
for (name_idx = 0; name_idx < nwnames; name_idx++) {
@@ -1576,6 +1664,8 @@ static void v9fs_open(void *opaque)
} else {
pdu_unmarshal(pdu, offset, "db", &fid, &mode);
}
+ trace_v9fs_open(pdu->tag, pdu->id, fid, mode);
+
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
err = -ENOENT;
@@ -1598,10 +1688,7 @@ static void v9fs_open(void *opaque)
err = offset;
} else {
if (s->proto_version == V9FS_PROTO_2000L) {
- flags = mode;
- flags &= ~(O_NOCTTY | O_ASYNC | O_CREAT);
- /* Ignore direct disk access hint until the server supports it. */
- flags &= ~O_DIRECT;
+ flags = get_dotl_openflags(s, mode);
} else {
flags = omode_to_uflags(mode);
}
@@ -1625,6 +1712,8 @@ static void v9fs_open(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_open_return(pdu->tag, pdu->id,
+ qid.type, qid.version, qid.path, iounit);
complete_pdu(s, pdu, err);
}
@@ -1643,6 +1732,7 @@ static void v9fs_lcreate(void *opaque)
pdu_unmarshal(pdu, offset, "dsddd", &dfid, &name, &flags,
&mode, &gid);
+ trace_v9fs_lcreate(pdu->tag, pdu->id, dfid, flags, mode, gid);
fidp = get_fid(pdu, dfid);
if (fidp == NULL) {
@@ -1650,8 +1740,7 @@ static void v9fs_lcreate(void *opaque)
goto out_nofid;
}
- /* Ignore direct disk access hint until the server supports it. */
- flags &= ~O_DIRECT;
+ flags = get_dotl_openflags(pdu->s, flags);
err = v9fs_co_open2(pdu, fidp, &name, gid,
flags | O_CREAT, mode, &stbuf);
if (err < 0) {
@@ -1673,6 +1762,8 @@ static void v9fs_lcreate(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_lcreate_return(pdu->tag, pdu->id,
+ qid.type, qid.version, qid.path, iounit);
complete_pdu(pdu->s, pdu, err);
v9fs_string_free(&name);
}
@@ -1688,6 +1779,8 @@ static void v9fs_fsync(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "dd", &fid, &datasync);
+ trace_v9fs_fsync(pdu->tag, pdu->id, fid, datasync);
+
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
err = -ENOENT;
@@ -1712,6 +1805,7 @@ static void v9fs_clunk(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "d", &fid);
+ trace_v9fs_clunk(pdu->tag, pdu->id, fid);
fidp = clunk_fid(s, fid);
if (fidp == NULL) {
@@ -1828,6 +1922,7 @@ static void v9fs_read(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "dqd", &fid, &off, &max_count);
+ trace_v9fs_read(pdu->tag, pdu->id, fid, off, max_count);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -1886,6 +1981,7 @@ static void v9fs_read(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_read_return(pdu->tag, pdu->id, count, err);
complete_pdu(s, pdu, err);
}
@@ -1970,6 +2066,8 @@ static void v9fs_readdir(void *opaque)
pdu_unmarshal(pdu, offset, "dqd", &fid, &initial_offset, &max_count);
+ trace_v9fs_readdir(pdu->tag, pdu->id, fid, initial_offset, max_count);
+
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
retval = -EINVAL;
@@ -1995,6 +2093,7 @@ static void v9fs_readdir(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_readdir_return(pdu->tag, pdu->id, count, retval);
complete_pdu(s, pdu, retval);
}
@@ -2059,6 +2158,7 @@ static void v9fs_write(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "dqdv", &fid, &off, &count, sg, &cnt);
+ trace_v9fs_write(pdu->tag, pdu->id, fid, off, count, cnt);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -2105,6 +2205,7 @@ static void v9fs_write(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_write_return(pdu->tag, pdu->id, total, err);
complete_pdu(s, pdu, err);
}
@@ -2129,6 +2230,8 @@ static void v9fs_create(void *opaque)
pdu_unmarshal(pdu, offset, "dsdbs", &fid, &name,
&perm, &mode, &extension);
+ trace_v9fs_create(pdu->tag, pdu->id, fid, name.data, perm, mode);
+
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
err = -EINVAL;
@@ -2262,6 +2365,8 @@ static void v9fs_create(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_create_return(pdu->tag, pdu->id,
+ qid.type, qid.version, qid.path, iounit);
complete_pdu(pdu->s, pdu, err);
v9fs_string_free(&name);
v9fs_string_free(&extension);
@@ -2282,6 +2387,7 @@ static void v9fs_symlink(void *opaque)
size_t offset = 7;
pdu_unmarshal(pdu, offset, "dssd", &dfid, &name, &symname, &gid);
+ trace_v9fs_symlink(pdu->tag, pdu->id, dfid, name.data, symname.data, gid);
dfidp = get_fid(pdu, dfid);
if (dfidp == NULL) {
@@ -2298,6 +2404,8 @@ static void v9fs_symlink(void *opaque)
out:
put_fid(pdu, dfidp);
out_nofid:
+ trace_v9fs_symlink_return(pdu->tag, pdu->id,
+ qid.type, qid.version, qid.path);
complete_pdu(pdu->s, pdu, err);
v9fs_string_free(&name);
v9fs_string_free(&symname);
@@ -2312,6 +2420,7 @@ static void v9fs_flush(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "w", &tag);
+ trace_v9fs_flush(pdu->tag, pdu->id, tag);
QLIST_FOREACH(cancel_pdu, &s->active_list, next) {
if (cancel_pdu->tag == tag) {
@@ -2342,6 +2451,7 @@ static void v9fs_link(void *opaque)
int err = 0;
pdu_unmarshal(pdu, offset, "dds", &dfid, &oldfid, &name);
+ trace_v9fs_link(pdu->tag, pdu->id, dfid, oldfid, name.data);
dfidp = get_fid(pdu, dfid);
if (dfidp == NULL) {
@@ -2375,6 +2485,7 @@ static void v9fs_remove(void *opaque)
V9fsPDU *pdu = opaque;
pdu_unmarshal(pdu, offset, "d", &fid);
+ trace_v9fs_remove(pdu->tag, pdu->id, fid);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -2382,7 +2493,7 @@ static void v9fs_remove(void *opaque)
goto out_nofid;
}
/* if fs driver is not path based, return EOPNOTSUPP */
- if (!pdu->s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (!(pdu->s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT)) {
err = -EOPNOTSUPP;
goto out_err;
}
@@ -2417,6 +2528,7 @@ static void v9fs_unlinkat(void *opaque)
V9fsPDU *pdu = opaque;
pdu_unmarshal(pdu, offset, "dsd", &dfid, &name, &flags);
+ flags = dotl_to_at_flags(flags);
dfidp = get_fid(pdu, dfid);
if (dfidp == NULL) {
@@ -2528,7 +2640,7 @@ static void v9fs_rename(void *opaque)
}
BUG_ON(fidp->fid_type != P9_FID_NONE);
/* if fs driver is not path based, return EOPNOTSUPP */
- if (!pdu->s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (!(pdu->s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT)) {
err = -EOPNOTSUPP;
goto out;
}
@@ -2601,7 +2713,7 @@ static int v9fs_complete_renameat(V9fsPDU *pdu, int32_t olddirfid,
if (err < 0) {
goto out;
}
- if (s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT) {
/* Only for path based fid we need to do the below fixup */
v9fs_fix_fid_paths(pdu, &olddirfidp->path, old_name,
&newdirfidp->path, new_name);
@@ -2653,6 +2765,8 @@ static void v9fs_wstat(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "dwS", &fid, &unused, &v9stat);
+ trace_v9fs_wstat(pdu->tag, pdu->id, fid,
+ v9stat.mode, v9stat.atime, v9stat.mtime);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -2821,6 +2935,7 @@ static void v9fs_mknod(void *opaque)
pdu_unmarshal(pdu, offset, "dsdddd", &fid, &name, &mode,
&major, &minor, &gid);
+ trace_v9fs_mknod(pdu->tag, pdu->id, fid, mode, major, minor);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
@@ -2838,6 +2953,7 @@ static void v9fs_mknod(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_mknod_return(pdu->tag, pdu->id, qid.type, qid.version, qid.path);
complete_pdu(s, pdu, err);
v9fs_string_free(&name);
}
@@ -2865,6 +2981,10 @@ static void v9fs_lock(void *opaque)
pdu_unmarshal(pdu, offset, "dbdqqds", &fid, &flock->type,
&flock->flags, &flock->start, &flock->length,
&flock->proc_id, &flock->client_id);
+
+ trace_v9fs_lock(pdu->tag, pdu->id, fid,
+ flock->type, flock->start, flock->length);
+
status = P9_LOCK_ERROR;
/* We support only block flag now (that too ignored currently) */
@@ -2887,6 +3007,7 @@ out:
out_nofid:
err = offset;
err += pdu_marshal(pdu, offset, "b", status);
+ trace_v9fs_lock_return(pdu->tag, pdu->id, status);
complete_pdu(s, pdu, err);
v9fs_string_free(&flock->client_id);
g_free(flock);
@@ -2911,6 +3032,9 @@ static void v9fs_getlock(void *opaque)
&glock->start, &glock->length, &glock->proc_id,
&glock->client_id);
+ trace_v9fs_getlock(pdu->tag, pdu->id, fid,
+ glock->type, glock->start, glock->length);
+
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
err = -ENOENT;
@@ -2920,7 +3044,7 @@ static void v9fs_getlock(void *opaque)
if (err < 0) {
goto out;
}
- glock->type = F_UNLCK;
+ glock->type = P9_LOCK_TYPE_UNLCK;
offset += pdu_marshal(pdu, offset, "bqqds", glock->type,
glock->start, glock->length, glock->proc_id,
&glock->client_id);
@@ -2928,6 +3052,9 @@ static void v9fs_getlock(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_getlock_return(pdu->tag, pdu->id, glock->type, glock->start,
+ glock->length, glock->proc_id);
+
complete_pdu(s, pdu, err);
v9fs_string_free(&glock->client_id);
g_free(glock);
@@ -2948,6 +3075,8 @@ static void v9fs_mkdir(void *opaque)
pdu_unmarshal(pdu, offset, "dsdd", &fid, &name, &mode, &gid);
+ trace_v9fs_mkdir(pdu->tag, pdu->id, fid, name.data, mode, gid);
+
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
err = -ENOENT;
@@ -2963,6 +3092,8 @@ static void v9fs_mkdir(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_mkdir_return(pdu->tag, pdu->id,
+ qid.type, qid.version, qid.path, err);
complete_pdu(pdu->s, pdu, err);
v9fs_string_free(&name);
}
@@ -2980,6 +3111,8 @@ static void v9fs_xattrwalk(void *opaque)
V9fsState *s = pdu->s;
pdu_unmarshal(pdu, offset, "dds", &fid, &newfid, &name);
+ trace_v9fs_xattrwalk(pdu->tag, pdu->id, fid, newfid, name.data);
+
file_fidp = get_fid(pdu, fid);
if (file_fidp == NULL) {
err = -ENOENT;
@@ -3056,6 +3189,7 @@ out:
put_fid(pdu, xattr_fidp);
}
out_nofid:
+ trace_v9fs_xattrwalk_return(pdu->tag, pdu->id, size);
complete_pdu(s, pdu, err);
v9fs_string_free(&name);
}
@@ -3075,6 +3209,7 @@ static void v9fs_xattrcreate(void *opaque)
pdu_unmarshal(pdu, offset, "dsqd",
&fid, &name, &size, &flags);
+ trace_v9fs_xattrcreate(pdu->tag, pdu->id, fid, name.data, size, flags);
file_fidp = get_fid(pdu, fid);
if (file_fidp == NULL) {
@@ -3111,6 +3246,7 @@ static void v9fs_readlink(void *opaque)
V9fsFidState *fidp;
pdu_unmarshal(pdu, offset, "d", &fid);
+ trace_v9fs_readlink(pdu->tag, pdu->id, fid);
fidp = get_fid(pdu, fid);
if (fidp == NULL) {
err = -ENOENT;
@@ -3128,6 +3264,7 @@ static void v9fs_readlink(void *opaque)
out:
put_fid(pdu, fidp);
out_nofid:
+ trace_v9fs_readlink_return(pdu->tag, pdu->id, target.data);
complete_pdu(pdu->s, pdu, err);
}
@@ -3179,9 +3316,6 @@ static void submit_pdu(V9fsState *s, V9fsPDU *pdu)
Coroutine *co;
CoroutineEntry *handler;
- if (debug_9p_pdu) {
- pprint_pdu(pdu);
- }
if (pdu->id >= ARRAY_SIZE(pdu_co_handlers) ||
(pdu_co_handlers[pdu->id] == NULL)) {
handler = v9fs_op_not_supp;
diff --git a/hw/9pfs/virtio-9p.h b/hw/9pfs/virtio-9p.h
index 60b8a56e57..802f5809d1 100644
--- a/hw/9pfs/virtio-9p.h
+++ b/hw/9pfs/virtio-9p.h
@@ -352,6 +352,35 @@ typedef struct V9fsMkState {
V9fsString fullname;
} V9fsMkState;
+/* 9p2000.L open flags */
+#define P9_DOTL_RDONLY 00000000
+#define P9_DOTL_WRONLY 00000001
+#define P9_DOTL_RDWR 00000002
+#define P9_DOTL_NOACCESS 00000003
+#define P9_DOTL_CREATE 00000100
+#define P9_DOTL_EXCL 00000200
+#define P9_DOTL_NOCTTY 00000400
+#define P9_DOTL_TRUNC 00001000
+#define P9_DOTL_APPEND 00002000
+#define P9_DOTL_NONBLOCK 00004000
+#define P9_DOTL_DSYNC 00010000
+#define P9_DOTL_FASYNC 00020000
+#define P9_DOTL_DIRECT 00040000
+#define P9_DOTL_LARGEFILE 00100000
+#define P9_DOTL_DIRECTORY 00200000
+#define P9_DOTL_NOFOLLOW 00400000
+#define P9_DOTL_NOATIME 01000000
+#define P9_DOTL_CLOEXEC 02000000
+#define P9_DOTL_SYNC 04000000
+
+/* 9p2000.L at flags */
+#define P9_DOTL_AT_REMOVEDIR 0x200
+
+/* 9P2000.L lock type */
+#define P9_LOCK_TYPE_RDLCK 0
+#define P9_LOCK_TYPE_WRLCK 1
+#define P9_LOCK_TYPE_UNLCK 2
+
#define P9_LOCK_SUCCESS 0
#define P9_LOCK_BLOCKED 1
#define P9_LOCK_ERROR 2
@@ -393,21 +422,21 @@ static inline size_t do_pdu_unpack(void *dst, struct iovec *sg, int sg_count,
static inline void v9fs_path_write_lock(V9fsState *s)
{
- if (s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT) {
qemu_co_rwlock_wrlock(&s->rename_lock);
}
}
static inline void v9fs_path_read_lock(V9fsState *s)
{
- if (s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT) {
qemu_co_rwlock_rdlock(&s->rename_lock);
}
}
static inline void v9fs_path_unlock(V9fsState *s)
{
- if (s->ctx.flags & PATHNAME_FSCONTEXT) {
+ if (s->ctx.export_flags & V9FS_PATHNAME_FSCONTEXT) {
qemu_co_rwlock_unlock(&s->rename_lock);
}
}
diff --git a/hw/collie.c b/hw/collie.c
index a10cc1b90c..8dd6e4ec7e 100644
--- a/hw/collie.c
+++ b/hw/collie.c
@@ -13,6 +13,7 @@
#include "arm-misc.h"
#include "flash.h"
#include "blockdev.h"
+#include "exec-memory.h"
static struct arm_boot_info collie_binfo = {
.loader_start = SA_SDCS0,
@@ -26,12 +27,13 @@ static void collie_init(ram_addr_t ram_size,
{
StrongARMState *s;
DriveInfo *dinfo;
+ MemoryRegion *sysmem = get_system_memory();
if (!cpu_model) {
cpu_model = "sa1110";
}
- s = sa1110_init(collie_binfo.ram_size, cpu_model);
+ s = sa1110_init(sysmem, collie_binfo.ram_size, cpu_model);
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(SA_CS0, NULL, "collie.fl1", 0x02000000,
diff --git a/hw/devices.h b/hw/devices.h
index 8ac384ff20..1a55c1e905 100644
--- a/hw/devices.h
+++ b/hw/devices.h
@@ -53,7 +53,8 @@ void retu_key_event(void *retu, int state);
/* tc6393xb.c */
typedef struct TC6393xbState TC6393xbState;
#define TC6393XB_RAM 0x110000 /* amount of ram for Video and USB */
-TC6393xbState *tc6393xb_init(uint32_t base, qemu_irq irq);
+TC6393xbState *tc6393xb_init(struct MemoryRegion *sysmem,
+ uint32_t base, qemu_irq irq);
void tc6393xb_gpio_out_set(TC6393xbState *s, int line,
qemu_irq handler);
qemu_irq *tc6393xb_gpio_in_get(TC6393xbState *s);
diff --git a/hw/pci.c b/hw/pci.c
index 749e8d86ca..e8cc1b046f 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -998,17 +998,8 @@ static void pci_update_mappings(PCIDevice *d)
}
r->addr = new_addr;
if (r->addr != PCI_BAR_UNMAPPED) {
- if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
- memory_region_add_subregion_overlap(r->address_space,
- r->addr,
- r->memory,
- 1);
- } else {
- memory_region_add_subregion_overlap(r->address_space,
- r->addr,
- r->memory,
- 1);
- }
+ memory_region_add_subregion_overlap(r->address_space,
+ r->addr, r->memory, 1);
}
}
}
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index ebcaafa641..aac3526f55 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -73,11 +73,13 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
const char *initrd_filename,
const char *cpu_model)
{
+ MemoryRegion *sysmem = get_system_memory();
CPUState *env = NULL;
char *filename;
qemu_irq *pic, **heathrow_irqs;
int linux_boot, i;
- ram_addr_t ram_offset, bios_offset;
+ MemoryRegion *ram = g_new(MemoryRegion, 1);
+ MemoryRegion *bios = g_new(MemoryRegion, 1);
uint32_t kernel_base, initrd_base, cmdline_base = 0;
int32_t kernel_size, initrd_size;
PCIBus *pci_bus;
@@ -114,15 +116,16 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
exit(1);
}
- ram_offset = qemu_ram_alloc(NULL, "ppc_heathrow.ram", ram_size);
- cpu_register_physical_memory(0, ram_size, ram_offset);
+ memory_region_init_ram(ram, NULL, "ppc_heathrow.ram", ram_size);
+ memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
- bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
- cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
+ memory_region_set_readonly(bios, true);
+ memory_region_add_subregion(sysmem, PROM_ADDR, bios);
/* Load OpenBIOS (ELF) */
if (filename) {
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 6427baa562..f22d5b98c5 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -116,16 +116,17 @@ static uint32_t speaker_ioport_read (void *opaque, uint32_t addr)
/* PCI intack register */
/* Read-only register (?) */
-static void _PPC_intack_write (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void PPC_intack_write (void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
#if 0
- printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
+ printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx64 "\n", __func__, addr,
value);
#endif
}
-static inline uint32_t _PPC_intack_read(target_phys_addr_t addr)
+static uint64_t PPC_intack_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
uint32_t retval = 0;
@@ -139,31 +140,10 @@ static inline uint32_t _PPC_intack_read(target_phys_addr_t addr)
return retval;
}
-static uint32_t PPC_intack_readb (void *opaque, target_phys_addr_t addr)
-{
- return _PPC_intack_read(addr);
-}
-
-static uint32_t PPC_intack_readw (void *opaque, target_phys_addr_t addr)
-{
- return _PPC_intack_read(addr);
-}
-
-static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr)
-{
- return _PPC_intack_read(addr);
-}
-
-static CPUWriteMemoryFunc * const PPC_intack_write[] = {
- &_PPC_intack_write,
- &_PPC_intack_write,
- &_PPC_intack_write,
-};
-
-static CPUReadMemoryFunc * const PPC_intack_read[] = {
- &PPC_intack_readb,
- &PPC_intack_readw,
- &PPC_intack_readl,
+static const MemoryRegionOps PPC_intack_ops = {
+ .read = PPC_intack_read,
+ .write = PPC_intack_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
/* PowerPC control and status registers */
@@ -244,17 +224,14 @@ static uint32_t PPC_XCSR_readl (void *opaque, target_phys_addr_t addr)
return retval;
}
-static CPUWriteMemoryFunc * const PPC_XCSR_write[] = {
- &PPC_XCSR_writeb,
- &PPC_XCSR_writew,
- &PPC_XCSR_writel,
+static const MemoryRegionOps PPC_XCSR_ops = {
+ .old_mmio = {
+ .read = { PPC_XCSR_readb, PPC_XCSR_readw, PPC_XCSR_readl, },
+ .write = { PPC_XCSR_writeb, PPC_XCSR_writew, PPC_XCSR_writel, },
+ },
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
-static CPUReadMemoryFunc * const PPC_XCSR_read[] = {
- &PPC_XCSR_readb,
- &PPC_XCSR_readw,
- &PPC_XCSR_readl,
-};
#endif
/* Fake super-io ports for PREP platform (Intel 82378ZB) */
@@ -503,16 +480,12 @@ static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
return ret;
}
-static CPUWriteMemoryFunc * const PPC_prep_io_write[] = {
- &PPC_prep_io_writeb,
- &PPC_prep_io_writew,
- &PPC_prep_io_writel,
-};
-
-static CPUReadMemoryFunc * const PPC_prep_io_read[] = {
- &PPC_prep_io_readb,
- &PPC_prep_io_readw,
- &PPC_prep_io_readl,
+static const MemoryRegionOps PPC_prep_io_ops = {
+ .old_mmio = {
+ .read = { PPC_prep_io_readb, PPC_prep_io_readw, PPC_prep_io_readl },
+ .write = { PPC_prep_io_writeb, PPC_prep_io_writew, PPC_prep_io_writel },
+ },
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
#define NVRAM_SIZE 0x2000
@@ -534,13 +507,19 @@ static void ppc_prep_init (ram_addr_t ram_size,
const char *initrd_filename,
const char *cpu_model)
{
+ MemoryRegion *sysmem = get_system_memory();
CPUState *env = NULL;
char *filename;
nvram_t nvram;
M48t59State *m48t59;
- int PPC_io_memory;
+ MemoryRegion *PPC_io_memory = g_new(MemoryRegion, 1);
+ MemoryRegion *intack = g_new(MemoryRegion, 1);
+#if 0
+ MemoryRegion *xcsr = g_new(MemoryRegion, 1);
+#endif
int linux_boot, i, nb_nics1, bios_size;
- ram_addr_t ram_offset, bios_offset;
+ MemoryRegion *ram = g_new(MemoryRegion, 1);
+ MemoryRegion *bios = g_new(MemoryRegion, 1);
uint32_t kernel_base, initrd_base;
long kernel_size, initrd_size;
PCIBus *pci_bus;
@@ -574,11 +553,11 @@ static void ppc_prep_init (ram_addr_t ram_size,
}
/* allocate RAM */
- ram_offset = qemu_ram_alloc(NULL, "ppc_prep.ram", ram_size);
- cpu_register_physical_memory(0, ram_size, ram_offset);
+ memory_region_init_ram(ram, NULL, "ppc_prep.ram", ram_size);
+ memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
- bios_offset = qemu_ram_alloc(NULL, "ppc_prep.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "ppc_prep.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@@ -591,8 +570,8 @@ static void ppc_prep_init (ram_addr_t ram_size,
target_phys_addr_t bios_addr;
bios_size = (bios_size + 0xfff) & ~0xfff;
bios_addr = (uint32_t)(-bios_size);
- cpu_register_physical_memory(bios_addr, bios_size,
- bios_offset | IO_MEM_ROM);
+ memory_region_set_readonly(bios, true);
+ memory_region_add_subregion(sysmem, bios_addr, bios);
bios_size = load_image_targphys(filename, bios_addr, bios_size);
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
@@ -655,10 +634,9 @@ static void ppc_prep_init (ram_addr_t ram_size,
isa_bus_irqs(i8259);
// pci_bus = i440fx_init();
/* Register 8 MB of ISA IO space (needed for non-contiguous map) */
- PPC_io_memory = cpu_register_io_memory(PPC_prep_io_read,
- PPC_prep_io_write, sysctrl,
- DEVICE_LITTLE_ENDIAN);
- cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
+ memory_region_init_io(PPC_io_memory, &PPC_prep_io_ops, sysctrl,
+ "ppc-io", 0x00800000);
+ memory_region_add_subregion(sysmem, 0x80000000, PPC_io_memory);
/* init basic PC hardware */
pci_vga_init(pci_bus);
@@ -713,15 +691,12 @@ static void ppc_prep_init (ram_addr_t ram_size,
register_ioport_read(0x0800, 0x52, 1, &PREP_io_800_readb, sysctrl);
register_ioport_write(0x0800, 0x52, 1, &PREP_io_800_writeb, sysctrl);
/* PCI intack location */
- PPC_io_memory = cpu_register_io_memory(PPC_intack_read,
- PPC_intack_write, NULL,
- DEVICE_LITTLE_ENDIAN);
- cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory);
+ memory_region_init_io(intack, &PPC_intack_ops, NULL, "ppc-intack", 4);
+ memory_region_add_subregion(sysmem, 0xBFFFFFF0, intack);
/* PowerPC control and status register group */
#if 0
- PPC_io_memory = cpu_register_io_memory(PPC_XCSR_read, PPC_XCSR_write,
- NULL, DEVICE_LITTLE_ENDIAN);
- cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory);
+ memory_region_init_io(xcsr, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);
+ memory_region_add_subregion(sysmem, 0xFEFF0000, xcsr);
#endif
if (usb_enabled) {
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 5bf8eab897..51b6abddd3 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -229,6 +229,7 @@ static void mpc8544ds_init(ram_addr_t ram_size,
const char *cpu_model)
{
MemoryRegion *address_space_mem = get_system_memory();
+ MemoryRegion *ram = g_new(MemoryRegion, 1);
PCIBus *pci_bus;
CPUState *env = NULL;
uint64_t elf_entry;
@@ -291,8 +292,8 @@ static void mpc8544ds_init(ram_addr_t ram_size,
ram_size &= ~(RAM_SIZES_ALIGN - 1);
/* Register Memory */
- cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL,
- "mpc8544ds.ram", ram_size));
+ memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
+ memory_region_add_subregion(address_space_mem, 0, ram);
/* MPIC */
mpic = mpic_init(address_space_mem, MPC8544_MPIC_REGS_BASE,
diff --git a/hw/pxa.h b/hw/pxa.h
index 1204165549..7e9838408b 100644
--- a/hw/pxa.h
+++ b/hw/pxa.h
@@ -122,6 +122,11 @@ typedef struct {
CPUState *env;
DeviceState *pic;
qemu_irq reset;
+ MemoryRegion sdram;
+ MemoryRegion internal;
+ MemoryRegion cm_iomem;
+ MemoryRegion mm_iomem;
+ MemoryRegion pm_iomem;
DeviceState *dma;
DeviceState *gpio;
PXA2xxLCDState *lcd;
@@ -151,6 +156,7 @@ typedef struct {
} PXA2xxState;
struct PXA2xxI2SState {
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq rx_dma;
qemu_irq tx_dma;
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 70d7c8a06d..bfc28a999b 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -88,7 +88,8 @@ static PXASSPDef pxa27x_ssp[] = {
#define PCMD0 0x80 /* Power Manager I2C Command register File 0 */
#define PCMD31 0xfc /* Power Manager I2C Command register File 31 */
-static uint32_t pxa2xx_pm_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_pm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
@@ -107,7 +108,7 @@ static uint32_t pxa2xx_pm_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
@@ -134,16 +135,10 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_pm_readfn[] = {
- pxa2xx_pm_read,
- pxa2xx_pm_read,
- pxa2xx_pm_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_pm_writefn[] = {
- pxa2xx_pm_write,
- pxa2xx_pm_write,
- pxa2xx_pm_write,
+static const MemoryRegionOps pxa2xx_pm_ops = {
+ .read = pxa2xx_pm_read,
+ .write = pxa2xx_pm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_pxa2xx_pm = {
@@ -162,7 +157,8 @@ static const VMStateDescription vmstate_pxa2xx_pm = {
#define OSCC 0x08 /* Oscillator Configuration register */
#define CCSR 0x0c /* Core Clock Status register */
-static uint32_t pxa2xx_cm_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_cm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
@@ -183,7 +179,7 @@ static uint32_t pxa2xx_cm_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_cm_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
@@ -206,16 +202,10 @@ static void pxa2xx_cm_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_cm_readfn[] = {
- pxa2xx_cm_read,
- pxa2xx_cm_read,
- pxa2xx_cm_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_cm_writefn[] = {
- pxa2xx_cm_write,
- pxa2xx_cm_write,
- pxa2xx_cm_write,
+static const MemoryRegionOps pxa2xx_cm_ops = {
+ .read = pxa2xx_cm_read,
+ .write = pxa2xx_cm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_pxa2xx_cm = {
@@ -461,7 +451,8 @@ static void pxa2xx_cp14_write(void *opaque, int op2, int reg, int crm,
#define BSCNTR3 0x60 /* Memory Buffer Strength Control register 3 */
#define SA1110 0x64 /* SA-1110 Memory Compatibility register */
-static uint32_t pxa2xx_mm_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_mm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
@@ -478,7 +469,7 @@ static uint32_t pxa2xx_mm_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_mm_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
@@ -495,16 +486,10 @@ static void pxa2xx_mm_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_mm_readfn[] = {
- pxa2xx_mm_read,
- pxa2xx_mm_read,
- pxa2xx_mm_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_mm_writefn[] = {
- pxa2xx_mm_write,
- pxa2xx_mm_write,
- pxa2xx_mm_write,
+static const MemoryRegionOps pxa2xx_mm_ops = {
+ .read = pxa2xx_mm_read,
+ .write = pxa2xx_mm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_pxa2xx_mm = {
@@ -521,6 +506,7 @@ static const VMStateDescription vmstate_pxa2xx_mm = {
/* Synchronous Serial Ports */
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
qemu_irq irq;
int enable;
SSIBus *bus;
@@ -627,7 +613,8 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
pxa2xx_ssp_int_update(s);
}
-static uint32_t pxa2xx_ssp_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_ssp_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
uint32_t retval;
@@ -673,9 +660,10 @@ static uint32_t pxa2xx_ssp_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_ssp_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value64, unsigned size)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
+ uint32_t value = value64;
switch (addr) {
case SSCR0:
@@ -762,16 +750,10 @@ static void pxa2xx_ssp_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_ssp_readfn[] = {
- pxa2xx_ssp_read,
- pxa2xx_ssp_read,
- pxa2xx_ssp_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_ssp_writefn[] = {
- pxa2xx_ssp_write,
- pxa2xx_ssp_write,
- pxa2xx_ssp_write,
+static const MemoryRegionOps pxa2xx_ssp_ops = {
+ .read = pxa2xx_ssp_read,
+ .write = pxa2xx_ssp_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
@@ -823,15 +805,12 @@ static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
static int pxa2xx_ssp_init(SysBusDevice *dev)
{
- int iomemtype;
PXA2xxSSPState *s = FROM_SYSBUS(PXA2xxSSPState, dev);
sysbus_init_irq(dev, &s->irq);
- iomemtype = cpu_register_io_memory(pxa2xx_ssp_readfn,
- pxa2xx_ssp_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_ssp_ops, s, "pxa2xx-ssp", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
register_savevm(&dev->qdev, "pxa2xx_ssp", -1, 0,
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
@@ -858,6 +837,7 @@ static int pxa2xx_ssp_init(SysBusDevice *dev)
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t rttr;
uint32_t rtsr;
uint32_t rtar;
@@ -1009,7 +989,8 @@ static inline void pxa2xx_rtc_pi_tick(void *opaque)
pxa2xx_rtc_int_update(s);
}
-static uint32_t pxa2xx_rtc_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_rtc_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxRTCState *s = (PXA2xxRTCState *) opaque;
@@ -1055,9 +1036,10 @@ static uint32_t pxa2xx_rtc_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_rtc_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value64, unsigned size)
{
PXA2xxRTCState *s = (PXA2xxRTCState *) opaque;
+ uint32_t value = value64;
switch (addr) {
case RTTR:
@@ -1157,16 +1139,10 @@ static void pxa2xx_rtc_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_rtc_readfn[] = {
- pxa2xx_rtc_read,
- pxa2xx_rtc_read,
- pxa2xx_rtc_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_rtc_writefn[] = {
- pxa2xx_rtc_write,
- pxa2xx_rtc_write,
- pxa2xx_rtc_write,
+static const MemoryRegionOps pxa2xx_rtc_ops = {
+ .read = pxa2xx_rtc_read,
+ .write = pxa2xx_rtc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int pxa2xx_rtc_init(SysBusDevice *dev)
@@ -1174,7 +1150,6 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
PXA2xxRTCState *s = FROM_SYSBUS(PXA2xxRTCState, dev);
struct tm tm;
int wom;
- int iomemtype;
s->rttr = 0x7fff;
s->rtsr = 0;
@@ -1201,9 +1176,8 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rtc_irq);
- iomemtype = cpu_register_io_memory(pxa2xx_rtc_readfn,
- pxa2xx_rtc_writefn, s, DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x10000, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_rtc_ops, s, "pxa2xx-rtc", 0x10000);
+ sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@@ -1272,6 +1246,7 @@ typedef struct {
struct PXA2xxI2CState {
SysBusDevice busdev;
+ MemoryRegion iomem;
PXA2xxI2CSlaveState *slave;
i2c_bus *bus;
qemu_irq irq;
@@ -1356,7 +1331,8 @@ static int pxa2xx_i2c_tx(i2c_slave *i2c, uint8_t data)
return 1;
}
-static uint32_t pxa2xx_i2c_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_i2c_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxI2CState *s = (PXA2xxI2CState *) opaque;
@@ -1384,9 +1360,10 @@ static uint32_t pxa2xx_i2c_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_i2c_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value64, unsigned size)
{
PXA2xxI2CState *s = (PXA2xxI2CState *) opaque;
+ uint32_t value = value64;
int ack;
addr -= s->offset;
@@ -1453,16 +1430,10 @@ static void pxa2xx_i2c_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_i2c_readfn[] = {
- pxa2xx_i2c_read,
- pxa2xx_i2c_read,
- pxa2xx_i2c_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_i2c_writefn[] = {
- pxa2xx_i2c_write,
- pxa2xx_i2c_write,
- pxa2xx_i2c_write,
+static const MemoryRegionOps pxa2xx_i2c_ops = {
+ .read = pxa2xx_i2c_read,
+ .write = pxa2xx_i2c_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_pxa2xx_i2c_slave = {
@@ -1536,13 +1507,12 @@ PXA2xxI2CState *pxa2xx_i2c_init(target_phys_addr_t base,
static int pxa2xx_i2c_initfn(SysBusDevice *dev)
{
PXA2xxI2CState *s = FROM_SYSBUS(PXA2xxI2CState, dev);
- int iomemtype;
s->bus = i2c_init_bus(&dev->qdev, "i2c");
- iomemtype = cpu_register_io_memory(pxa2xx_i2c_readfn,
- pxa2xx_i2c_writefn, s, DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, s->region_size, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_i2c_ops, s,
+ "pxa2xx-i2x", s->region_size);
+ sysbus_init_mmio_region(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
return 0;
@@ -1621,7 +1591,8 @@ static inline void pxa2xx_i2s_update(PXA2xxI2SState *i2s)
#define SADIV 0x60 /* Serial Audio Clock Divider register */
#define SADR 0x80 /* Serial Audio Data register */
-static uint32_t pxa2xx_i2s_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_i2s_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxI2SState *s = (PXA2xxI2SState *) opaque;
@@ -1653,7 +1624,7 @@ static uint32_t pxa2xx_i2s_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_i2s_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
PXA2xxI2SState *s = (PXA2xxI2SState *) opaque;
uint32_t *sample;
@@ -1707,16 +1678,10 @@ static void pxa2xx_i2s_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_i2s_readfn[] = {
- pxa2xx_i2s_read,
- pxa2xx_i2s_read,
- pxa2xx_i2s_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_i2s_writefn[] = {
- pxa2xx_i2s_write,
- pxa2xx_i2s_write,
- pxa2xx_i2s_write,
+static const MemoryRegionOps pxa2xx_i2s_ops = {
+ .read = pxa2xx_i2s_read,
+ .write = pxa2xx_i2s_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_pxa2xx_i2s = {
@@ -1759,10 +1724,10 @@ static void pxa2xx_i2s_data_req(void *opaque, int tx, int rx)
pxa2xx_i2s_update(s);
}
-static PXA2xxI2SState *pxa2xx_i2s_init(target_phys_addr_t base,
+static PXA2xxI2SState *pxa2xx_i2s_init(MemoryRegion *sysmem,
+ target_phys_addr_t base,
qemu_irq irq, qemu_irq rx_dma, qemu_irq tx_dma)
{
- int iomemtype;
PXA2xxI2SState *s = (PXA2xxI2SState *)
g_malloc0(sizeof(PXA2xxI2SState));
@@ -1773,9 +1738,9 @@ static PXA2xxI2SState *pxa2xx_i2s_init(target_phys_addr_t base,
pxa2xx_i2s_reset(s);
- iomemtype = cpu_register_io_memory(pxa2xx_i2s_readfn,
- pxa2xx_i2s_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x100000, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_i2s_ops, s,
+ "pxa2xx-i2s", 0x100000);
+ memory_region_add_subregion(sysmem, base, &s->iomem);
vmstate_register(NULL, base, &vmstate_pxa2xx_i2s, s);
@@ -1784,6 +1749,7 @@ static PXA2xxI2SState *pxa2xx_i2s_init(target_phys_addr_t base,
/* PXA Fast Infra-red Communications Port */
struct PXA2xxFIrState {
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq rx_dma;
qemu_irq tx_dma;
@@ -1854,7 +1820,8 @@ static inline void pxa2xx_fir_update(PXA2xxFIrState *s)
#define ICSR1 0x18 /* FICP Status register 1 */
#define ICFOR 0x1c /* FICP FIFO Occupancy Status register */
-static uint32_t pxa2xx_fir_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pxa2xx_fir_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PXA2xxFIrState *s = (PXA2xxFIrState *) opaque;
uint8_t ret;
@@ -1892,9 +1859,10 @@ static uint32_t pxa2xx_fir_read(void *opaque, target_phys_addr_t addr)
}
static void pxa2xx_fir_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value64, unsigned size)
{
PXA2xxFIrState *s = (PXA2xxFIrState *) opaque;
+ uint32_t value = value64;
uint8_t ch;
switch (addr) {
@@ -1936,16 +1904,10 @@ static void pxa2xx_fir_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const pxa2xx_fir_readfn[] = {
- pxa2xx_fir_read,
- pxa2xx_fir_read,
- pxa2xx_fir_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_fir_writefn[] = {
- pxa2xx_fir_write,
- pxa2xx_fir_write,
- pxa2xx_fir_write,
+static const MemoryRegionOps pxa2xx_fir_ops = {
+ .read = pxa2xx_fir_read,
+ .write = pxa2xx_fir_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int pxa2xx_fir_is_empty(void *opaque)
@@ -2019,11 +1981,11 @@ static int pxa2xx_fir_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-static PXA2xxFIrState *pxa2xx_fir_init(target_phys_addr_t base,
+static PXA2xxFIrState *pxa2xx_fir_init(MemoryRegion *sysmem,
+ target_phys_addr_t base,
qemu_irq irq, qemu_irq rx_dma, qemu_irq tx_dma,
CharDriverState *chr)
{
- int iomemtype;
PXA2xxFIrState *s = (PXA2xxFIrState *)
g_malloc0(sizeof(PXA2xxFIrState));
@@ -2034,9 +1996,8 @@ static PXA2xxFIrState *pxa2xx_fir_init(target_phys_addr_t base,
pxa2xx_fir_reset(s);
- iomemtype = cpu_register_io_memory(pxa2xx_fir_readfn,
- pxa2xx_fir_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_fir_ops, s, "pxa2xx-fir", 0x1000);
+ memory_region_add_subregion(sysmem, base, &s->iomem);
if (chr)
qemu_chr_add_handlers(chr, pxa2xx_fir_is_empty,
@@ -2063,7 +2024,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
unsigned int sdram_size, const char *revision)
{
PXA2xxState *s;
- int iomemtype, i;
+ int i;
DriveInfo *dinfo;
s = (PXA2xxState *) g_malloc0(sizeof(PXA2xxState));
@@ -2082,12 +2043,11 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
/* SDRAM & Internal Memory Storage */
- cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
- sdram_size, qemu_ram_alloc(NULL, "pxa270.sdram",
- sdram_size) | IO_MEM_RAM);
- cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
- 0x40000, qemu_ram_alloc(NULL, "pxa270.internal",
- 0x40000) | IO_MEM_RAM);
+ memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size);
+ memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
+ memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000);
+ memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
+ &s->internal);
s->pic = pxa2xx_pic_init(0x40d00000, s->env);
@@ -2125,7 +2085,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
}
}
if (serial_hds[i])
- s->fir = pxa2xx_fir_init(0x40800000,
+ s->fir = pxa2xx_fir_init(address_space, 0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_ICP),
@@ -2137,9 +2097,8 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
s->clkcfg = 0x00000009; /* Turbo mode active */
- iomemtype = cpu_register_io_memory(pxa2xx_cm_readfn,
- pxa2xx_cm_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
+ memory_region_init_io(&s->cm_iomem, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
+ memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
@@ -2148,15 +2107,13 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->mm_regs[MDMRS >> 2] = 0x00020002;
s->mm_regs[MDREFR >> 2] = 0x03ca4000;
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */
- iomemtype = cpu_register_io_memory(pxa2xx_mm_readfn,
- pxa2xx_mm_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
+ memory_region_init_io(&s->mm_iomem, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
+ memory_region_add_subregion(address_space, s->mm_base, &s->mm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
s->pm_base = 0x40f00000;
- iomemtype = cpu_register_io_memory(pxa2xx_pm_readfn,
- pxa2xx_pm_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
+ memory_region_init_io(&s->pm_iomem, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
+ memory_region_add_subregion(address_space, s->pm_base, &s->pm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_pm, s);
for (i = 0; pxa27x_ssp[i].io_base; i ++);
@@ -2184,7 +2141,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->i2c[1] = pxa2xx_i2c_init(0x40f00100,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_PWRI2C), 0xff);
- s->i2s = pxa2xx_i2s_init(0x40400000,
+ s->i2s = pxa2xx_i2s_init(address_space, 0x40400000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_I2S),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_I2S),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_I2S));
@@ -2202,7 +2159,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
{
PXA2xxState *s;
- int iomemtype, i;
+ int i;
DriveInfo *dinfo;
s = (PXA2xxState *) g_malloc0(sizeof(PXA2xxState));
@@ -2215,12 +2172,12 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
/* SDRAM & Internal Memory Storage */
- cpu_register_physical_memory(PXA2XX_SDRAM_BASE, sdram_size,
- qemu_ram_alloc(NULL, "pxa255.sdram",
- sdram_size) | IO_MEM_RAM);
- cpu_register_physical_memory(PXA2XX_INTERNAL_BASE, PXA2XX_INTERNAL_SIZE,
- qemu_ram_alloc(NULL, "pxa255.internal",
- PXA2XX_INTERNAL_SIZE) | IO_MEM_RAM);
+ memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size);
+ memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
+ memory_region_init_ram(&s->internal, NULL, "pxa255.internal",
+ PXA2XX_INTERNAL_SIZE);
+ memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
+ &s->internal);
s->pic = pxa2xx_pic_init(0x40d00000, s->env);
@@ -2257,7 +2214,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
}
}
if (serial_hds[i])
- s->fir = pxa2xx_fir_init(0x40800000,
+ s->fir = pxa2xx_fir_init(address_space, 0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_ICP),
@@ -2269,9 +2226,8 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
s->clkcfg = 0x00000009; /* Turbo mode active */
- iomemtype = cpu_register_io_memory(pxa2xx_cm_readfn,
- pxa2xx_cm_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
+ memory_region_init_io(&s->cm_iomem, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
+ memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
@@ -2280,15 +2236,13 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->mm_regs[MDMRS >> 2] = 0x00020002;
s->mm_regs[MDREFR >> 2] = 0x03ca4000;
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */
- iomemtype = cpu_register_io_memory(pxa2xx_mm_readfn,
- pxa2xx_mm_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
+ memory_region_init_io(&s->mm_iomem, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
+ memory_region_add_subregion(address_space, s->mm_base, &s->mm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
s->pm_base = 0x40f00000;
- iomemtype = cpu_register_io_memory(pxa2xx_pm_readfn,
- pxa2xx_pm_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
+ memory_region_init_io(&s->pm_iomem, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
+ memory_region_add_subregion(address_space, s->pm_base, &s->pm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_pm, s);
for (i = 0; pxa255_ssp[i].io_base; i ++);
@@ -2316,7 +2270,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->i2c[1] = pxa2xx_i2c_init(0x40f00100,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_PWRI2C), 0xff);
- s->i2s = pxa2xx_i2s_init(0x40400000,
+ s->i2s = pxa2xx_i2s_init(address_space, 0x40400000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_I2S),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_I2S),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_I2S));
diff --git a/hw/r2d.c b/hw/r2d.c
index 82377a0a10..b65fd427b7 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -82,6 +82,7 @@ typedef struct {
/* output pin */
qemu_irq irl;
+ MemoryRegion iomem;
} r2d_fpga_t;
enum r2d_fpga_irq {
@@ -168,31 +169,25 @@ r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
-static CPUReadMemoryFunc * const r2d_fpga_readfn[] = {
- r2d_fpga_read,
- r2d_fpga_read,
- NULL,
+static const MemoryRegionOps r2d_fpga_ops = {
+ .old_mmio = {
+ .read = { r2d_fpga_read, r2d_fpga_read, NULL, },
+ .write = { r2d_fpga_write, r2d_fpga_write, NULL, },
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
-static CPUWriteMemoryFunc * const r2d_fpga_writefn[] = {
- r2d_fpga_write,
- r2d_fpga_write,
- NULL,
-};
-
-static qemu_irq *r2d_fpga_init(target_phys_addr_t base, qemu_irq irl)
+static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
+ target_phys_addr_t base, qemu_irq irl)
{
- int iomemtype;
r2d_fpga_t *s;
s = g_malloc0(sizeof(r2d_fpga_t));
s->irl = irl;
- iomemtype = cpu_register_io_memory(r2d_fpga_readfn,
- r2d_fpga_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x40, iomemtype);
+ memory_region_init_io(&s->iomem, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
+ memory_region_add_subregion(sysmem, base, &s->iomem);
return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
}
@@ -232,7 +227,7 @@ static void r2d_init(ram_addr_t ram_size,
CPUState *env;
ResetData *reset_info;
struct SH7750State *s;
- ram_addr_t sdram_addr;
+ MemoryRegion *sdram = g_new(MemoryRegion, 1);
qemu_irq *irq;
DriveInfo *dinfo;
int i;
@@ -252,11 +247,11 @@ static void r2d_init(ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate memory space */
- sdram_addr = qemu_ram_alloc(NULL, "r2d.sdram", SDRAM_SIZE);
- cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, sdram_addr);
+ memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE);
+ memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
/* Register peripherals */
s = sh7750_init(env);
- irq = r2d_fpga_init(0x04000000, sh7750_irl(s));
+ irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));
sysbus_create_varargs("sh_pci", 0x1e200000, irq[PCI_INTA], irq[PCI_INTB],
irq[PCI_INTC], irq[PCI_INTD], NULL);
diff --git a/hw/realview.c b/hw/realview.c
index 11ffb8a824..14281b0f06 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -18,17 +18,20 @@
#include "boards.h"
#include "bitbang_i2c.h"
#include "blockdev.h"
+#include "exec-memory.h"
#define SMP_BOOT_ADDR 0xe0000000
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
bitbang_i2c_interface *bitbang;
int out;
int in;
} RealViewI2CState;
-static uint32_t realview_i2c_read(void *opaque, target_phys_addr_t offset)
+static uint64_t realview_i2c_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
RealViewI2CState *s = (RealViewI2CState *)opaque;
@@ -41,7 +44,7 @@ static uint32_t realview_i2c_read(void *opaque, target_phys_addr_t offset)
}
static void realview_i2c_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
RealViewI2CState *s = (RealViewI2CState *)opaque;
@@ -59,30 +62,22 @@ static void realview_i2c_write(void *opaque, target_phys_addr_t offset,
s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
}
-static CPUReadMemoryFunc * const realview_i2c_readfn[] = {
- realview_i2c_read,
- realview_i2c_read,
- realview_i2c_read
-};
-
-static CPUWriteMemoryFunc * const realview_i2c_writefn[] = {
- realview_i2c_write,
- realview_i2c_write,
- realview_i2c_write
+static const MemoryRegionOps realview_i2c_ops = {
+ .read = realview_i2c_read,
+ .write = realview_i2c_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int realview_i2c_init(SysBusDevice *dev)
{
RealViewI2CState *s = FROM_SYSBUS(RealViewI2CState, dev);
i2c_bus *bus;
- int iomemtype;
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bitbang = bitbang_i2c_init(bus);
- iomemtype = cpu_register_io_memory(realview_i2c_readfn,
- realview_i2c_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &realview_i2c_ops, s,
+ "realview-i2c", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@@ -125,7 +120,11 @@ static void realview_init(ram_addr_t ram_size,
enum realview_board_type board_type)
{
CPUState *env = NULL;
- ram_addr_t ram_offset;
+ MemoryRegion *sysmem = get_system_memory();
+ MemoryRegion *ram_lo = g_new(MemoryRegion, 1);
+ MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
+ MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
+ MemoryRegion *ram_hack = g_new(MemoryRegion, 1);
DeviceState *dev, *sysctl, *gpio2;
SysBusDevice *busdev;
qemu_irq *irqp;
@@ -184,21 +183,21 @@ static void realview_init(ram_addr_t ram_size,
/* Core tile RAM. */
low_ram_size = ram_size - 0x20000000;
ram_size = 0x20000000;
- ram_offset = qemu_ram_alloc(NULL, "realview.lowmem", low_ram_size);
- cpu_register_physical_memory(0x20000000, low_ram_size,
- ram_offset | IO_MEM_RAM);
+ memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size);
+ memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
}
- ram_offset = qemu_ram_alloc(NULL, "realview.highmem", ram_size);
+ memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
low_ram_size = 0x10000000;
/* SDRAM at address zero. */
- cpu_register_physical_memory(0, low_ram_size, ram_offset | IO_MEM_RAM);
+ memory_region_init_alias(ram_alias, "realview.alias",
+ ram_hi, 0, low_ram_size);
+ memory_region_add_subregion(sysmem, 0, ram_alias);
if (is_pb) {
/* And again at a high address. */
- cpu_register_physical_memory(0x70000000, ram_size,
- ram_offset | IO_MEM_RAM);
+ memory_region_add_subregion(sysmem, 0x70000000, ram_hi);
} else {
ram_size = low_ram_size;
}
@@ -372,9 +371,8 @@ static void realview_init(ram_addr_t ram_size,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
- ram_offset = qemu_ram_alloc(NULL, "realview.hack", 0x1000);
- cpu_register_physical_memory(SMP_BOOT_ADDR, 0x1000,
- ram_offset | IO_MEM_RAM);
+ memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000);
+ memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
realview_binfo.ram_size = ram_size;
realview_binfo.kernel_filename = kernel_filename;
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 778cffe39c..60c66e92c4 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -29,6 +29,7 @@
#include "hw/virtio.h"
#include "hw/sysbus.h"
#include "kvm.h"
+#include "exec-memory.h"
#include "hw/s390-virtio-bus.h"
@@ -128,7 +129,8 @@ static void s390_init(ram_addr_t my_ram_size,
const char *cpu_model)
{
CPUState *env = NULL;
- ram_addr_t ram_addr;
+ MemoryRegion *sysmem = get_system_memory();
+ MemoryRegion *ram = g_new(MemoryRegion, 1);
ram_addr_t kernel_size = 0;
ram_addr_t initrd_offset;
ram_addr_t initrd_size = 0;
@@ -150,8 +152,8 @@ static void s390_init(ram_addr_t my_ram_size,
s390_bus = s390_virtio_bus_init(&my_ram_size);
/* allocate RAM */
- ram_addr = qemu_ram_alloc(NULL, "s390.ram", my_ram_size);
- cpu_register_physical_memory(0, my_ram_size, ram_addr);
+ memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
+ memory_region_add_subregion(sysmem, 0, ram);
/* allocate storage keys */
storage_keys = g_malloc0(my_ram_size / TARGET_PAGE_SIZE);
diff --git a/hw/sm501.c b/hw/sm501.c
index a7ed6fadf1..297bc9c318 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -459,7 +459,7 @@ typedef struct SM501State {
target_phys_addr_t base;
uint32_t local_mem_size_index;
uint8_t * local_mem;
- ram_addr_t local_mem_offset;
+ MemoryRegion local_mem_region;
uint32_t last_width;
uint32_t last_height;
@@ -726,7 +726,8 @@ static void sm501_2d_operation(SM501State * s)
}
}
-static uint32_t sm501_system_config_read(void *opaque, target_phys_addr_t addr)
+static uint64_t sm501_system_config_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SM501State * s = (SM501State *)opaque;
uint32_t ret = 0;
@@ -778,12 +779,12 @@ static uint32_t sm501_system_config_read(void *opaque, target_phys_addr_t addr)
return ret;
}
-static void sm501_system_config_write(void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void sm501_system_config_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SM501State * s = (SM501State *)opaque;
SM501_DPRINTF("sm501 system config regs : write addr=%x, val=%x\n",
- addr, value);
+ (uint32_t)addr, (uint32_t)value);
switch(addr) {
case SM501_SYSTEM_CONTROL:
@@ -821,21 +822,19 @@ static void sm501_system_config_write(void *opaque,
default:
printf("sm501 system config : not implemented register write."
- " addr=%x, val=%x\n", (int)addr, value);
+ " addr=%x, val=%x\n", (int)addr, (uint32_t)value);
abort();
}
}
-static CPUReadMemoryFunc * const sm501_system_config_readfn[] = {
- NULL,
- NULL,
- &sm501_system_config_read,
-};
-
-static CPUWriteMemoryFunc * const sm501_system_config_writefn[] = {
- NULL,
- NULL,
- &sm501_system_config_write,
+static const MemoryRegionOps sm501_system_config_ops = {
+ .read = sm501_system_config_read,
+ .write = sm501_system_config_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static uint32_t sm501_palette_read(void *opaque, target_phys_addr_t addr)
@@ -864,7 +863,8 @@ static void sm501_palette_write(void *opaque,
*(uint32_t*)&s->dc_palette[addr] = value;
}
-static uint32_t sm501_disp_ctrl_read(void *opaque, target_phys_addr_t addr)
+static uint64_t sm501_disp_ctrl_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SM501State * s = (SM501State *)opaque;
uint32_t ret = 0;
@@ -958,13 +958,12 @@ static uint32_t sm501_disp_ctrl_read(void *opaque, target_phys_addr_t addr)
return ret;
}
-static void sm501_disp_ctrl_write(void *opaque,
- target_phys_addr_t addr,
- uint32_t value)
+static void sm501_disp_ctrl_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SM501State * s = (SM501State *)opaque;
SM501_DPRINTF("sm501 disp ctrl regs : write addr=%x, val=%x\n",
- addr, value);
+ (unsigned)addr, (unsigned)value);
switch(addr) {
case SM501_DC_PANEL_CONTROL:
@@ -1059,24 +1058,23 @@ static void sm501_disp_ctrl_write(void *opaque,
default:
printf("sm501 disp ctrl : not implemented register write."
- " addr=%x, val=%x\n", (int)addr, value);
+ " addr=%x, val=%x\n", (int)addr, (unsigned)value);
abort();
}
}
-static CPUReadMemoryFunc * const sm501_disp_ctrl_readfn[] = {
- NULL,
- NULL,
- &sm501_disp_ctrl_read,
-};
-
-static CPUWriteMemoryFunc * const sm501_disp_ctrl_writefn[] = {
- NULL,
- NULL,
- &sm501_disp_ctrl_write,
+static const MemoryRegionOps sm501_disp_ctrl_ops = {
+ .read = sm501_disp_ctrl_read,
+ .write = sm501_disp_ctrl_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
-static uint32_t sm501_2d_engine_read(void *opaque, target_phys_addr_t addr)
+static uint64_t sm501_2d_engine_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SM501State * s = (SM501State *)opaque;
uint32_t ret = 0;
@@ -1095,12 +1093,12 @@ static uint32_t sm501_2d_engine_read(void *opaque, target_phys_addr_t addr)
return ret;
}
-static void sm501_2d_engine_write(void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void sm501_2d_engine_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SM501State * s = (SM501State *)opaque;
SM501_DPRINTF("sm501 2d engine regs : write addr=%x, val=%x\n",
- addr, value);
+ (unsigned)addr, (unsigned)value);
switch(addr) {
case SM501_2D_SOURCE:
@@ -1148,21 +1146,19 @@ static void sm501_2d_engine_write(void *opaque,
break;
default:
printf("sm501 2d engine : not implemented register write."
- " addr=%x, val=%x\n", (int)addr, value);
+ " addr=%x, val=%x\n", (int)addr, (unsigned)value);
abort();
}
}
-static CPUReadMemoryFunc * const sm501_2d_engine_readfn[] = {
- NULL,
- NULL,
- &sm501_2d_engine_read,
-};
-
-static CPUWriteMemoryFunc * const sm501_2d_engine_writefn[] = {
- NULL,
- NULL,
- &sm501_2d_engine_write,
+static const MemoryRegionOps sm501_2d_engine_ops = {
+ .read = sm501_2d_engine_read,
+ .write = sm501_2d_engine_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
/* draw line functions for all console modes */
@@ -1276,7 +1272,7 @@ static void sm501_draw_crt(SM501State * s)
int y_start = -1;
ram_addr_t page_min = ~0l;
ram_addr_t page_max = 0l;
- ram_addr_t offset = s->local_mem_offset;
+ ram_addr_t offset = 0;
/* choose draw_line function */
switch (s->dc_crt_control & 3) {
@@ -1333,7 +1329,8 @@ static void sm501_draw_crt(SM501State * s)
/* check dirty flags for each line */
for (page = page0; page <= page1; page += TARGET_PAGE_SIZE)
- if (cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG))
+ if (memory_region_get_dirty(&s->local_mem_region, page,
+ DIRTY_MEMORY_VGA))
update = 1;
/* draw line and change status */
@@ -1372,8 +1369,9 @@ static void sm501_draw_crt(SM501State * s)
/* clear dirty flags */
if (page_min != ~0l) {
- cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE,
- VGA_DIRTY_FLAG);
+ memory_region_reset_dirty(&s->local_mem_region,
+ page_min, page_max + TARGET_PAGE_SIZE,
+ DIRTY_MEMORY_VGA);
}
}
@@ -1390,9 +1388,9 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
{
SM501State * s;
DeviceState *dev;
- int sm501_system_config_index;
- int sm501_disp_ctrl_index;
- int sm501_2d_engine_index;
+ MemoryRegion *sm501_system_config = g_new(MemoryRegion, 1);
+ MemoryRegion *sm501_disp_ctrl = g_new(MemoryRegion, 1);
+ MemoryRegion *sm501_2d_engine = g_new(MemoryRegion, 1);
/* allocate management data region */
s = (SM501State *)g_malloc0(sizeof(SM501State));
@@ -1407,27 +1405,26 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
s->dc_crt_control = 0x00010000;
/* allocate local memory */
- s->local_mem_offset = qemu_ram_alloc(NULL, "sm501.local", local_mem_bytes);
- s->local_mem = qemu_get_ram_ptr(s->local_mem_offset);
- cpu_register_physical_memory(base, local_mem_bytes, s->local_mem_offset);
+ memory_region_init_ram(&s->local_mem_region, NULL, "sm501.local",
+ local_mem_bytes);
+ s->local_mem = memory_region_get_ram_ptr(&s->local_mem_region);
+ memory_region_add_subregion(address_space_mem, base, &s->local_mem_region);
/* map mmio */
- sm501_system_config_index
- = cpu_register_io_memory(sm501_system_config_readfn,
- sm501_system_config_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base + MMIO_BASE_OFFSET,
- 0x6c, sm501_system_config_index);
- sm501_disp_ctrl_index = cpu_register_io_memory(sm501_disp_ctrl_readfn,
- sm501_disp_ctrl_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base + MMIO_BASE_OFFSET + SM501_DC,
- 0x1000, sm501_disp_ctrl_index);
- sm501_2d_engine_index = cpu_register_io_memory(sm501_2d_engine_readfn,
- sm501_2d_engine_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base + MMIO_BASE_OFFSET + SM501_2D_ENGINE,
- 0x54, sm501_2d_engine_index);
+ memory_region_init_io(sm501_system_config, &sm501_system_config_ops, s,
+ "sm501-system-config", 0x6c);
+ memory_region_add_subregion(address_space_mem, base + MMIO_BASE_OFFSET,
+ sm501_system_config);
+ memory_region_init_io(sm501_disp_ctrl, &sm501_disp_ctrl_ops, s,
+ "sm501-disp-ctrl", 0x1000);
+ memory_region_add_subregion(address_space_mem,
+ base + MMIO_BASE_OFFSET + SM501_DC,
+ sm501_disp_ctrl);
+ memory_region_init_io(sm501_2d_engine, &sm501_2d_engine_ops, s,
+ "sm501-2d-engine", 0x54);
+ memory_region_add_subregion(address_space_mem,
+ base + MMIO_BASE_OFFSET + SM501_2D_ENGINE,
+ sm501_2d_engine);
/* bridge to usb host emulation module */
dev = qdev_create(NULL, "sysbus-ohci");
diff --git a/hw/spapr.c b/hw/spapr.c
index b1189755d3..63e5d336ea 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -41,6 +41,8 @@
#include "kvm.h"
#include "kvm_ppc.h"
+#include "exec-memory.h"
+
#include <libfdt.h>
#define KERNEL_LOAD_ADDR 0x00000000
@@ -324,7 +326,8 @@ static void ppc_spapr_init(ram_addr_t ram_size,
{
CPUState *env;
int i;
- ram_addr_t ram_offset;
+ MemoryRegion *sysmem = get_system_memory();
+ MemoryRegion *ram = g_new(MemoryRegion, 1);
uint32_t initrd_base;
long kernel_size, initrd_size, fw_size;
long pteg_shift = 17;
@@ -361,8 +364,8 @@ static void ppc_spapr_init(ram_addr_t ram_size,
/* allocate RAM */
spapr->ram_limit = ram_size;
- ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", spapr->ram_limit);
- cpu_register_physical_memory(0, ram_size, ram_offset);
+ memory_region_init_ram(ram, NULL, "ppc_spapr.ram", spapr->ram_limit);
+ memory_region_add_subregion(sysmem, 0, ram);
/* allocate hash page table. For now we always make this 16mb,
* later we should probably make it scale to the size of guest
diff --git a/hw/spitz.c b/hw/spitz.c
index 6f8a94ceb3..23f9d41ff7 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -49,6 +49,7 @@
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
DeviceState *nand;
uint8_t ctl;
uint8_t manf_id;
@@ -56,7 +57,7 @@ typedef struct {
ECCState ecc;
} SLNANDState;
-static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
+static uint64_t sl_read(void *opaque, target_phys_addr_t addr, unsigned size)
{
SLNANDState *s = (SLNANDState *) opaque;
int ryby;
@@ -86,6 +87,10 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
return s->ctl;
case FLASH_FLASHIO:
+ if (size == 4) {
+ return ecc_digest(&s->ecc, nand_getio(s->nand)) |
+ (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
+ }
return ecc_digest(&s->ecc, nand_getio(s->nand));
default:
@@ -94,19 +99,8 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
return 0;
}
-static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
-{
- SLNANDState *s = (SLNANDState *) opaque;
-
- if (addr == FLASH_FLASHIO)
- return ecc_digest(&s->ecc, nand_getio(s->nand)) |
- (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
-
- return sl_readb(opaque, addr);
-}
-
-static void sl_writeb(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static void sl_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SLNANDState *s = (SLNANDState *) opaque;
@@ -140,15 +134,10 @@ enum {
FLASH_1024M,
};
-static CPUReadMemoryFunc * const sl_readfn[] = {
- sl_readb,
- sl_readb,
- sl_readl,
-};
-static CPUWriteMemoryFunc * const sl_writefn[] = {
- sl_writeb,
- sl_writeb,
- sl_writeb,
+static const MemoryRegionOps sl_ops = {
+ .read = sl_read,
+ .write = sl_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void sl_flash_register(PXA2xxState *cpu, int size)
@@ -168,7 +157,6 @@ static void sl_flash_register(PXA2xxState *cpu, int size)
}
static int sl_nand_init(SysBusDevice *dev) {
- int iomemtype;
SLNANDState *s;
DriveInfo *nand;
@@ -178,10 +166,8 @@ static int sl_nand_init(SysBusDevice *dev) {
nand = drive_get(IF_MTD, 0, 0);
s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
- iomemtype = cpu_register_io_memory(sl_readfn,
- sl_writefn, s, DEVICE_NATIVE_ENDIAN);
-
- sysbus_init_mmio(dev, 0x40, iomemtype);
+ memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
+ sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@@ -898,6 +884,7 @@ static void spitz_common_init(ram_addr_t ram_size,
PXA2xxState *cpu;
DeviceState *scp0, *scp1 = NULL;
MemoryRegion *address_space_mem = get_system_memory();
+ MemoryRegion *rom = g_new(MemoryRegion, 1);
if (!cpu_model)
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
@@ -907,8 +894,9 @@ static void spitz_common_init(ram_addr_t ram_size,
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
- cpu_register_physical_memory(0, SPITZ_ROM,
- qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
+ memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
+ memory_region_set_readonly(rom, true);
+ memory_region_add_subregion(address_space_mem, 0, rom);
/* Setup peripherals */
spitz_keyboard_register(cpu);
diff --git a/hw/strongarm.c b/hw/strongarm.c
index 6097ea2c18..a3d908051f 100644
--- a/hw/strongarm.c
+++ b/hw/strongarm.c
@@ -68,6 +68,7 @@ static struct {
/* Interrupt Controller */
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq fiq;
@@ -109,7 +110,8 @@ static void strongarm_pic_set_irq(void *opaque, int irq, int level)
strongarm_pic_update(s);
}
-static uint32_t strongarm_pic_mem_read(void *opaque, target_phys_addr_t offset)
+static uint64_t strongarm_pic_mem_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
StrongARMPICState *s = opaque;
@@ -134,7 +136,7 @@ static uint32_t strongarm_pic_mem_read(void *opaque, target_phys_addr_t offset)
}
static void strongarm_pic_mem_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
StrongARMPICState *s = opaque;
@@ -156,27 +158,19 @@ static void strongarm_pic_mem_write(void *opaque, target_phys_addr_t offset,
strongarm_pic_update(s);
}
-static CPUReadMemoryFunc * const strongarm_pic_readfn[] = {
- strongarm_pic_mem_read,
- strongarm_pic_mem_read,
- strongarm_pic_mem_read,
-};
-
-static CPUWriteMemoryFunc * const strongarm_pic_writefn[] = {
- strongarm_pic_mem_write,
- strongarm_pic_mem_write,
- strongarm_pic_mem_write,
+static const MemoryRegionOps strongarm_pic_ops = {
+ .read = strongarm_pic_mem_read,
+ .write = strongarm_pic_mem_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int strongarm_pic_initfn(SysBusDevice *dev)
{
StrongARMPICState *s = FROM_SYSBUS(StrongARMPICState, dev);
- int iomemtype;
qdev_init_gpio_in(&dev->qdev, strongarm_pic_set_irq, SA_PIC_SRCS);
- iomemtype = cpu_register_io_memory(strongarm_pic_readfn,
- strongarm_pic_writefn, s, DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &strongarm_pic_ops, s, "pic", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->fiq);
@@ -229,6 +223,7 @@ static SysBusDeviceInfo strongarm_pic_info = {
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t rttr;
uint32_t rtsr;
uint32_t rtar;
@@ -287,7 +282,8 @@ static inline void strongarm_rtc_hz_tick(void *opaque)
strongarm_rtc_int_update(s);
}
-static uint32_t strongarm_rtc_read(void *opaque, target_phys_addr_t addr)
+static uint64_t strongarm_rtc_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
StrongARMRTCState *s = opaque;
@@ -309,7 +305,7 @@ static uint32_t strongarm_rtc_read(void *opaque, target_phys_addr_t addr)
}
static void strongarm_rtc_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
StrongARMRTCState *s = opaque;
uint32_t old_rtsr;
@@ -349,23 +345,16 @@ static void strongarm_rtc_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const strongarm_rtc_readfn[] = {
- strongarm_rtc_read,
- strongarm_rtc_read,
- strongarm_rtc_read,
-};
-
-static CPUWriteMemoryFunc * const strongarm_rtc_writefn[] = {
- strongarm_rtc_write,
- strongarm_rtc_write,
- strongarm_rtc_write,
+static const MemoryRegionOps strongarm_rtc_ops = {
+ .read = strongarm_rtc_read,
+ .write = strongarm_rtc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int strongarm_rtc_init(SysBusDevice *dev)
{
StrongARMRTCState *s = FROM_SYSBUS(StrongARMRTCState, dev);
struct tm tm;
- int iomemtype;
s->rttr = 0x0;
s->rtsr = 0;
@@ -381,9 +370,8 @@ static int strongarm_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rtc_irq);
sysbus_init_irq(dev, &s->rtc_hz_irq);
- iomemtype = cpu_register_io_memory(strongarm_rtc_readfn,
- strongarm_rtc_writefn, s, DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x10000, iomemtype);
+ memory_region_init_io(&s->iomem, &strongarm_rtc_ops, s, "rtc", 0x10000);
+ sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@@ -443,6 +431,7 @@ static SysBusDeviceInfo strongarm_rtc_sysbus_info = {
typedef struct StrongARMGPIOInfo StrongARMGPIOInfo;
struct StrongARMGPIOInfo {
SysBusDevice busdev;
+ MemoryRegion iomem;
qemu_irq handler[28];
qemu_irq irqs[11];
qemu_irq irqX;
@@ -507,7 +496,8 @@ static void strongarm_gpio_handler_update(StrongARMGPIOInfo *s)
s->prev_level = level;
}
-static uint32_t strongarm_gpio_read(void *opaque, target_phys_addr_t offset)
+static uint64_t strongarm_gpio_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
StrongARMGPIOInfo *s = opaque;
@@ -548,8 +538,8 @@ static uint32_t strongarm_gpio_read(void *opaque, target_phys_addr_t offset)
return 0;
}
-static void strongarm_gpio_write(void *opaque,
- target_phys_addr_t offset, uint32_t value)
+static void strongarm_gpio_write(void *opaque, target_phys_addr_t offset,
+ uint64_t value, unsigned size)
{
StrongARMGPIOInfo *s = opaque;
@@ -592,16 +582,10 @@ static void strongarm_gpio_write(void *opaque,
}
}
-static CPUReadMemoryFunc * const strongarm_gpio_readfn[] = {
- strongarm_gpio_read,
- strongarm_gpio_read,
- strongarm_gpio_read
-};
-
-static CPUWriteMemoryFunc * const strongarm_gpio_writefn[] = {
- strongarm_gpio_write,
- strongarm_gpio_write,
- strongarm_gpio_write
+static const MemoryRegionOps strongarm_gpio_ops = {
+ .read = strongarm_gpio_read,
+ .write = strongarm_gpio_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static DeviceState *strongarm_gpio_init(target_phys_addr_t base,
@@ -623,7 +607,6 @@ static DeviceState *strongarm_gpio_init(target_phys_addr_t base,
static int strongarm_gpio_initfn(SysBusDevice *dev)
{
- int iomemtype;
StrongARMGPIOInfo *s;
int i;
@@ -632,10 +615,9 @@ static int strongarm_gpio_initfn(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, strongarm_gpio_set, 28);
qdev_init_gpio_out(&dev->qdev, s->handler, 28);
- iomemtype = cpu_register_io_memory(strongarm_gpio_readfn,
- strongarm_gpio_writefn, s, DEVICE_NATIVE_ENDIAN);
+ memory_region_init_io(&s->iomem, &strongarm_gpio_ops, s, "gpio", 0x1000);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ sysbus_init_mmio_region(dev, &s->iomem);
for (i = 0; i < 11; i++) {
sysbus_init_irq(dev, &s->irqs[i]);
}
@@ -678,6 +660,7 @@ static SysBusDeviceInfo strongarm_gpio_info = {
typedef struct StrongARMPPCInfo StrongARMPPCInfo;
struct StrongARMPPCInfo {
SysBusDevice busdev;
+ MemoryRegion iomem;
qemu_irq handler[28];
uint32_t ilevel;
@@ -716,7 +699,8 @@ static void strongarm_ppc_handler_update(StrongARMPPCInfo *s)
s->prev_level = level;
}
-static uint32_t strongarm_ppc_read(void *opaque, target_phys_addr_t offset)
+static uint64_t strongarm_ppc_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
StrongARMPPCInfo *s = opaque;
@@ -745,8 +729,8 @@ static uint32_t strongarm_ppc_read(void *opaque, target_phys_addr_t offset)
return 0;
}
-static void strongarm_ppc_write(void *opaque,
- target_phys_addr_t offset, uint32_t value)
+static void strongarm_ppc_write(void *opaque, target_phys_addr_t offset,
+ uint64_t value, unsigned size)
{
StrongARMPPCInfo *s = opaque;
@@ -778,21 +762,14 @@ static void strongarm_ppc_write(void *opaque,
}
}
-static CPUReadMemoryFunc * const strongarm_ppc_readfn[] = {
- strongarm_ppc_read,
- strongarm_ppc_read,
- strongarm_ppc_read
-};
-
-static CPUWriteMemoryFunc * const strongarm_ppc_writefn[] = {
- strongarm_ppc_write,
- strongarm_ppc_write,
- strongarm_ppc_write
+static const MemoryRegionOps strongarm_ppc_ops = {
+ .read = strongarm_ppc_read,
+ .write = strongarm_ppc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int strongarm_ppc_init(SysBusDevice *dev)
{
- int iomemtype;
StrongARMPPCInfo *s;
s = FROM_SYSBUS(StrongARMPPCInfo, dev);
@@ -800,10 +777,9 @@ static int strongarm_ppc_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, strongarm_ppc_set, 22);
qdev_init_gpio_out(&dev->qdev, s->handler, 22);
- iomemtype = cpu_register_io_memory(strongarm_ppc_readfn,
- strongarm_ppc_writefn, s, DEVICE_NATIVE_ENDIAN);
+ memory_region_init_io(&s->iomem, &strongarm_ppc_ops, s, "ppc", 0x1000);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@@ -871,6 +847,7 @@ static SysBusDeviceInfo strongarm_ppc_info = {
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
CharDriverState *chr;
qemu_irq irq;
@@ -1079,7 +1056,8 @@ static void strongarm_uart_tx(void *opaque)
strongarm_uart_update_int_status(s);
}
-static uint32_t strongarm_uart_read(void *opaque, target_phys_addr_t addr)
+static uint64_t strongarm_uart_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
StrongARMUARTState *s = opaque;
uint16_t ret;
@@ -1121,7 +1099,7 @@ static uint32_t strongarm_uart_read(void *opaque, target_phys_addr_t addr)
}
static void strongarm_uart_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
StrongARMUARTState *s = opaque;
@@ -1176,26 +1154,18 @@ static void strongarm_uart_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const strongarm_uart_readfn[] = {
- strongarm_uart_read,
- strongarm_uart_read,
- strongarm_uart_read,
-};
-
-static CPUWriteMemoryFunc * const strongarm_uart_writefn[] = {
- strongarm_uart_write,
- strongarm_uart_write,
- strongarm_uart_write,
+static const MemoryRegionOps strongarm_uart_ops = {
+ .read = strongarm_uart_read,
+ .write = strongarm_uart_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int strongarm_uart_init(SysBusDevice *dev)
{
StrongARMUARTState *s = FROM_SYSBUS(StrongARMUARTState, dev);
- int iomemtype;
- iomemtype = cpu_register_io_memory(strongarm_uart_readfn,
- strongarm_uart_writefn, s, DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x10000, iomemtype);
+ memory_region_init_io(&s->iomem, &strongarm_uart_ops, s, "uart", 0x10000);
+ sysbus_init_mmio_region(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->rx_timeout_timer = qemu_new_timer_ns(vm_clock, strongarm_uart_rx_to, s);
@@ -1288,6 +1258,7 @@ static SysBusDeviceInfo strongarm_uart_info = {
/* Synchronous Serial Ports */
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
qemu_irq irq;
SSIBus *bus;
@@ -1355,7 +1326,8 @@ static void strongarm_ssp_fifo_update(StrongARMSSPState *s)
strongarm_ssp_int_update(s);
}
-static uint32_t strongarm_ssp_read(void *opaque, target_phys_addr_t addr)
+static uint64_t strongarm_ssp_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
StrongARMSSPState *s = opaque;
uint32_t retval;
@@ -1388,7 +1360,7 @@ static uint32_t strongarm_ssp_read(void *opaque, target_phys_addr_t addr)
}
static void strongarm_ssp_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
StrongARMSSPState *s = opaque;
@@ -1397,7 +1369,7 @@ static void strongarm_ssp_write(void *opaque, target_phys_addr_t addr,
s->sscr[0] = value & 0xffbf;
if ((s->sscr[0] & SSCR0_SSE) && SSCR0_DSS(value) < 4) {
printf("%s: Wrong data size: %i bits\n", __func__,
- SSCR0_DSS(value));
+ (int)SSCR0_DSS(value));
}
if (!(value & SSCR0_SSE)) {
s->sssr = 0;
@@ -1452,16 +1424,10 @@ static void strongarm_ssp_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const strongarm_ssp_readfn[] = {
- strongarm_ssp_read,
- strongarm_ssp_read,
- strongarm_ssp_read,
-};
-
-static CPUWriteMemoryFunc * const strongarm_ssp_writefn[] = {
- strongarm_ssp_write,
- strongarm_ssp_write,
- strongarm_ssp_write,
+static const MemoryRegionOps strongarm_ssp_ops = {
+ .read = strongarm_ssp_read,
+ .write = strongarm_ssp_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int strongarm_ssp_post_load(void *opaque, int version_id)
@@ -1475,15 +1441,12 @@ static int strongarm_ssp_post_load(void *opaque, int version_id)
static int strongarm_ssp_init(SysBusDevice *dev)
{
- int iomemtype;
StrongARMSSPState *s = FROM_SYSBUS(StrongARMSSPState, dev);
sysbus_init_irq(dev, &s->irq);
- iomemtype = cpu_register_io_memory(strongarm_ssp_readfn,
- strongarm_ssp_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &strongarm_ssp_ops, s, "ssp", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
s->bus = ssi_create_bus(&dev->qdev, "ssi");
return 0;
@@ -1523,7 +1486,8 @@ static SysBusDeviceInfo strongarm_ssp_info = {
};
/* Main CPU functions */
-StrongARMState *sa1110_init(unsigned int sdram_size, const char *rev)
+StrongARMState *sa1110_init(MemoryRegion *sysmem,
+ unsigned int sdram_size, const char *rev)
{
StrongARMState *s;
qemu_irq *pic;
@@ -1547,9 +1511,8 @@ StrongARMState *sa1110_init(unsigned int sdram_size, const char *rev)
exit(1);
}
- cpu_register_physical_memory(SA_SDCS0,
- sdram_size, qemu_ram_alloc(NULL, "strongarm.sdram",
- sdram_size) | IO_MEM_RAM);
+ memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size);
+ memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
pic = arm_pic_init_cpu(s->env);
s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
diff --git a/hw/strongarm.h b/hw/strongarm.h
index a81b110e23..684f61bee3 100644
--- a/hw/strongarm.h
+++ b/hw/strongarm.h
@@ -1,6 +1,8 @@
#ifndef _STRONGARM_H
#define _STRONGARM_H
+#include "memory.h"
+
#define SA_CS0 0x00000000
#define SA_CS1 0x08000000
#define SA_CS2 0x10000000
@@ -52,6 +54,7 @@ enum {
typedef struct {
CPUState *env;
+ MemoryRegion sdram;
DeviceState *pic;
DeviceState *gpio;
DeviceState *ppc;
@@ -59,6 +62,7 @@ typedef struct {
SSIBus *ssp_bus;
} StrongARMState;
-StrongARMState *sa1110_init(unsigned int sdram_size, const char *rev);
+StrongARMState *sa1110_init(MemoryRegion *sysmem,
+ unsigned int sdram_size, const char *rev);
#endif
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 71bf648e69..314edc4d87 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -593,19 +593,25 @@ static void idreg_init(target_phys_addr_t addr)
cpu_physical_memory_write_rom(addr, idreg_data, sizeof(idreg_data));
}
+typedef struct IDRegState {
+ SysBusDevice busdev;
+ MemoryRegion mem;
+} IDRegState;
+
static int idreg_init1(SysBusDevice *dev)
{
- ram_addr_t idreg_offset;
+ IDRegState *s = FROM_SYSBUS(IDRegState, dev);
- idreg_offset = qemu_ram_alloc(NULL, "sun4m.idreg", sizeof(idreg_data));
- sysbus_init_mmio(dev, sizeof(idreg_data), idreg_offset | IO_MEM_ROM);
+ memory_region_init_ram(&s->mem, NULL, "sun4m.idreg", sizeof(idreg_data));
+ memory_region_set_readonly(&s->mem, true);
+ sysbus_init_mmio_region(dev, &s->mem);
return 0;
}
static SysBusDeviceInfo idreg_info = {
.init = idreg_init1,
.qdev.name = "macio_idreg",
- .qdev.size = sizeof(SysBusDevice),
+ .qdev.size = sizeof(IDRegState),
};
static void idreg_register_devices(void)
@@ -615,6 +621,11 @@ static void idreg_register_devices(void)
device_init(idreg_register_devices);
+typedef struct AFXState {
+ SysBusDevice busdev;
+ MemoryRegion mem;
+} AFXState;
+
/* SS-5 TCX AFX register */
static void afx_init(target_phys_addr_t addr)
{
@@ -630,17 +641,17 @@ static void afx_init(target_phys_addr_t addr)
static int afx_init1(SysBusDevice *dev)
{
- ram_addr_t afx_offset;
+ AFXState *s = FROM_SYSBUS(AFXState, dev);
- afx_offset = qemu_ram_alloc(NULL, "sun4m.afx", 4);
- sysbus_init_mmio(dev, 4, afx_offset | IO_MEM_RAM);
+ memory_region_init_ram(&s->mem, NULL, "sun4m.afx", 4);
+ sysbus_init_mmio_region(dev, &s->mem);
return 0;
}
static SysBusDeviceInfo afx_info = {
.init = afx_init1,
.qdev.name = "tcx_afx",
- .qdev.size = sizeof(SysBusDevice),
+ .qdev.size = sizeof(AFXState),
};
static void afx_register_devices(void)
@@ -650,6 +661,11 @@ static void afx_register_devices(void)
device_init(afx_register_devices);
+typedef struct PROMState {
+ SysBusDevice busdev;
+ MemoryRegion prom;
+} PROMState;
+
/* Boot PROM (OpenBIOS) */
static uint64_t translate_prom_address(void *opaque, uint64_t addr)
{
@@ -693,17 +709,18 @@ static void prom_init(target_phys_addr_t addr, const char *bios_name)
static int prom_init1(SysBusDevice *dev)
{
- ram_addr_t prom_offset;
+ PROMState *s = FROM_SYSBUS(PROMState, dev);
- prom_offset = qemu_ram_alloc(NULL, "sun4m.prom", PROM_SIZE_MAX);
- sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
+ memory_region_init_ram(&s->prom, NULL, "sun4m.prom", PROM_SIZE_MAX);
+ memory_region_set_readonly(&s->prom, true);
+ sysbus_init_mmio_region(dev, &s->prom);
return 0;
}
static SysBusDeviceInfo prom_info = {
.init = prom_init1,
.qdev.name = "openprom",
- .qdev.size = sizeof(SysBusDevice),
+ .qdev.size = sizeof(PROMState),
.qdev.props = (Property[]) {
{/* end of property list */}
}
@@ -719,19 +736,17 @@ device_init(prom_register_devices);
typedef struct RamDevice
{
SysBusDevice busdev;
+ MemoryRegion ram;
uint64_t size;
} RamDevice;
/* System RAM */
static int ram_init1(SysBusDevice *dev)
{
- ram_addr_t RAM_size, ram_offset;
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
- RAM_size = d->size;
-
- ram_offset = qemu_ram_alloc(NULL, "sun4m.ram", RAM_size);
- sysbus_init_mmio(dev, RAM_size, ram_offset);
+ memory_region_init_ram(&d->ram, NULL, "sun4m.ram", d->size);
+ sysbus_init_mmio_region(dev, &d->ram);
return 0;
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 96fc3d0488..eaaefe3c94 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -574,6 +574,11 @@ static void pci_ebus_register(void)
device_init(pci_ebus_register);
+typedef struct PROMState {
+ SysBusDevice busdev;
+ MemoryRegion prom;
+} PROMState;
+
static uint64_t translate_prom_address(void *opaque, uint64_t addr)
{
target_phys_addr_t *base_addr = (target_phys_addr_t *)opaque;
@@ -617,17 +622,18 @@ static void prom_init(target_phys_addr_t addr, const char *bios_name)
static int prom_init1(SysBusDevice *dev)
{
- ram_addr_t prom_offset;
+ PROMState *s = FROM_SYSBUS(PROMState, dev);
- prom_offset = qemu_ram_alloc(NULL, "sun4u.prom", PROM_SIZE_MAX);
- sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
+ memory_region_init_ram(&s->prom, NULL, "sun4u.prom", PROM_SIZE_MAX);
+ memory_region_set_readonly(&s->prom, true);
+ sysbus_init_mmio_region(dev, &s->prom);
return 0;
}
static SysBusDeviceInfo prom_info = {
.init = prom_init1,
.qdev.name = "openprom",
- .qdev.size = sizeof(SysBusDevice),
+ .qdev.size = sizeof(PROMState),
.qdev.props = (Property[]) {
{/* end of property list */}
}
@@ -644,19 +650,17 @@ device_init(prom_register_devices);
typedef struct RamDevice
{
SysBusDevice busdev;
+ MemoryRegion ram;
uint64_t size;
} RamDevice;
/* System RAM */
static int ram_init1(SysBusDevice *dev)
{
- ram_addr_t RAM_size, ram_offset;
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
- RAM_size = d->size;
-
- ram_offset = qemu_ram_alloc(NULL, "sun4u.ram", RAM_size);
- sysbus_init_mmio(dev, RAM_size, ram_offset);
+ memory_region_init_ram(&d->ram, NULL, "sun4u.ram", d->size);
+ sysbus_init_mmio_region(dev, &d->ram);
return 0;
}
diff --git a/hw/syborg.c b/hw/syborg.c
index bc200e48aa..248de54c4e 100644
--- a/hw/syborg.c
+++ b/hw/syborg.c
@@ -26,6 +26,7 @@
#include "boards.h"
#include "arm-misc.h"
#include "net.h"
+#include "exec-memory.h"
static struct arm_boot_info syborg_binfo;
@@ -35,9 +36,10 @@ static void syborg_init(ram_addr_t ram_size,
const char *initrd_filename, const char *cpu_model)
{
CPUState *env;
+ MemoryRegion *sysmem = get_system_memory();
+ MemoryRegion *ram = g_new(MemoryRegion, 1);
qemu_irq *cpu_pic;
qemu_irq pic[64];
- ram_addr_t ram_addr;
DeviceState *dev;
int i;
@@ -50,8 +52,8 @@ static void syborg_init(ram_addr_t ram_size,
}
/* RAM at address zero. */
- ram_addr = qemu_ram_alloc(NULL, "syborg.ram", ram_size);
- cpu_register_physical_memory(0, ram_size, ram_addr | IO_MEM_RAM);
+ memory_region_init_ram(ram, NULL, "syborg.ram", ram_size);
+ memory_region_add_subregion(sysmem, 0, ram);
cpu_pic = arm_pic_init_cpu(env);
dev = sysbus_create_simple("syborg,interrupt", 0xC0000000,
diff --git a/hw/tc6393xb.c b/hw/tc6393xb.c
index c28005a86b..c144dcf5ff 100644
--- a/hw/tc6393xb.c
+++ b/hw/tc6393xb.c
@@ -79,6 +79,7 @@
#define NAND_MODE_ECC_RST 0x60
struct TC6393xbState {
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq *sub_irqs;
struct {
@@ -122,7 +123,7 @@ struct TC6393xbState {
ECCState ecc;
DisplayState *ds;
- ram_addr_t vram_addr;
+ MemoryRegion vram;
uint16_t *vram_ptr;
uint32_t scr_width, scr_height; /* in pixels */
qemu_irq l3v;
@@ -495,7 +496,9 @@ static void tc6393xb_update_display(void *opaque)
}
-static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
+static uint64_t tc6393xb_readb(void *opaque, target_phys_addr_t addr,
+ unsigned size)
+{
TC6393xbState *s = opaque;
switch (addr >> 8) {
@@ -516,7 +519,8 @@ static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
return 0;
}
-static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) {
+static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size) {
TC6393xbState *s = opaque;
switch (addr >> 8) {
@@ -532,51 +536,21 @@ static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr, uint32_t valu
tc6393xb_nand_writeb(s, addr & 0xff, value);
else
fprintf(stderr, "tc6393xb: unhandled write at %08x: %02x\n",
- (uint32_t) addr, value & 0xff);
-}
-
-static uint32_t tc6393xb_readw(void *opaque, target_phys_addr_t addr)
-{
- return (tc6393xb_readb(opaque, addr) & 0xff) |
- (tc6393xb_readb(opaque, addr + 1) << 8);
-}
-
-static uint32_t tc6393xb_readl(void *opaque, target_phys_addr_t addr)
-{
- return (tc6393xb_readb(opaque, addr) & 0xff) |
- ((tc6393xb_readb(opaque, addr + 1) & 0xff) << 8) |
- ((tc6393xb_readb(opaque, addr + 2) & 0xff) << 16) |
- ((tc6393xb_readb(opaque, addr + 3) & 0xff) << 24);
+ (uint32_t) addr, (int)value & 0xff);
}
-static void tc6393xb_writew(void *opaque, target_phys_addr_t addr, uint32_t value)
+TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
{
- tc6393xb_writeb(opaque, addr, value);
- tc6393xb_writeb(opaque, addr + 1, value >> 8);
-}
-
-static void tc6393xb_writel(void *opaque, target_phys_addr_t addr, uint32_t value)
-{
- tc6393xb_writeb(opaque, addr, value);
- tc6393xb_writeb(opaque, addr + 1, value >> 8);
- tc6393xb_writeb(opaque, addr + 2, value >> 16);
- tc6393xb_writeb(opaque, addr + 3, value >> 24);
-}
-
-TC6393xbState *tc6393xb_init(uint32_t base, qemu_irq irq)
-{
- int iomemtype;
TC6393xbState *s;
DriveInfo *nand;
- CPUReadMemoryFunc * const tc6393xb_readfn[] = {
- tc6393xb_readb,
- tc6393xb_readw,
- tc6393xb_readl,
- };
- CPUWriteMemoryFunc * const tc6393xb_writefn[] = {
- tc6393xb_writeb,
- tc6393xb_writew,
- tc6393xb_writel,
+ static const MemoryRegionOps tc6393xb_ops = {
+ .read = tc6393xb_readb,
+ .write = tc6393xb_writeb,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
};
s = (TC6393xbState *) g_malloc0(sizeof(TC6393xbState));
@@ -591,13 +565,12 @@ TC6393xbState *tc6393xb_init(uint32_t base, qemu_irq irq)
nand = drive_get(IF_MTD, 0, 0);
s->flash = nand_init(nand ? nand->bdrv : NULL, NAND_MFR_TOSHIBA, 0x76);
- iomemtype = cpu_register_io_memory(tc6393xb_readfn,
- tc6393xb_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x10000, iomemtype);
+ memory_region_init_io(&s->iomem, &tc6393xb_ops, s, "tc6393xb", 0x10000);
+ memory_region_add_subregion(sysmem, base, &s->iomem);
- s->vram_addr = qemu_ram_alloc(NULL, "tc6393xb.vram", 0x100000);
- s->vram_ptr = qemu_get_ram_ptr(s->vram_addr);
- cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
+ memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000);
+ s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
+ memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);
s->scr_width = 480;
s->scr_height = 640;
s->ds = graphic_console_init(tc6393xb_update_display,
diff --git a/hw/tcx.c b/hw/tcx.c
index 309600d24c..cd24100e14 100644
--- a/hw/tcx.c
+++ b/hw/tcx.c
@@ -40,7 +40,15 @@ typedef struct TCXState {
DisplayState *ds;
uint8_t *vram;
uint32_t *vram24, *cplane;
- ram_addr_t vram_offset, vram24_offset, cplane_offset;
+ MemoryRegion vram_mem;
+ MemoryRegion vram_8bit;
+ MemoryRegion vram_24bit;
+ MemoryRegion vram_cplane;
+ MemoryRegion dac;
+ MemoryRegion tec;
+ MemoryRegion thc24;
+ MemoryRegion thc8;
+ ram_addr_t vram24_offset, cplane_offset;
uint32_t vram_size;
uint32_t palette[256];
uint8_t r[256], g[256], b[256];
@@ -56,7 +64,7 @@ static void tcx_set_dirty(TCXState *s)
unsigned int i;
for (i = 0; i < MAXX * MAXY; i += TARGET_PAGE_SIZE) {
- cpu_physical_memory_set_dirty(s->vram_offset + i);
+ memory_region_set_dirty(&s->vram_mem, i);
}
}
@@ -65,8 +73,8 @@ static void tcx24_set_dirty(TCXState *s)
unsigned int i;
for (i = 0; i < MAXX * MAXY * 4; i += TARGET_PAGE_SIZE) {
- cpu_physical_memory_set_dirty(s->vram24_offset + i);
- cpu_physical_memory_set_dirty(s->cplane_offset + i);
+ memory_region_set_dirty(&s->vram_mem, s->vram24_offset + i);
+ memory_region_set_dirty(&s->vram_mem, s->cplane_offset + i);
}
}
@@ -174,16 +182,18 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
}
}
-static inline int check_dirty(ram_addr_t page, ram_addr_t page24,
+static inline int check_dirty(TCXState *s, ram_addr_t page, ram_addr_t page24,
ram_addr_t cpage)
{
int ret;
unsigned int off;
- ret = cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG);
+ ret = memory_region_get_dirty(&s->vram_mem, page, DIRTY_MEMORY_VGA);
for (off = 0; off < TARGET_PAGE_SIZE * 4; off += TARGET_PAGE_SIZE) {
- ret |= cpu_physical_memory_get_dirty(page24 + off, VGA_DIRTY_FLAG);
- ret |= cpu_physical_memory_get_dirty(cpage + off, VGA_DIRTY_FLAG);
+ ret |= memory_region_get_dirty(&s->vram_mem, page24 + off,
+ DIRTY_MEMORY_VGA);
+ ret |= memory_region_get_dirty(&s->vram_mem, cpage + off,
+ DIRTY_MEMORY_VGA);
}
return ret;
}
@@ -192,16 +202,17 @@ static inline void reset_dirty(TCXState *ts, ram_addr_t page_min,
ram_addr_t page_max, ram_addr_t page24,
ram_addr_t cpage)
{
- cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE,
- VGA_DIRTY_FLAG);
- page_min -= ts->vram_offset;
- page_max -= ts->vram_offset;
- cpu_physical_memory_reset_dirty(page24 + page_min * 4,
- page24 + page_max * 4 + TARGET_PAGE_SIZE,
- VGA_DIRTY_FLAG);
- cpu_physical_memory_reset_dirty(cpage + page_min * 4,
- cpage + page_max * 4 + TARGET_PAGE_SIZE,
- VGA_DIRTY_FLAG);
+ memory_region_reset_dirty(&ts->vram_mem,
+ page_min, page_max + TARGET_PAGE_SIZE,
+ DIRTY_MEMORY_VGA);
+ memory_region_reset_dirty(&ts->vram_mem,
+ page24 + page_min * 4,
+ page24 + page_max * 4 + TARGET_PAGE_SIZE,
+ DIRTY_MEMORY_VGA);
+ memory_region_reset_dirty(&ts->vram_mem,
+ cpage + page_min * 4,
+ cpage + page_max * 4 + TARGET_PAGE_SIZE,
+ DIRTY_MEMORY_VGA);
}
/* Fixed line length 1024 allows us to do nice tricks not possible on
@@ -216,7 +227,7 @@ static void tcx_update_display(void *opaque)
if (ds_get_bits_per_pixel(ts->ds) == 0)
return;
- page = ts->vram_offset;
+ page = 0;
y_start = -1;
page_min = -1;
page_max = 0;
@@ -242,7 +253,7 @@ static void tcx_update_display(void *opaque)
}
for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE) {
- if (cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG)) {
+ if (memory_region_get_dirty(&ts->vram_mem, page, DIRTY_MEMORY_VGA)) {
if (y_start < 0)
y_start = y;
if (page < page_min)
@@ -279,8 +290,9 @@ static void tcx_update_display(void *opaque)
}
/* reset modified pages */
if (page_max >= page_min) {
- cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE,
- VGA_DIRTY_FLAG);
+ memory_region_reset_dirty(&ts->vram_mem,
+ page_min, page_max + TARGET_PAGE_SIZE,
+ DIRTY_MEMORY_VGA);
}
}
@@ -294,7 +306,7 @@ static void tcx24_update_display(void *opaque)
if (ds_get_bits_per_pixel(ts->ds) != 32)
return;
- page = ts->vram_offset;
+ page = 0;
page24 = ts->vram24_offset;
cpage = ts->cplane_offset;
y_start = -1;
@@ -309,7 +321,7 @@ static void tcx24_update_display(void *opaque)
for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE,
page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) {
- if (check_dirty(page, page24, cpage)) {
+ if (check_dirty(ts, page, page24, cpage)) {
if (y_start < 0)
y_start = y;
if (page < page_min)
@@ -421,18 +433,20 @@ static void tcx_reset(DeviceState *d)
s->r[255] = s->g[255] = s->b[255] = 255;
update_palette_entries(s, 0, 256);
memset(s->vram, 0, MAXX*MAXY);
- cpu_physical_memory_reset_dirty(s->vram_offset, s->vram_offset +
- MAXX * MAXY * (1 + 4 + 4), VGA_DIRTY_FLAG);
+ memory_region_reset_dirty(&s->vram_mem, 0, MAXX * MAXY * (1 + 4 + 4),
+ DIRTY_MEMORY_VGA);
s->dac_index = 0;
s->dac_state = 0;
}
-static uint32_t tcx_dac_readl(void *opaque, target_phys_addr_t addr)
+static uint64_t tcx_dac_readl(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
return 0;
}
-static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint64_t val,
+ unsigned size)
{
TCXState *s = opaque;
@@ -468,77 +482,77 @@ static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
return;
}
-static CPUReadMemoryFunc * const tcx_dac_read[3] = {
- NULL,
- NULL,
- tcx_dac_readl,
+static const MemoryRegionOps tcx_dac_ops = {
+ .read = tcx_dac_readl,
+ .write = tcx_dac_writel,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
};
-static CPUWriteMemoryFunc * const tcx_dac_write[3] = {
- NULL,
- NULL,
- tcx_dac_writel,
-};
-
-static uint32_t tcx_dummy_readl(void *opaque, target_phys_addr_t addr)
+static uint64_t dummy_readl(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
return 0;
}
-static void tcx_dummy_writel(void *opaque, target_phys_addr_t addr,
- uint32_t val)
+static void dummy_writel(void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
{
}
-static CPUReadMemoryFunc * const tcx_dummy_read[3] = {
- NULL,
- NULL,
- tcx_dummy_readl,
-};
-
-static CPUWriteMemoryFunc * const tcx_dummy_write[3] = {
- NULL,
- NULL,
- tcx_dummy_writel,
+static const MemoryRegionOps dummy_ops = {
+ .read = dummy_readl,
+ .write = dummy_writel,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
};
static int tcx_init1(SysBusDevice *dev)
{
TCXState *s = FROM_SYSBUS(TCXState, dev);
- int io_memory, dummy_memory;
- ram_addr_t vram_offset;
+ ram_addr_t vram_offset = 0;
int size;
uint8_t *vram_base;
- vram_offset = qemu_ram_alloc(NULL, "tcx.vram", s->vram_size * (1 + 4 + 4));
- vram_base = qemu_get_ram_ptr(vram_offset);
- s->vram_offset = vram_offset;
+ memory_region_init_ram(&s->vram_mem, NULL, "tcx.vram",
+ s->vram_size * (1 + 4 + 4));
+ vram_base = memory_region_get_ram_ptr(&s->vram_mem);
/* 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
- sysbus_init_mmio(dev, size, s->vram_offset);
+ memory_region_init_alias(&s->vram_8bit, "tcx.vram.8bit",
+ &s->vram_mem, vram_offset, size);
+ sysbus_init_mmio_region(dev, &s->vram_8bit);
vram_offset += size;
vram_base += size;
/* DAC */
- io_memory = cpu_register_io_memory(tcx_dac_read, tcx_dac_write, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, TCX_DAC_NREGS, io_memory);
+ memory_region_init_io(&s->dac, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
+ sysbus_init_mmio_region(dev, &s->dac);
/* TEC (dummy) */
- dummy_memory = cpu_register_io_memory(tcx_dummy_read, tcx_dummy_write,
- s, DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, TCX_TEC_NREGS, dummy_memory);
+ memory_region_init_io(&s->tec, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
+ sysbus_init_mmio_region(dev, &s->tec);
/* THC: NetBSD writes here even with 8-bit display: dummy */
- sysbus_init_mmio(dev, TCX_THC_NREGS_24, dummy_memory);
+ memory_region_init_io(&s->thc24, &dummy_ops, s, "tcx.thc24",
+ TCX_THC_NREGS_24);
+ sysbus_init_mmio_region(dev, &s->thc24);
if (s->depth == 24) {
/* 24-bit plane */
size = s->vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
- sysbus_init_mmio(dev, size, vram_offset);
+ memory_region_init_alias(&s->vram_24bit, "tcx.vram.24bit",
+ &s->vram_mem, vram_offset, size);
+ sysbus_init_mmio_region(dev, &s->vram_24bit);
vram_offset += size;
vram_base += size;
@@ -546,14 +560,18 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
- sysbus_init_mmio(dev, size, vram_offset);
+ memory_region_init_alias(&s->vram_cplane, "tcx.vram.cplane",
+ &s->vram_mem, vram_offset, size);
+ sysbus_init_mmio_region(dev, &s->vram_cplane);
s->ds = graphic_console_init(tcx24_update_display,
tcx24_invalidate_display,
tcx24_screen_dump, NULL, s);
} else {
/* THC 8 bit (dummy) */
- sysbus_init_mmio(dev, TCX_THC_NREGS_8, dummy_memory);
+ memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8",
+ TCX_THC_NREGS_8);
+ sysbus_init_mmio_region(dev, &s->thc8);
s->ds = graphic_console_init(tcx_update_display,
tcx_invalidate_display,
diff --git a/hw/tosa.c b/hw/tosa.c
index 92702d148a..b992b994c7 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -220,7 +220,7 @@ static void tosa_init(ram_addr_t ram_size,
cpu_register_physical_memory(0, TOSA_ROM,
qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
- tmio = tc6393xb_init(0x10000000,
+ tmio = tc6393xb_init(address_space_mem, 0x10000000,
qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_TC6393XB_INT));
scp0 = sysbus_create_simple("scoop", 0x08800000, NULL);
diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c
index df27c198b0..ca5923c495 100644
--- a/hw/virtio-pci.c
+++ b/hw/virtio-pci.c
@@ -83,11 +83,6 @@
/* Flags track per-device state like workarounds for quirks in older guests. */
#define VIRTIO_PCI_FLAG_BUS_MASTER_BUG (1 << 0)
-/* Performance improves when virtqueue kick processing is decoupled from the
- * vcpu thread using ioeventfd for some devices. */
-#define VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT 1
-#define VIRTIO_PCI_FLAG_USE_IOEVENTFD (1 << VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT)
-
/* QEMU doesn't strictly need write barriers since everything runs in
* lock-step. We'll leave the calls to wmb() in though to make it obvious for
* KVM or if kqemu gets SMP support.
diff --git a/hw/virtio-pci.h b/hw/virtio-pci.h
index 14c10f7d67..f8404de92b 100644
--- a/hw/virtio-pci.h
+++ b/hw/virtio-pci.h
@@ -18,6 +18,11 @@
#include "virtio-net.h"
#include "virtio-serial.h"
+/* Performance improves when virtqueue kick processing is decoupled from the
+ * vcpu thread using ioeventfd for some devices. */
+#define VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT 1
+#define VIRTIO_PCI_FLAG_USE_IOEVENTFD (1 << VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT)
+
typedef struct {
PCIDevice pci_dev;
VirtIODevice *vdev;
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-17 06:38:10 +0000