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-rw-r--r--hw/arm/boot.c758
1 files changed, 455 insertions, 303 deletions
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 20c71d7d96..84ea6a807a 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -8,34 +8,39 @@
*/
#include "qemu/osdep.h"
+#include "qemu/datadir.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include <libfdt.h>
-#include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
#include "hw/arm/linux-boot-if.h"
#include "sysemu/kvm.h"
+#include "sysemu/tcg.h"
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
#include "hw/boards.h"
+#include "sysemu/reset.h"
#include "hw/loader.h"
#include "elf.h"
#include "sysemu/device_tree.h"
#include "qemu/config-file.h"
#include "qemu/option.h"
-#include "exec/address-spaces.h"
+#include "qemu/units.h"
/* Kernel boot protocol is specified in the kernel docs
* Documentation/arm/Booting and Documentation/arm64/booting.txt
* They have different preferred image load offsets from system RAM base.
*/
-#define KERNEL_ARGS_ADDR 0x100
-#define KERNEL_LOAD_ADDR 0x00010000
+#define KERNEL_ARGS_ADDR 0x100
+#define KERNEL_NOLOAD_ADDR 0x02000000
+#define KERNEL_LOAD_ADDR 0x00010000
#define KERNEL64_LOAD_ADDR 0x00080000
#define ARM64_TEXT_OFFSET_OFFSET 8
#define ARM64_MAGIC_OFFSET 56
+#define BOOTLOADER_MAX_SIZE (4 * KiB)
+
AddressSpace *arm_boot_address_space(ARMCPU *cpu,
const struct arm_boot_info *info)
{
@@ -55,24 +60,6 @@ AddressSpace *arm_boot_address_space(ARMCPU *cpu,
return cpu_get_address_space(cs, asidx);
}
-typedef enum {
- FIXUP_NONE = 0, /* do nothing */
- FIXUP_TERMINATOR, /* end of insns */
- FIXUP_BOARDID, /* overwrite with board ID number */
- FIXUP_BOARD_SETUP, /* overwrite with board specific setup code address */
- FIXUP_ARGPTR, /* overwrite with pointer to kernel args */
- FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */
- FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */
- FIXUP_BOOTREG, /* overwrite with boot register address */
- FIXUP_DSB, /* overwrite with correct DSB insn for cpu */
- FIXUP_MAX,
-} FixupType;
-
-typedef struct ARMInsnFixup {
- uint32_t insn;
- FixupType fixup;
-} ARMInsnFixup;
-
static const ARMInsnFixup bootloader_aarch64[] = {
{ 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
{ 0xaa1f03e1 }, /* mov x1, xzr */
@@ -80,10 +67,10 @@ static const ARMInsnFixup bootloader_aarch64[] = {
{ 0xaa1f03e3 }, /* mov x3, xzr */
{ 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
{ 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
- { 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */
- { 0 }, /* .word @DTB Higher 32-bits */
- { 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */
- { 0 }, /* .word @Kernel Entry Higher 32-bits */
+ { 0, FIXUP_ARGPTR_LO }, /* arg: .word @DTB Lower 32-bits */
+ { 0, FIXUP_ARGPTR_HI}, /* .word @DTB Higher 32-bits */
+ { 0, FIXUP_ENTRYPOINT_LO }, /* entry: .word @Kernel Entry Lower 32-bits */
+ { 0, FIXUP_ENTRYPOINT_HI }, /* .word @Kernel Entry Higher 32-bits */
{ 0, FIXUP_TERMINATOR }
};
@@ -103,8 +90,8 @@ static const ARMInsnFixup bootloader[] = {
{ 0xe59f2004 }, /* ldr r2, [pc, #4] */
{ 0xe59ff004 }, /* ldr pc, [pc, #4] */
{ 0, FIXUP_BOARDID },
- { 0, FIXUP_ARGPTR },
- { 0, FIXUP_ENTRYPOINT },
+ { 0, FIXUP_ARGPTR_LO },
+ { 0, FIXUP_ENTRYPOINT_LO },
{ 0, FIXUP_TERMINATOR }
};
@@ -143,9 +130,10 @@ static const ARMInsnFixup smpboot[] = {
{ 0, FIXUP_TERMINATOR }
};
-static void write_bootloader(const char *name, hwaddr addr,
- const ARMInsnFixup *insns, uint32_t *fixupcontext,
- AddressSpace *as)
+void arm_write_bootloader(const char *name,
+ AddressSpace *as, hwaddr addr,
+ const ARMInsnFixup *insns,
+ const uint32_t *fixupcontext)
{
/* Fix up the specified bootloader fragment and write it into
* guest memory using rom_add_blob_fixed(). fixupcontext is
@@ -171,8 +159,10 @@ static void write_bootloader(const char *name, hwaddr addr,
break;
case FIXUP_BOARDID:
case FIXUP_BOARD_SETUP:
- case FIXUP_ARGPTR:
- case FIXUP_ENTRYPOINT:
+ case FIXUP_ARGPTR_LO:
+ case FIXUP_ARGPTR_HI:
+ case FIXUP_ENTRYPOINT_LO:
+ case FIXUP_ENTRYPOINT_HI:
case FIXUP_GIC_CPU_IF:
case FIXUP_BOOTREG:
case FIXUP_DSB:
@@ -184,6 +174,8 @@ static void write_bootloader(const char *name, hwaddr addr,
code[i] = tswap32(insn);
}
+ assert((len * sizeof(uint32_t)) < BOOTLOADER_MAX_SIZE);
+
rom_add_blob_fixed_as(name, code, len * sizeof(uint32_t), addr, as);
g_free(code);
@@ -203,8 +195,8 @@ static void default_write_secondary(ARMCPU *cpu,
fixupcontext[FIXUP_DSB] = CP15_DSB_INSN;
}
- write_bootloader("smpboot", info->smp_loader_start,
- smpboot, fixupcontext, as);
+ arm_write_bootloader("smpboot", as, info->smp_loader_start,
+ smpboot, fixupcontext);
}
void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
@@ -229,6 +221,9 @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
};
uint32_t board_setup_blob[] = {
/* board setup addr */
+ 0xee110f51, /* mrc p15, 0, r0, c1, c1, 2 ;read NSACR */
+ 0xe3800b03, /* orr r0, #0xc00 ;set CP11, CP10 */
+ 0xee010f51, /* mcr p15, 0, r0, c1, c1, 2 ;write NSACR */
0xe3a00e00 + (mvbar_addr >> 4), /* mov r0, #mvbar_addr */
0xee0c0f30, /* mcr p15, 0, r0, c12, c0, 1 ;set MVBAR */
0xee110f11, /* mrc p15, 0, r0, c1 , c1, 0 ;read SCR */
@@ -313,8 +308,7 @@ static void set_kernel_args(const struct arm_boot_info *info, AddressSpace *as)
cmdline_size = strlen(info->kernel_cmdline);
address_space_write(as, p + 8, MEMTXATTRS_UNSPECIFIED,
- (const uint8_t *)info->kernel_cmdline,
- cmdline_size + 1);
+ info->kernel_cmdline, cmdline_size + 1);
cmdline_size = (cmdline_size >> 2) + 1;
WRITE_WORD(p, cmdline_size + 2);
WRITE_WORD(p, 0x54410009);
@@ -406,13 +400,38 @@ static void set_kernel_args_old(const struct arm_boot_info *info,
}
s = info->kernel_cmdline;
if (s) {
- address_space_write(as, p, MEMTXATTRS_UNSPECIFIED,
- (const uint8_t *)s, strlen(s) + 1);
+ address_space_write(as, p, MEMTXATTRS_UNSPECIFIED, s, strlen(s) + 1);
} else {
WRITE_WORD(p, 0);
}
}
+static int fdt_add_memory_node(void *fdt, uint32_t acells, hwaddr mem_base,
+ uint32_t scells, hwaddr mem_len,
+ int numa_node_id)
+{
+ char *nodename;
+ int ret;
+
+ nodename = g_strdup_printf("/memory@%" PRIx64, mem_base);
+ qemu_fdt_add_subnode(fdt, nodename);
+ qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
+ ret = qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", acells, mem_base,
+ scells, mem_len);
+ if (ret < 0) {
+ goto out;
+ }
+
+ /* only set the NUMA ID if it is specified */
+ if (numa_node_id >= 0) {
+ ret = qemu_fdt_setprop_cell(fdt, nodename,
+ "numa-node-id", numa_node_id);
+ }
+out:
+ g_free(nodename);
+ return ret;
+}
+
static void fdt_add_psci_node(void *fdt)
{
uint32_t cpu_suspend_fn;
@@ -441,18 +460,24 @@ static void fdt_add_psci_node(void *fdt)
}
/*
- * If /psci node is present in provided DTB, assume that no fixup
- * is necessary and all PSCI configuration should be taken as-is
+ * A pre-existing /psci node might specify function ID values
+ * that don't match QEMU's PSCI implementation. Delete the whole
+ * node and put our own in instead.
*/
rc = fdt_path_offset(fdt, "/psci");
if (rc >= 0) {
- return;
+ qemu_fdt_nop_node(fdt, "/psci");
}
qemu_fdt_add_subnode(fdt, "/psci");
- if (armcpu->psci_version == 2) {
- const char comp[] = "arm,psci-0.2\0arm,psci";
- qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
+ if (armcpu->psci_version >= QEMU_PSCI_VERSION_0_2) {
+ if (armcpu->psci_version < QEMU_PSCI_VERSION_1_0) {
+ const char comp[] = "arm,psci-0.2\0arm,psci";
+ qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
+ } else {
+ const char comp[] = "arm,psci-1.0\0arm,psci-0.2\0arm,psci";
+ qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
+ }
cpu_off_fn = QEMU_PSCI_0_2_FN_CPU_OFF;
if (arm_feature(&armcpu->env, ARM_FEATURE_AARCH64)) {
@@ -487,12 +512,11 @@ static void fdt_add_psci_node(void *fdt)
}
int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
- hwaddr addr_limit, AddressSpace *as)
+ hwaddr addr_limit, AddressSpace *as, MachineState *ms)
{
void *fdt = NULL;
int size, rc, n = 0;
uint32_t acells, scells;
- char *nodename;
unsigned int i;
hwaddr mem_base, mem_len;
char **node_path;
@@ -539,7 +563,7 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
goto fail;
}
- if (scells < 2 && binfo->ram_size >= (1ULL << 32)) {
+ if (scells < 2 && binfo->ram_size >= 4 * GiB) {
/* This is user error so deserves a friendlier error message
* than the failure of setprop_sized_cells would provide
*/
@@ -562,39 +586,41 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
}
g_strfreev(node_path);
- if (nb_numa_nodes > 0) {
+ /*
+ * We drop all the memory nodes which correspond to empty NUMA nodes
+ * from the device tree, because the Linux NUMA binding document
+ * states they should not be generated. Linux will get the NUMA node
+ * IDs of the empty NUMA nodes from the distance map if they are needed.
+ * This means QEMU users may be obliged to provide command lines which
+ * configure distance maps when the empty NUMA node IDs are needed and
+ * Linux's default distance map isn't sufficient.
+ */
+ if (ms->numa_state != NULL && ms->numa_state->num_nodes > 0) {
mem_base = binfo->loader_start;
- for (i = 0; i < nb_numa_nodes; i++) {
- mem_len = numa_info[i].node_mem;
- nodename = g_strdup_printf("/memory@%" PRIx64, mem_base);
- qemu_fdt_add_subnode(fdt, nodename);
- qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
- rc = qemu_fdt_setprop_sized_cells(fdt, nodename, "reg",
- acells, mem_base,
- scells, mem_len);
+ for (i = 0; i < ms->numa_state->num_nodes; i++) {
+ mem_len = ms->numa_state->nodes[i].node_mem;
+ if (!mem_len) {
+ continue;
+ }
+
+ rc = fdt_add_memory_node(fdt, acells, mem_base,
+ scells, mem_len, i);
if (rc < 0) {
- fprintf(stderr, "couldn't set %s/reg for node %d\n", nodename,
- i);
+ fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n",
+ mem_base);
goto fail;
}
- qemu_fdt_setprop_cell(fdt, nodename, "numa-node-id", i);
mem_base += mem_len;
- g_free(nodename);
}
} else {
- nodename = g_strdup_printf("/memory@%" PRIx64, binfo->loader_start);
- qemu_fdt_add_subnode(fdt, nodename);
- qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
-
- rc = qemu_fdt_setprop_sized_cells(fdt, nodename, "reg",
- acells, binfo->loader_start,
- scells, binfo->ram_size);
+ rc = fdt_add_memory_node(fdt, acells, binfo->loader_start,
+ scells, binfo->ram_size, -1);
if (rc < 0) {
- fprintf(stderr, "couldn't set %s reg\n", nodename);
+ fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n",
+ binfo->loader_start);
goto fail;
}
- g_free(nodename);
}
rc = fdt_path_offset(fdt, "/chosen");
@@ -602,9 +628,9 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
qemu_fdt_add_subnode(fdt, "/chosen");
}
- if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
+ if (ms->kernel_cmdline && *ms->kernel_cmdline) {
rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
- binfo->kernel_cmdline);
+ ms->kernel_cmdline);
if (rc < 0) {
fprintf(stderr, "couldn't set /chosen/bootargs\n");
goto fail;
@@ -612,15 +638,17 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
}
if (binfo->initrd_size) {
- rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
- binfo->initrd_start);
+ rc = qemu_fdt_setprop_sized_cells(fdt, "/chosen", "linux,initrd-start",
+ acells, binfo->initrd_start);
if (rc < 0) {
fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
goto fail;
}
- rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
- binfo->initrd_start + binfo->initrd_size);
+ rc = qemu_fdt_setprop_sized_cells(fdt, "/chosen", "linux,initrd-end",
+ acells,
+ binfo->initrd_start +
+ binfo->initrd_size);
if (rc < 0) {
fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
goto fail;
@@ -639,8 +667,13 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
* the DTB is copied again upon reset, even if addr points into RAM.
*/
rom_add_blob_fixed_as("dtb", fdt, size, addr, as);
+ qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+ rom_ptr_for_as(as, addr, size));
- g_free(fdt);
+ if (fdt != ms->fdt) {
+ g_free(ms->fdt);
+ ms->fdt = fdt;
+ }
return size;
@@ -687,66 +720,37 @@ static void do_cpu_reset(void *opaque)
g_assert_not_reached();
}
- if (!env->aarch64) {
- env->thumb = info->entry & 1;
- entry &= 0xfffffffe;
- }
cpu_set_pc(cs, entry);
} else {
- /* If we are booting Linux then we need to check whether we are
- * booting into secure or non-secure state and adjust the state
- * accordingly. Out of reset, ARM is defined to be in secure state
- * (SCR.NS = 0), we change that here if non-secure boot has been
- * requested.
+ /*
+ * If we are booting Linux then we might need to do so at:
+ * - AArch64 NS EL2 or NS EL1
+ * - AArch32 Secure SVC (EL3)
+ * - AArch32 NS Hyp (EL2)
+ * - AArch32 NS SVC (EL1)
+ * Configure the CPU in the way boot firmware would do to
+ * drop us down to the appropriate level.
*/
- if (arm_feature(env, ARM_FEATURE_EL3)) {
- /* AArch64 is defined to come out of reset into EL3 if enabled.
- * If we are booting Linux then we need to adjust our EL as
- * Linux expects us to be in EL2 or EL1. AArch32 resets into
- * SVC, which Linux expects, so no privilege/exception level to
- * adjust.
- */
- if (env->aarch64) {
- env->cp15.scr_el3 |= SCR_RW;
- if (arm_feature(env, ARM_FEATURE_EL2)) {
- env->cp15.hcr_el2 |= HCR_RW;
- env->pstate = PSTATE_MODE_EL2h;
- } else {
- env->pstate = PSTATE_MODE_EL1h;
- }
- /* AArch64 kernels never boot in secure mode */
- assert(!info->secure_boot);
- /* This hook is only supported for AArch32 currently:
- * bootloader_aarch64[] will not call the hook, and
- * the code above has already dropped us into EL2 or EL1.
- */
- assert(!info->secure_board_setup);
- }
+ int target_el = arm_feature(env, ARM_FEATURE_EL2) ? 2 : 1;
- if (arm_feature(env, ARM_FEATURE_EL2)) {
- /* If we have EL2 then Linux expects the HVC insn to work */
- env->cp15.scr_el3 |= SCR_HCE;
- }
-
- /* Set to non-secure if not a secure boot */
- if (!info->secure_boot &&
- (cs != first_cpu || !info->secure_board_setup)) {
- /* Linux expects non-secure state */
- env->cp15.scr_el3 |= SCR_NS;
- }
- }
-
- if (!env->aarch64 && !info->secure_boot &&
- arm_feature(env, ARM_FEATURE_EL2)) {
+ if (env->aarch64) {
/*
- * This is an AArch32 boot not to Secure state, and
- * we have Hyp mode available, so boot the kernel into
- * Hyp mode. This is not how the CPU comes out of reset,
- * so we need to manually put it there.
+ * AArch64 kernels never boot in secure mode, and we don't
+ * support the secure_board_setup hook for AArch64.
*/
- cpsr_write(env, ARM_CPU_MODE_HYP, CPSR_M, CPSRWriteRaw);
+ assert(!info->secure_boot);
+ assert(!info->secure_board_setup);
+ } else {
+ if (arm_feature(env, ARM_FEATURE_EL3) &&
+ (info->secure_boot ||
+ (info->secure_board_setup && cs == first_cpu))) {
+ /* Start this CPU in Secure SVC */
+ target_el = 3;
+ }
}
+ arm_emulate_firmware_reset(cs, target_el);
+
if (cs == first_cpu) {
AddressSpace *as = arm_boot_address_space(cpu, info);
@@ -759,60 +763,15 @@ static void do_cpu_reset(void *opaque)
set_kernel_args(info, as);
}
}
- } else {
+ } else if (info->secondary_cpu_reset_hook) {
info->secondary_cpu_reset_hook(cpu, info);
}
}
- }
-}
-/**
- * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
- * by key.
- * @fw_cfg: The firmware config instance to store the data in.
- * @size_key: The firmware config key to store the size of the loaded
- * data under, with fw_cfg_add_i32().
- * @data_key: The firmware config key to store the loaded data under,
- * with fw_cfg_add_bytes().
- * @image_name: The name of the image file to load. If it is NULL, the
- * function returns without doing anything.
- * @try_decompress: Whether the image should be decompressed (gunzipped) before
- * adding it to fw_cfg. If decompression fails, the image is
- * loaded as-is.
- *
- * In case of failure, the function prints an error message to stderr and the
- * process exits with status 1.
- */
-static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key,
- uint16_t data_key, const char *image_name,
- bool try_decompress)
-{
- size_t size = -1;
- uint8_t *data;
-
- if (image_name == NULL) {
- return;
- }
-
- if (try_decompress) {
- size = load_image_gzipped_buffer(image_name,
- LOAD_IMAGE_MAX_GUNZIP_BYTES, &data);
- }
-
- if (size == (size_t)-1) {
- gchar *contents;
- gsize length;
-
- if (!g_file_get_contents(image_name, &contents, &length, NULL)) {
- error_report("failed to load \"%s\"", image_name);
- exit(1);
+ if (tcg_enabled()) {
+ arm_rebuild_hflags(env);
}
- size = length;
- data = (uint8_t *)contents;
}
-
- fw_cfg_add_i32(fw_cfg, size_key, size);
- fw_cfg_add_bytes(fw_cfg, data_key, data, size);
}
static int do_arm_linux_init(Object *obj, void *opaque)
@@ -829,7 +788,7 @@ static int do_arm_linux_init(Object *obj, void *opaque)
return 0;
}
-static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
+static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
uint64_t *lowaddr, uint64_t *highaddr,
int elf_machine, AddressSpace *as)
{
@@ -840,7 +799,7 @@ static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
} elf_header;
int data_swab = 0;
bool big_endian;
- int64_t ret = -1;
+ ssize_t ret = -1;
Error *err = NULL;
@@ -875,8 +834,8 @@ static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
}
}
- ret = load_elf_as(info->kernel_filename, NULL, NULL,
- pentry, lowaddr, highaddr, big_endian, elf_machine,
+ ret = load_elf_as(info->kernel_filename, NULL, NULL, NULL,
+ pentry, lowaddr, highaddr, NULL, big_endian, elf_machine,
1, data_swab, as);
if (ret <= 0) {
/* The header loaded but the image didn't */
@@ -890,6 +849,7 @@ static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,
hwaddr *entry, AddressSpace *as)
{
hwaddr kernel_load_offset = KERNEL64_LOAD_ADDR;
+ uint64_t kernel_size = 0;
uint8_t *buffer;
int size;
@@ -905,6 +865,12 @@ static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,
return -1;
}
size = len;
+
+ /* Unpack the image if it is a EFI zboot image */
+ if (unpack_efi_zboot_image(&buffer, &size) < 0) {
+ g_free(buffer);
+ return -1;
+ }
}
/* check the arm64 magic header value -- very old kernels may not have it */
@@ -917,93 +883,60 @@ static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,
* is only valid if the image_size is non-zero.
*/
memcpy(&hdrvals, buffer + ARM64_TEXT_OFFSET_OFFSET, sizeof(hdrvals));
- if (hdrvals[1] != 0) {
+
+ kernel_size = le64_to_cpu(hdrvals[1]);
+
+ if (kernel_size != 0) {
kernel_load_offset = le64_to_cpu(hdrvals[0]);
+
+ /*
+ * We write our startup "bootloader" at the very bottom of RAM,
+ * so that bit can't be used for the image. Luckily the Image
+ * format specification is that the image requests only an offset
+ * from a 2MB boundary, not an absolute load address. So if the
+ * image requests an offset that might mean it overlaps with the
+ * bootloader, we can just load it starting at 2MB+offset rather
+ * than 0MB + offset.
+ */
+ if (kernel_load_offset < BOOTLOADER_MAX_SIZE) {
+ kernel_load_offset += 2 * MiB;
+ }
}
}
+ /*
+ * Kernels before v3.17 don't populate the image_size field, and
+ * raw images have no header. For those our best guess at the size
+ * is the size of the Image file itself.
+ */
+ if (kernel_size == 0) {
+ kernel_size = size;
+ }
+
*entry = mem_base + kernel_load_offset;
rom_add_blob_fixed_as(filename, buffer, size, *entry, as);
g_free(buffer);
- return size;
+ return kernel_size;
}
-void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
+static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
+ struct arm_boot_info *info)
{
+ /* Set up for a direct boot of a kernel image file. */
CPUState *cs;
- int kernel_size;
+ AddressSpace *as = arm_boot_address_space(cpu, info);
+ ssize_t kernel_size;
int initrd_size;
int is_linux = 0;
- uint64_t elf_entry, elf_low_addr, elf_high_addr;
+ uint64_t elf_entry;
+ /* Addresses of first byte used and first byte not used by the image */
+ uint64_t image_low_addr = 0, image_high_addr = 0;
int elf_machine;
hwaddr entry;
static const ARMInsnFixup *primary_loader;
- AddressSpace *as = arm_boot_address_space(cpu, info);
-
- /* CPU objects (unlike devices) are not automatically reset on system
- * reset, so we must always register a handler to do so. If we're
- * actually loading a kernel, the handler is also responsible for
- * arranging that we start it correctly.
- */
- for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
- qemu_register_reset(do_cpu_reset, ARM_CPU(cs));
- }
-
- /* The board code is not supposed to set secure_board_setup unless
- * running its code in secure mode is actually possible, and KVM
- * doesn't support secure.
- */
- assert(!(info->secure_board_setup && kvm_enabled()));
-
- info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
- info->dtb_limit = 0;
-
- /* Load the kernel. */
- if (!info->kernel_filename || info->firmware_loaded) {
-
- if (have_dtb(info)) {
- /* If we have a device tree blob, but no kernel to supply it to (or
- * the kernel is supposed to be loaded by the bootloader), copy the
- * DTB to the base of RAM for the bootloader to pick up.
- */
- info->dtb_start = info->loader_start;
- }
-
- if (info->kernel_filename) {
- FWCfgState *fw_cfg;
- bool try_decompressing_kernel;
-
- fw_cfg = fw_cfg_find();
- try_decompressing_kernel = arm_feature(&cpu->env,
- ARM_FEATURE_AARCH64);
-
- /* Expose the kernel, the command line, and the initrd in fw_cfg.
- * We don't process them here at all, it's all left to the
- * firmware.
- */
- load_image_to_fw_cfg(fw_cfg,
- FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
- info->kernel_filename,
- try_decompressing_kernel);
- load_image_to_fw_cfg(fw_cfg,
- FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
- info->initrd_filename, false);
-
- if (info->kernel_cmdline) {
- fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
- strlen(info->kernel_cmdline) + 1);
- fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
- info->kernel_cmdline);
- }
- }
-
- /* We will start from address 0 (typically a boot ROM image) in the
- * same way as hardware.
- */
- return;
- }
+ uint64_t ram_end = info->loader_start + info->ram_size;
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
primary_loader = bootloader_aarch64;
@@ -1016,82 +949,109 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
elf_machine = EM_ARM;
}
- if (!info->secondary_cpu_reset_hook) {
- info->secondary_cpu_reset_hook = default_reset_secondary;
- }
- if (!info->write_secondary_boot) {
- info->write_secondary_boot = default_write_secondary;
- }
-
- if (info->nb_cpus == 0)
- info->nb_cpus = 1;
-
- /* We want to put the initrd far enough into RAM that when the
- * kernel is uncompressed it will not clobber the initrd. However
- * on boards without much RAM we must ensure that we still leave
- * enough room for a decent sized initrd, and on boards with large
- * amounts of RAM we must avoid the initrd being so far up in RAM
- * that it is outside lowmem and inaccessible to the kernel.
- * So for boards with less than 256MB of RAM we put the initrd
- * halfway into RAM, and for boards with 256MB of RAM or more we put
- * the initrd at 128MB.
- */
- info->initrd_start = info->loader_start +
- MIN(info->ram_size / 2, 128 * 1024 * 1024);
-
/* Assume that raw images are linux kernels, and ELF images are not. */
- kernel_size = arm_load_elf(info, &elf_entry, &elf_low_addr,
- &elf_high_addr, elf_machine, as);
+ kernel_size = arm_load_elf(info, &elf_entry, &image_low_addr,
+ &image_high_addr, elf_machine, as);
if (kernel_size > 0 && have_dtb(info)) {
- /* If there is still some room left at the base of RAM, try and put
+ /*
+ * If there is still some room left at the base of RAM, try and put
* the DTB there like we do for images loaded with -bios or -pflash.
*/
- if (elf_low_addr > info->loader_start
- || elf_high_addr < info->loader_start) {
- /* Set elf_low_addr as address limit for arm_load_dtb if it may be
+ if (image_low_addr > info->loader_start
+ || image_high_addr < info->loader_start) {
+ /*
+ * Set image_low_addr as address limit for arm_load_dtb if it may be
* pointing into RAM, otherwise pass '0' (no limit)
*/
- if (elf_low_addr < info->loader_start) {
- elf_low_addr = 0;
+ if (image_low_addr < info->loader_start) {
+ image_low_addr = 0;
}
info->dtb_start = info->loader_start;
- info->dtb_limit = elf_low_addr;
+ info->dtb_limit = image_low_addr;
}
}
entry = elf_entry;
if (kernel_size < 0) {
- kernel_size = load_uimage_as(info->kernel_filename, &entry, NULL,
+ uint64_t loadaddr = info->loader_start + KERNEL_NOLOAD_ADDR;
+ kernel_size = load_uimage_as(info->kernel_filename, &entry, &loadaddr,
&is_linux, NULL, NULL, as);
+ if (kernel_size >= 0) {
+ image_low_addr = loadaddr;
+ image_high_addr = image_low_addr + kernel_size;
+ }
}
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {
kernel_size = load_aarch64_image(info->kernel_filename,
info->loader_start, &entry, as);
is_linux = 1;
+ if (kernel_size >= 0) {
+ image_low_addr = entry;
+ image_high_addr = image_low_addr + kernel_size;
+ }
} else if (kernel_size < 0) {
/* 32-bit ARM */
entry = info->loader_start + KERNEL_LOAD_ADDR;
kernel_size = load_image_targphys_as(info->kernel_filename, entry,
- info->ram_size - KERNEL_LOAD_ADDR,
- as);
+ ram_end - KERNEL_LOAD_ADDR, as);
is_linux = 1;
+ if (kernel_size >= 0) {
+ image_low_addr = entry;
+ image_high_addr = image_low_addr + kernel_size;
+ }
}
if (kernel_size < 0) {
error_report("could not load kernel '%s'", info->kernel_filename);
exit(1);
}
+
+ if (kernel_size > info->ram_size) {
+ error_report("kernel '%s' is too large to fit in RAM "
+ "(kernel size %zd, RAM size %" PRId64 ")",
+ info->kernel_filename, kernel_size, info->ram_size);
+ exit(1);
+ }
+
info->entry = entry;
+
+ /*
+ * We want to put the initrd far enough into RAM that when the
+ * kernel is uncompressed it will not clobber the initrd. However
+ * on boards without much RAM we must ensure that we still leave
+ * enough room for a decent sized initrd, and on boards with large
+ * amounts of RAM we must avoid the initrd being so far up in RAM
+ * that it is outside lowmem and inaccessible to the kernel.
+ * So for boards with less than 256MB of RAM we put the initrd
+ * halfway into RAM, and for boards with 256MB of RAM or more we put
+ * the initrd at 128MB.
+ * We also refuse to put the initrd somewhere that will definitely
+ * overlay the kernel we just loaded, though for kernel formats which
+ * don't tell us their exact size (eg self-decompressing 32-bit kernels)
+ * we might still make a bad choice here.
+ */
+ info->initrd_start = info->loader_start +
+ MIN(info->ram_size / 2, 128 * MiB);
+ if (image_high_addr) {
+ info->initrd_start = MAX(info->initrd_start, image_high_addr);
+ }
+ info->initrd_start = TARGET_PAGE_ALIGN(info->initrd_start);
+
if (is_linux) {
uint32_t fixupcontext[FIXUP_MAX];
if (info->initrd_filename) {
+
+ if (info->initrd_start >= ram_end) {
+ error_report("not enough space after kernel to load initrd");
+ exit(1);
+ }
+
initrd_size = load_ramdisk_as(info->initrd_filename,
info->initrd_start,
- info->ram_size - info->initrd_start,
- as);
+ ram_end - info->initrd_start, as);
if (initrd_size < 0) {
initrd_size = load_image_targphys_as(info->initrd_filename,
info->initrd_start,
- info->ram_size -
+ ram_end -
info->initrd_start,
as);
}
@@ -1100,6 +1060,12 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
info->initrd_filename);
exit(1);
}
+ if (info->initrd_start + initrd_size > ram_end) {
+ error_report("could not load initrd '%s': "
+ "too big to fit into RAM after the kernel",
+ info->initrd_filename);
+ exit(1);
+ }
} else {
initrd_size = 0;
}
@@ -1108,7 +1074,8 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
fixupcontext[FIXUP_BOARDID] = info->board_id;
fixupcontext[FIXUP_BOARD_SETUP] = info->board_setup_addr;
- /* for device tree boot, we pass the DTB directly in r2. Otherwise
+ /*
+ * for device tree boot, we pass the DTB directly in r2. Otherwise
* we point to the kernel args.
*/
if (have_dtb(info)) {
@@ -1122,41 +1089,48 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
*
* Let's play safe and prealign it to 2MB to give us some space.
*/
- align = 2 * 1024 * 1024;
+ align = 2 * MiB;
} else {
/*
* Some 32bit kernels will trash anything in the 4K page the
* initrd ends in, so make sure the DTB isn't caught up in that.
*/
- align = 4096;
+ align = 4 * KiB;
}
/* Place the DTB after the initrd in memory with alignment. */
info->dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,
align);
- fixupcontext[FIXUP_ARGPTR] = info->dtb_start;
+ if (info->dtb_start >= ram_end) {
+ error_report("Not enough space for DTB after kernel/initrd");
+ exit(1);
+ }
+ fixupcontext[FIXUP_ARGPTR_LO] = info->dtb_start;
+ fixupcontext[FIXUP_ARGPTR_HI] = info->dtb_start >> 32;
} else {
- fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR;
- if (info->ram_size >= (1ULL << 32)) {
+ fixupcontext[FIXUP_ARGPTR_LO] =
+ info->loader_start + KERNEL_ARGS_ADDR;
+ fixupcontext[FIXUP_ARGPTR_HI] =
+ (info->loader_start + KERNEL_ARGS_ADDR) >> 32;
+ if (info->ram_size >= 4 * GiB) {
error_report("RAM size must be less than 4GB to boot"
" Linux kernel using ATAGS (try passing a device tree"
" using -dtb)");
exit(1);
}
}
- fixupcontext[FIXUP_ENTRYPOINT] = entry;
+ fixupcontext[FIXUP_ENTRYPOINT_LO] = entry;
+ fixupcontext[FIXUP_ENTRYPOINT_HI] = entry >> 32;
- write_bootloader("bootloader", info->loader_start,
- primary_loader, fixupcontext, as);
+ arm_write_bootloader("bootloader", as, info->loader_start,
+ primary_loader, fixupcontext);
- if (info->nb_cpus > 1) {
- info->write_secondary_boot(cpu, info);
- }
if (info->write_board_setup) {
info->write_board_setup(cpu, info);
}
- /* Notify devices which need to fake up firmware initialization
+ /*
+ * Notify devices which need to fake up firmware initialization
* that we're doing a direct kernel boot.
*/
object_child_foreach_recursive(object_get_root(),
@@ -1167,9 +1141,187 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
ARM_CPU(cs)->env.boot_info = info;
}
+}
+
+static void arm_setup_firmware_boot(ARMCPU *cpu, struct arm_boot_info *info)
+{
+ /* Set up for booting firmware (which might load a kernel via fw_cfg) */
+
+ if (have_dtb(info)) {
+ /*
+ * If we have a device tree blob, but no kernel to supply it to (or
+ * the kernel is supposed to be loaded by the bootloader), copy the
+ * DTB to the base of RAM for the bootloader to pick up.
+ */
+ info->dtb_start = info->loader_start;
+ }
+
+ if (info->kernel_filename) {
+ FWCfgState *fw_cfg;
+ bool try_decompressing_kernel;
+
+ fw_cfg = fw_cfg_find();
+
+ if (!fw_cfg) {
+ error_report("This machine type does not support loading both "
+ "a guest firmware/BIOS image and a guest kernel at "
+ "the same time. You should change your QEMU command "
+ "line to specify one or the other, but not both.");
+ exit(1);
+ }
+
+ try_decompressing_kernel = arm_feature(&cpu->env,
+ ARM_FEATURE_AARCH64);
+
+ /*
+ * Expose the kernel, the command line, and the initrd in fw_cfg.
+ * We don't process them here at all, it's all left to the
+ * firmware.
+ */
+ load_image_to_fw_cfg(fw_cfg,
+ FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
+ info->kernel_filename,
+ try_decompressing_kernel);
+ load_image_to_fw_cfg(fw_cfg,
+ FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
+ info->initrd_filename, false);
+
+ if (info->kernel_cmdline) {
+ fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
+ strlen(info->kernel_cmdline) + 1);
+ fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
+ info->kernel_cmdline);
+ }
+ }
+
+ /*
+ * We will start from address 0 (typically a boot ROM image) in the
+ * same way as hardware. Leave env->boot_info NULL, so that
+ * do_cpu_reset() knows it does not need to alter the PC on reset.
+ */
+}
+
+void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info)
+{
+ CPUState *cs;
+ AddressSpace *as = arm_boot_address_space(cpu, info);
+ int boot_el;
+ CPUARMState *env = &cpu->env;
+ int nb_cpus = 0;
+
+ /*
+ * CPU objects (unlike devices) are not automatically reset on system
+ * reset, so we must always register a handler to do so. If we're
+ * actually loading a kernel, the handler is also responsible for
+ * arranging that we start it correctly.
+ */
+ for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
+ qemu_register_reset(do_cpu_reset, ARM_CPU(cs));
+ nb_cpus++;
+ }
+
+ /*
+ * The board code is not supposed to set secure_board_setup unless
+ * running its code in secure mode is actually possible, and KVM
+ * doesn't support secure.
+ */
+ assert(!(info->secure_board_setup && kvm_enabled()));
+ info->kernel_filename = ms->kernel_filename;
+ info->kernel_cmdline = ms->kernel_cmdline;
+ info->initrd_filename = ms->initrd_filename;
+ info->dtb_filename = ms->dtb;
+ info->dtb_limit = 0;
+
+ /* Load the kernel. */
+ if (!info->kernel_filename || info->firmware_loaded) {
+ arm_setup_firmware_boot(cpu, info);
+ } else {
+ arm_setup_direct_kernel_boot(cpu, info);
+ }
+
+ /*
+ * Disable the PSCI conduit if it is set up to target the same
+ * or a lower EL than the one we're going to start the guest code in.
+ * This logic needs to agree with the code in do_cpu_reset() which
+ * decides whether we're going to boot the guest in the highest
+ * supported exception level or in a lower one.
+ */
+
+ /*
+ * If PSCI is enabled, then SMC calls all go to the PSCI handler and
+ * are never emulated to trap into guest code. It therefore does not
+ * make sense for the board to have a setup code fragment that runs
+ * in Secure, because this will probably need to itself issue an SMC of some
+ * kind as part of its operation.
+ */
+ assert(info->psci_conduit == QEMU_PSCI_CONDUIT_DISABLED ||
+ !info->secure_board_setup);
+
+ /* Boot into highest supported EL ... */
+ if (arm_feature(env, ARM_FEATURE_EL3)) {
+ boot_el = 3;
+ } else if (arm_feature(env, ARM_FEATURE_EL2)) {
+ boot_el = 2;
+ } else {
+ boot_el = 1;
+ }
+ /* ...except that if we're booting Linux we adjust the EL we boot into */
+ if (info->is_linux && !info->secure_boot) {
+ boot_el = arm_feature(env, ARM_FEATURE_EL2) ? 2 : 1;
+ }
+ if ((info->psci_conduit == QEMU_PSCI_CONDUIT_HVC && boot_el >= 2) ||
+ (info->psci_conduit == QEMU_PSCI_CONDUIT_SMC && boot_el == 3)) {
+ info->psci_conduit = QEMU_PSCI_CONDUIT_DISABLED;
+ }
+
+ if (info->psci_conduit != QEMU_PSCI_CONDUIT_DISABLED) {
+ for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
+ Object *cpuobj = OBJECT(cs);
+
+ object_property_set_int(cpuobj, "psci-conduit", info->psci_conduit,
+ &error_abort);
+ /*
+ * Secondary CPUs start in PSCI powered-down state. Like the
+ * code in do_cpu_reset(), we assume first_cpu is the primary
+ * CPU.
+ */
+ if (cs != first_cpu) {
+ object_property_set_bool(cpuobj, "start-powered-off", true,
+ &error_abort);
+ }
+ }
+ }
+
+ if (info->psci_conduit == QEMU_PSCI_CONDUIT_DISABLED &&
+ info->is_linux && nb_cpus > 1) {
+ /*
+ * We're booting Linux but not using PSCI, so for SMP we need
+ * to write a custom secondary CPU boot loader stub, and arrange
+ * for the secondary CPU reset to make the accompanying initialization.
+ */
+ if (!info->secondary_cpu_reset_hook) {
+ info->secondary_cpu_reset_hook = default_reset_secondary;
+ }
+ if (!info->write_secondary_boot) {
+ info->write_secondary_boot = default_write_secondary;
+ }
+ info->write_secondary_boot(cpu, info);
+ } else {
+ /*
+ * No secondary boot stub; don't use the reset hook that would
+ * have set the CPU up to call it
+ */
+ info->write_secondary_boot = NULL;
+ info->secondary_cpu_reset_hook = NULL;
+ }
+
+ /*
+ * arm_load_dtb() may add a PSCI node so it must be called after we have
+ * decided whether to enable PSCI and set the psci-conduit CPU properties.
+ */
if (!info->skip_dtb_autoload && have_dtb(info)) {
- if (arm_load_dtb(info->dtb_start, info, info->dtb_limit, as) < 0) {
+ if (arm_load_dtb(info->dtb_start, info, info->dtb_limit, as, ms) < 0) {
exit(1);
}
}