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-rw-r--r--hw/a15mpcore.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/hw/a15mpcore.c b/hw/a15mpcore.c
index fc0a02ae86..ffd3d867a3 100644
--- a/hw/a15mpcore.c
+++ b/hw/a15mpcore.c
@@ -19,6 +19,7 @@
*/
#include "sysbus.h"
+#include "kvm.h"
/* A15MP private memory region. */
@@ -41,7 +42,26 @@ static int a15mp_priv_init(SysBusDevice *dev)
A15MPPrivState *s = FROM_SYSBUS(A15MPPrivState, dev);
SysBusDevice *busdev;
- s->gic = qdev_create(NULL, "arm_gic");
+ if (kvm_enabled()) {
+ if (!kvm_irqchip_in_kernel()) {
+ /* KVM A15 which doesn't use the in-kernel VGIC is not
+ * a supported combination, because using the cp15 timers
+ * requires use of the VGIC, and there is no way to hide
+ * the cp15 timers from a guest.
+ */
+ fprintf(stderr, "KVM Cortex-A15 without in-kernel VGIC is not a "
+ "valid configuration. Check that:\n"
+ " * you have passed -machine kernel_irqchip=on to QEMU\n"
+ " * your host kernel was built with CONFIG_KVM_ARM_VGIC\n"
+ " * the device tree passed to your host kernel has a "
+ "valid node for the GIC\n");
+ abort();
+ }
+ s->gic = qdev_create(NULL, "kvm-arm_gic");
+ } else {
+ s->gic = qdev_create(NULL, "arm_gic");
+ }
+
qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(s->gic, "num-irq", s->num_irq);
qdev_prop_set_uint32(s->gic, "revision", 2);