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-rw-r--r--target/arm/cpu.h5
-rw-r--r--target/arm/helper.c9
2 files changed, 6 insertions, 8 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7ccd65bdce..ef0feb228a 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3677,6 +3677,11 @@ static inline bool isar_feature_any_fp16(const ARMISARegisters *id)
return isar_feature_aa64_fp16(id) || isar_feature_aa32_fp16_arith(id);
}
+static inline bool isar_feature_any_predinv(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_predinv(id) || isar_feature_aa32_predinv(id);
+}
+
/*
* Forward to the above feature tests given an ARMCPU pointer.
*/
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d4ed52981f..b3ced7f78b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7721,14 +7721,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
#endif /*CONFIG_USER_ONLY*/
#endif
- /*
- * While all v8.0 cpus support aarch64, QEMU does have configurations
- * that do not set ID_AA64ISAR1, e.g. user-only qemu-arm -cpu max,
- * which will set ID_ISAR6.
- */
- if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)
- ? cpu_isar_feature(aa64_predinv, cpu)
- : cpu_isar_feature(aa32_predinv, cpu)) {
+ if (cpu_isar_feature(any_predinv, cpu)) {
define_arm_cp_regs(cpu, predinv_reginfo);
}