diff options
82 files changed, 1556 insertions, 844 deletions
@@ -232,10 +232,18 @@ KEYCODEMAP_GEN = $(SRC_PATH)/ui/keycodemapdb/tools/keymap-gen KEYCODEMAP_CSV = $(SRC_PATH)/ui/keycodemapdb/data/keymaps.csv KEYCODEMAP_FILES = \ + ui/input-keymap-atset1-to-qcode.c \ ui/input-keymap-linux-to-qcode.c \ ui/input-keymap-qcode-to-qnum.c \ ui/input-keymap-qnum-to-qcode.c \ ui/input-keymap-qcode-to-linux.c \ + ui/input-keymap-usb-to-qcode.c \ + ui/input-keymap-win32-to-qcode.c \ + ui/input-keymap-x11-to-qcode.c \ + ui/input-keymap-xorgevdev-to-qcode.c \ + ui/input-keymap-xorgkbd-to-qcode.c \ + ui/input-keymap-xorgxquartz-to-qcode.c \ + ui/input-keymap-xorgxwin-to-qcode.c \ $(NULL) GENERATED_FILES += $(KEYCODEMAP_FILES) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 8fd84209df..05439039e9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -880,7 +880,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) if (unlikely(env->tlb_table[mmu_idx][index].addr_code != (addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)))) { if (!VICTIM_TLB_HIT(addr_read, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_INST_FETCH, mmu_idx, 0); + tlb_fill(ENV_GET_CPU(env), addr, 0, MMU_INST_FETCH, mmu_idx, 0); } } iotlbentry = &env->iotlb[mmu_idx][index]; @@ -928,7 +928,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) * Otherwise the function will return, and there will be a valid * entry in the TLB for this access. */ -void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, +void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx, uintptr_t retaddr) { int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); @@ -938,7 +938,8 @@ void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { /* TLB entry is for a different page */ if (!VICTIM_TLB_HIT(addr_write, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, size, MMU_DATA_STORE, + mmu_idx, retaddr); } } } @@ -981,7 +982,8 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(addr_write, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, 1 << s_bits, MMU_DATA_STORE, + mmu_idx, retaddr); } tlb_addr = tlbe->addr_write & ~TLB_INVALID_MASK; } @@ -995,7 +997,8 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, /* Let the guest notice RMW on a write-only page. */ if (unlikely(tlbe->addr_read != (tlb_addr & ~TLB_NOTDIRTY))) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_LOAD, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, 1 << s_bits, MMU_DATA_LOAD, + mmu_idx, retaddr); /* Since we don't support reads and writes to different addresses, and we do have the proper page loaded for write, this shouldn't ever return. But just in case, handle via stop-the-world. */ diff --git a/accel/tcg/softmmu_template.h b/accel/tcg/softmmu_template.h index 3fc5144316..239ea6692b 100644 --- a/accel/tcg/softmmu_template.h +++ b/accel/tcg/softmmu_template.h @@ -124,7 +124,7 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(ADDR_READ, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, + tlb_fill(ENV_GET_CPU(env), addr, DATA_SIZE, READ_ACCESS_TYPE, mmu_idx, retaddr); } tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; @@ -191,7 +191,7 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(ADDR_READ, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, + tlb_fill(ENV_GET_CPU(env), addr, DATA_SIZE, READ_ACCESS_TYPE, mmu_idx, retaddr); } tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; @@ -283,7 +283,8 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(addr_write, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, DATA_SIZE, MMU_DATA_STORE, + mmu_idx, retaddr); } tlb_addr = env->tlb_table[mmu_idx][index].addr_write & ~TLB_INVALID_MASK; } @@ -316,7 +317,7 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, tlb_addr2 = env->tlb_table[mmu_idx][index2].addr_write; if (page2 != (tlb_addr2 & (TARGET_PAGE_MASK | TLB_INVALID_MASK)) && !VICTIM_TLB_HIT(addr_write, page2)) { - tlb_fill(ENV_GET_CPU(env), page2, MMU_DATA_STORE, + tlb_fill(ENV_GET_CPU(env), page2, DATA_SIZE, MMU_DATA_STORE, mmu_idx, retaddr); } @@ -359,7 +360,8 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(addr_write, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, DATA_SIZE, MMU_DATA_STORE, + mmu_idx, retaddr); } tlb_addr = env->tlb_table[mmu_idx][index].addr_write & ~TLB_INVALID_MASK; } @@ -392,7 +394,7 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, tlb_addr2 = env->tlb_table[mmu_idx][index2].addr_write; if (page2 != (tlb_addr2 & (TARGET_PAGE_MASK | TLB_INVALID_MASK)) && !VICTIM_TLB_HIT(addr_write, page2)) { - tlb_fill(ENV_GET_CPU(env), page2, MMU_DATA_STORE, + tlb_fill(ENV_GET_CPU(env), page2, DATA_SIZE, MMU_DATA_STORE, mmu_idx, retaddr); } diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index c973752562..a0a4a1924e 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -149,7 +149,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, cc = CPU_GET_CLASS(cpu); /* see if it is an MMU fault */ g_assert(cc->handle_mmu_fault); - ret = cc->handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX); + ret = cc->handle_mmu_fault(cpu, address, 0, is_write, MMU_USER_IDX); if (ret == 0) { /* The MMU fault was handled without causing real CPU fault. @@ -5668,6 +5668,12 @@ if test "$gtkabi" = "2.0"; then echo "WARNING: future releases. Please switch to using GTK 3.0" fi +if test "$sdlabi" = "1.2"; then + echo + echo "WARNING: Use of SDL 1.2 is deprecated and will be removed in" + echo "WARNING: future releases. Please switch to using SDL 2.0" +fi + if test "$supported_cpu" = "no"; then echo echo "WARNING: SUPPORT FOR THIS HOST CPU WILL GO AWAY IN FUTURE RELEASES!" diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx index 54c3e5eac6..ad590a4ffb 100644 --- a/hmp-commands-info.hx +++ b/hmp-commands-info.hx @@ -216,7 +216,7 @@ Show PCI information. ETEXI #if defined(TARGET_I386) || defined(TARGET_SH4) || defined(TARGET_SPARC) || \ - defined(TARGET_PPC) || defined(TARGET_XTENSA) + defined(TARGET_PPC) || defined(TARGET_XTENSA) || defined(TARGET_M68K) { .name = "tlb", .args_type = "", diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b37f7d8d92..e5afd2e6d3 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -253,7 +253,7 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr, hwaddr paddr, int prot, int mmu_idx, target_ulong size); void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr); -void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, +void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx, uintptr_t retaddr); #else static inline void tlb_flush_page(CPUState *cpu, target_ulong addr) @@ -436,8 +436,8 @@ void tb_lock_reset(void); struct MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs); -void tlb_fill(CPUState *cpu, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr); +void tlb_fill(CPUState *cpu, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); #endif diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 93bd546879..aff88fa16f 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -174,7 +174,7 @@ typedef struct CPUClass { Error **errp); void (*set_pc)(CPUState *cpu, vaddr value); void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); - int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw, + int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int size, int rw, int mmu_index); hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 31612caf10..1c925309e3 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -112,6 +112,7 @@ extern const char *keyboard_layout; extern int win2k_install_hack; extern int alt_grab; extern int ctrl_grab; +extern int no_frame; extern int smp_cpus; extern unsigned int max_cpus; extern int cursor_hide; diff --git a/include/ui/console.h b/include/ui/console.h index 580dfc57ee..7b35778444 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -436,7 +436,7 @@ void surface_gl_setup_viewport(QemuGLShader *gls, /* sdl.c */ #ifdef CONFIG_SDL void sdl_display_early_init(int opengl); -void sdl_display_init(DisplayState *ds, int full_screen, int no_frame); +void sdl_display_init(DisplayState *ds, int full_screen); #else static inline void sdl_display_early_init(int opengl) { @@ -444,8 +444,7 @@ static inline void sdl_display_early_init(int opengl) error_report("SDL support is disabled"); abort(); } -static inline void sdl_display_init(DisplayState *ds, int full_screen, - int no_frame) +static inline void sdl_display_init(DisplayState *ds, int full_screen) { /* This must never be called if CONFIG_SDL is disabled */ error_report("SDL support is disabled"); diff --git a/include/ui/input.h b/include/ui/input.h index 5cc76d6e41..05aab2db5c 100644 --- a/include/ui/input.h +++ b/include/ui/input.h @@ -68,6 +68,9 @@ void qemu_input_check_mode_change(void); void qemu_add_mouse_mode_change_notifier(Notifier *notify); void qemu_remove_mouse_mode_change_notifier(Notifier *notify); +extern const guint qemu_input_map_atset1_to_qcode_len; +extern const guint16 qemu_input_map_atset1_to_qcode[]; + extern const guint qemu_input_map_linux_to_qcode_len; extern const guint16 qemu_input_map_linux_to_qcode[]; @@ -80,4 +83,25 @@ extern const guint16 qemu_input_map_qnum_to_qcode[]; extern const guint qemu_input_map_qcode_to_linux_len; extern const guint16 qemu_input_map_qcode_to_linux[]; +extern const guint qemu_input_map_usb_to_qcode_len; +extern const guint16 qemu_input_map_usb_to_qcode[]; + +extern const guint qemu_input_map_win32_to_qcode_len; +extern const guint16 qemu_input_map_win32_to_qcode[]; + +extern const guint qemu_input_map_x11_to_qcode_len; +extern const guint16 qemu_input_map_x11_to_qcode[]; + +extern const guint qemu_input_map_xorgevdev_to_qcode_len; +extern const guint16 qemu_input_map_xorgevdev_to_qcode[]; + +extern const guint qemu_input_map_xorgkbd_to_qcode_len; +extern const guint16 qemu_input_map_xorgkbd_to_qcode[]; + +extern const guint qemu_input_map_xorgxquartz_to_qcode_len; +extern const guint16 qemu_input_map_xorgxquartz_to_qcode[]; + +extern const guint qemu_input_map_xorgxwin_to_qcode_len; +extern const guint16 qemu_input_map_xorgxwin_to_qcode[]; + #endif /* INPUT_H */ diff --git a/qemu-doc.texi b/qemu-doc.texi index 3e9eb819a6..79d08b3f04 100644 --- a/qemu-doc.texi +++ b/qemu-doc.texi @@ -2596,6 +2596,13 @@ and 3.x series APIs. Support for the GTK 2.x builds will be discontinued, so maintainers should switch to using GTK 3.x, which is the default. +@subsection SDL 1.2 + +Previously QEMU has supported building against both SDL 1.2 +and 2.0 series APIs. Support for the SDL 1.2 builds will be +discontinued, so maintainers should switch to using SDL 2.0, +which is the default. + @section System emulator command line arguments @subsection -tdf (since 1.3.0) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 0a9ad35f06..09720c2f3b 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -479,7 +479,7 @@ void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); is returned if the signal was handled by the virtual CPU. */ int cpu_alpha_signal_handler(int host_signum, void *pinfo, void *puc); -int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int); void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t); diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 36407f77f5..bbf72cadfb 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -103,7 +103,7 @@ void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val) } #if defined(CONFIG_USER_ONLY) -int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { AlphaCPU *cpu = ALPHA_CPU(cs); @@ -247,7 +247,7 @@ hwaddr alpha_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) return (fail >= 0 ? -1 : phys); } -int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int rw, +int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size, int rw, int mmu_idx) { AlphaCPU *cpu = ALPHA_CPU(cs); diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c index 430eea470b..e19ab91ec9 100644 --- a/target/alpha/mem_helper.c +++ b/target/alpha/mem_helper.c @@ -69,12 +69,12 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = alpha_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret != 0)) { /* Exception index and error code are already set */ cpu_loop_exit_restore(cs, retaddr); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index cc1856c32b..9da6ea505c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1689,8 +1689,8 @@ static Property arm_cpu_properties[] = { }; #ifdef CONFIG_USER_ONLY -static int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, - int mmu_idx) +static int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, + int rw, int mmu_idx) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index a937e76710..7a88fd2c92 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -169,8 +169,8 @@ static void deliver_fault(ARMCPU *cpu, vaddr addr, MMUAccessType access_type, * NULL, it means that the function was called in C code (i.e. not * from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { bool ret; ARMMMUFaultInfo fi = {}; diff --git a/target/cris/cpu.h b/target/cris/cpu.h index b64fa3542c..764b35cbae 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -283,7 +283,7 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch) return !!(env->pregs[PR_CCS] & U_FLAG); } -int cris_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int cris_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); /* Support function regs. */ diff --git a/target/cris/helper.c b/target/cris/helper.c index af78cca8b9..d2ec349191 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -53,7 +53,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs) cris_cpu_do_interrupt(cs); } -int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { CRISCPU *cpu = CRIS_CPU(cs); @@ -76,7 +76,7 @@ static void cris_shift_ccs(CPUCRISState *env) env->pregs[PR_CCS] = ccs; } -int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { CRISCPU *cpu = CRIS_CPU(cs); diff --git a/target/cris/op_helper.c b/target/cris/op_helper.c index e92505c907..becd831b6b 100644 --- a/target/cris/op_helper.c +++ b/target/cris/op_helper.c @@ -41,8 +41,8 @@ /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { CRISCPU *cpu = CRIS_CPU(cs); CPUCRISState *env = &cpu->env; @@ -50,7 +50,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, env->pc, env->pregs[PR_EDA], (void *)retaddr); - ret = cris_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = cris_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 8d14077763..1a35eae1fa 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -132,7 +132,8 @@ void cpu_hppa_loaded_fr0(CPUHPPAState *env); #define cpu_signal_handler cpu_hppa_signal_handler int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc); -int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int midx); +int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, + int rw, int midx); int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void hppa_cpu_do_interrupt(CPUState *cpu); diff --git a/target/hppa/helper.c b/target/hppa/helper.c index ba04a9a52b..23f7af7018 100644 --- a/target/hppa/helper.c +++ b/target/hppa/helper.c @@ -65,7 +65,7 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw) env->psw_cb = cb; } -int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { HPPACPU *cpu = HPPA_CPU(cs); diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 3104404e8d..fdbf64ae3c 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -139,7 +139,7 @@ static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ulong val, /* Nothing is stored, but protection is checked and the cacheline is marked dirty. */ #ifndef CONFIG_USER_ONLY - probe_write(env, addr, cpu_mmu_index(env, 0), ra); + probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra); #endif break; } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 30cc5628d2..f91e37d25d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1504,7 +1504,7 @@ void host_cpuid(uint32_t function, uint32_t count, void host_vendor_fms(char *vendor, int *family, int *model, int *stepping); /* helper.c */ -int x86_cpu_handle_mmu_fault(CPUState *cpu, vaddr addr, +int x86_cpu_handle_mmu_fault(CPUState *cpu, vaddr addr, int size, int is_write, int mmu_idx); void x86_cpu_set_a20(X86CPU *cpu, int a20_state); diff --git a/target/i386/excp_helper.c b/target/i386/excp_helper.c index cef44495ab..cb4d1b7d33 100644 --- a/target/i386/excp_helper.c +++ b/target/i386/excp_helper.c @@ -138,7 +138,7 @@ void raise_exception_ra(CPUX86State *env, int exception_index, uintptr_t retaddr } #if defined(CONFIG_USER_ONLY) -int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, +int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size, int is_write, int mmu_idx) { X86CPU *cpu = X86_CPU(cs); @@ -162,7 +162,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, * 0 = nothing more to do * 1 = generate PF fault */ -int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, +int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size, int is_write1, int mmu_idx) { X86CPU *cpu = X86_CPU(cs); diff --git a/target/i386/mem_helper.c b/target/i386/mem_helper.c index 70f67668ab..a8ae694a9c 100644 --- a/target/i386/mem_helper.c +++ b/target/i386/mem_helper.c @@ -199,12 +199,12 @@ void helper_boundl(CPUX86State *env, target_ulong a0, int v) * from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = x86_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = x86_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (ret) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 2279594f40..ce0a2f24c4 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -263,7 +263,7 @@ bool lm32_cpu_do_semihosting(CPUState *cs); #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler -int lm32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int lm32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); #include "exec/cpu-all.h" diff --git a/target/lm32/helper.c b/target/lm32/helper.c index 929cc36c14..a039a993ff 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -25,7 +25,7 @@ #include "exec/semihost.h" #include "exec/log.h" -int lm32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int lm32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { LM32CPU *cpu = LM32_CPU(cs); diff --git a/target/lm32/op_helper.c b/target/lm32/op_helper.c index 30f670eee8..577f8306e3 100644 --- a/target/lm32/op_helper.c +++ b/target/lm32/op_helper.c @@ -144,12 +144,12 @@ uint32_t HELPER(rcsr_jrx)(CPULM32State *env) * NULL, it means that the function was called in C code (i.e. not * from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = lm32_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 03126ba543..98919b358b 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -269,9 +269,9 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->set_pc = m68k_cpu_set_pc; cc->gdb_read_register = m68k_cpu_gdb_read_register; cc->gdb_write_register = m68k_cpu_gdb_write_register; -#ifdef CONFIG_USER_ONLY cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault; -#else +#if defined(CONFIG_SOFTMMU) + cc->do_unassigned_access = m68k_cpu_unassigned_access; cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; #endif cc->disas_set_info = m68k_cpu_disas_set_info; diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 2985b039e1..627fb787b6 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -76,6 +76,14 @@ #define EXCP_RTE 0x100 #define EXCP_HALT_INSN 0x101 +#define M68K_DTTR0 0 +#define M68K_DTTR1 1 +#define M68K_ITTR0 2 +#define M68K_ITTR1 3 + +#define M68K_MAX_TTR 2 +#define TTR(type, index) ttr[((type & ACCESS_CODE) == ACCESS_CODE) * 2 + index] + #define NB_MMU_MODES 2 #define TARGET_INSN_START_EXTRA_WORDS 1 @@ -116,6 +124,14 @@ typedef struct CPUM68KState { /* MMU status. */ struct { uint32_t ar; + uint32_t ssw; + /* 68040 */ + uint16_t tcr; + uint32_t urp; + uint32_t srp; + bool fault; + uint32_t ttr[4]; + uint32_t mmusr; } mmu; /* Control registers. */ @@ -123,6 +139,8 @@ typedef struct CPUM68KState { uint32_t mbar; uint32_t rambar0; uint32_t cacr; + uint32_t sfc; + uint32_t dfc; int pending_vector; int pending_level; @@ -226,6 +244,104 @@ typedef enum { #define M68K_USP 1 #define M68K_ISP 2 +/* bits for 68040 special status word */ +#define M68K_CP_040 0x8000 +#define M68K_CU_040 0x4000 +#define M68K_CT_040 0x2000 +#define M68K_CM_040 0x1000 +#define M68K_MA_040 0x0800 +#define M68K_ATC_040 0x0400 +#define M68K_LK_040 0x0200 +#define M68K_RW_040 0x0100 +#define M68K_SIZ_040 0x0060 +#define M68K_TT_040 0x0018 +#define M68K_TM_040 0x0007 + +#define M68K_TM_040_DATA 0x0001 +#define M68K_TM_040_CODE 0x0002 +#define M68K_TM_040_SUPER 0x0004 + +/* bits for 68040 write back status word */ +#define M68K_WBV_040 0x80 +#define M68K_WBSIZ_040 0x60 +#define M68K_WBBYT_040 0x20 +#define M68K_WBWRD_040 0x40 +#define M68K_WBLNG_040 0x00 +#define M68K_WBTT_040 0x18 +#define M68K_WBTM_040 0x07 + +/* bus access size codes */ +#define M68K_BA_SIZE_MASK 0x60 +#define M68K_BA_SIZE_BYTE 0x20 +#define M68K_BA_SIZE_WORD 0x40 +#define M68K_BA_SIZE_LONG 0x00 +#define M68K_BA_SIZE_LINE 0x60 + +/* bus access transfer type codes */ +#define M68K_BA_TT_MOVE16 0x08 + +/* bits for 68040 MMU status register (mmusr) */ +#define M68K_MMU_B_040 0x0800 +#define M68K_MMU_G_040 0x0400 +#define M68K_MMU_U1_040 0x0200 +#define M68K_MMU_U0_040 0x0100 +#define M68K_MMU_S_040 0x0080 +#define M68K_MMU_CM_040 0x0060 +#define M68K_MMU_M_040 0x0010 +#define M68K_MMU_WP_040 0x0004 +#define M68K_MMU_T_040 0x0002 +#define M68K_MMU_R_040 0x0001 + +#define M68K_MMU_SR_MASK_040 (M68K_MMU_G_040 | M68K_MMU_U1_040 | \ + M68K_MMU_U0_040 | M68K_MMU_S_040 | \ + M68K_MMU_CM_040 | M68K_MMU_M_040 | \ + M68K_MMU_WP_040) + +/* bits for 68040 MMU Translation Control Register */ +#define M68K_TCR_ENABLED 0x8000 +#define M68K_TCR_PAGE_8K 0x4000 + +/* bits for 68040 MMU Table Descriptor / Page Descriptor / TTR */ +#define M68K_DESC_WRITEPROT 0x00000004 +#define M68K_DESC_USED 0x00000008 +#define M68K_DESC_MODIFIED 0x00000010 +#define M68K_DESC_CACHEMODE 0x00000060 +#define M68K_DESC_CM_WRTHRU 0x00000000 +#define M68K_DESC_CM_COPYBK 0x00000020 +#define M68K_DESC_CM_SERIAL 0x00000040 +#define M68K_DESC_CM_NCACHE 0x00000060 +#define M68K_DESC_SUPERONLY 0x00000080 +#define M68K_DESC_USERATTR 0x00000300 +#define M68K_DESC_USERATTR_SHIFT 8 +#define M68K_DESC_GLOBAL 0x00000400 +#define M68K_DESC_URESERVED 0x00000800 + +#define M68K_ROOT_POINTER_ENTRIES 128 +#define M68K_4K_PAGE_MASK (~0xff) +#define M68K_POINTER_BASE(entry) (entry & ~0x1ff) +#define M68K_ROOT_INDEX(addr) ((address >> 23) & 0x1fc) +#define M68K_POINTER_INDEX(addr) ((address >> 16) & 0x1fc) +#define M68K_4K_PAGE_BASE(entry) (next & M68K_4K_PAGE_MASK) +#define M68K_4K_PAGE_INDEX(addr) ((address >> 10) & 0xfc) +#define M68K_8K_PAGE_MASK (~0x7f) +#define M68K_8K_PAGE_BASE(entry) (next & M68K_8K_PAGE_MASK) +#define M68K_8K_PAGE_INDEX(addr) ((address >> 11) & 0x7c) +#define M68K_UDT_VALID(entry) (entry & 2) +#define M68K_PDT_VALID(entry) (entry & 3) +#define M68K_PDT_INDIRECT(entry) ((entry & 3) == 2) +#define M68K_INDIRECT_POINTER(addr) (addr & ~3) +#define M68K_TTS_POINTER_SHIFT 18 +#define M68K_TTS_ROOT_SHIFT 25 + +/* bits for 68040 MMU Transparent Translation Registers */ +#define M68K_TTR_ADDR_BASE 0xff000000 +#define M68K_TTR_ADDR_MASK 0x00ff0000 +#define M68K_TTR_ADDR_MASK_SHIFT 8 +#define M68K_TTR_ENABLED 0x00008000 +#define M68K_TTR_SFIELD 0x00006000 +#define M68K_TTR_SFIELD_USER 0x0000 +#define M68K_TTR_SFIELD_SUPER 0x2000 + /* m68k Control Registers */ /* ColdFire */ @@ -387,16 +503,25 @@ void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf); void register_m68k_insns (CPUM68KState *env); -#ifdef CONFIG_USER_ONLY /* Coldfire Linux uses 8k pages * and m68k linux uses 4k pages - * use the smaller one + * use the smallest one */ #define TARGET_PAGE_BITS 12 -#else -/* Smallest TLB entry size is 1k. */ -#define TARGET_PAGE_BITS 10 -#endif + +enum { + /* 1 bit to define user level / supervisor access */ + ACCESS_SUPER = 0x01, + /* 1 bit to indicate direction */ + ACCESS_STORE = 0x02, + /* 1 bit to indicate debug access */ + ACCESS_DEBUG = 0x04, + /* PTEST instruction */ + ACCESS_PTEST = 0x08, + /* Type of instruction that generated the access */ + ACCESS_CODE = 0x10, /* Code fetch access */ + ACCESS_DATA = 0x20, /* Data load/store access */ +}; #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 @@ -412,24 +537,42 @@ void register_m68k_insns (CPUM68KState *env); /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel #define MMU_MODE1_SUFFIX _user +#define MMU_KERNEL_IDX 0 #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch) { return (env->sr & SR_S) == 0 ? 1 : 0; } -int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); +void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, + bool is_write, bool is_exec, int is_asi, + unsigned size); #include "exec/cpu-all.h" +/* TB flags */ +#define TB_FLAGS_MACSR 0x0f +#define TB_FLAGS_MSR_S_BIT 13 +#define TB_FLAGS_MSR_S (1 << TB_FLAGS_MSR_S_BIT) +#define TB_FLAGS_SFC_S_BIT 14 +#define TB_FLAGS_SFC_S (1 << TB_FLAGS_SFC_S_BIT) +#define TB_FLAGS_DFC_S_BIT 15 +#define TB_FLAGS_DFC_S (1 << TB_FLAGS_DFC_S_BIT) + static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) { *pc = env->pc; *cs_base = 0; - *flags = (env->sr & SR_S) /* Bit 13 */ - | ((env->macsr >> 4) & 0xf); /* Bits 0-3 */ + *flags = (env->macsr >> 4) & TB_FLAGS_MACSR; + if (env->sr & SR_S) { + *flags |= TB_FLAGS_MSR_S; + *flags |= (env->sfc << (TB_FLAGS_SFC_S_BIT - 2)) & TB_FLAGS_SFC_S; + *flags |= (env->dfc << (TB_FLAGS_DFC_S_BIT - 2)) & TB_FLAGS_DFC_S; + } } +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUM68KState *env); #endif diff --git a/target/m68k/helper.c b/target/m68k/helper.c index a999389e9a..20155c7801 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -203,6 +203,12 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) switch (reg) { /* MC680[1234]0 */ + case M68K_CR_SFC: + env->sfc = val & 7; + return; + case M68K_CR_DFC: + env->dfc = val & 7; + return; case M68K_CR_VBR: env->vbr = val; return; @@ -212,6 +218,18 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) m68k_switch_sp(env); return; /* MC680[34]0 */ + case M68K_CR_TC: + env->mmu.tcr = val; + return; + case M68K_CR_MMUSR: + env->mmu.mmusr = val; + return; + case M68K_CR_SRP: + env->mmu.srp = val; + return; + case M68K_CR_URP: + env->mmu.urp = val; + return; case M68K_CR_USP: env->sp[M68K_USP] = val; return; @@ -221,6 +239,19 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) case M68K_CR_ISP: env->sp[M68K_ISP] = val; return; + /* MC68040/MC68LC040 */ + case M68K_CR_ITT0: + env->mmu.ttr[M68K_ITTR0] = val; + return; + case M68K_CR_ITT1: + env->mmu.ttr[M68K_ITTR1] = val; + return; + case M68K_CR_DTT0: + env->mmu.ttr[M68K_DTTR0] = val; + return; + case M68K_CR_DTT1: + env->mmu.ttr[M68K_DTTR1] = val; + return; } cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n", reg, val); @@ -232,18 +263,39 @@ uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg) switch (reg) { /* MC680[1234]0 */ + case M68K_CR_SFC: + return env->sfc; + case M68K_CR_DFC: + return env->dfc; case M68K_CR_VBR: return env->vbr; /* MC680[234]0 */ case M68K_CR_CACR: return env->cacr; /* MC680[34]0 */ + case M68K_CR_TC: + return env->mmu.tcr; + case M68K_CR_MMUSR: + return env->mmu.mmusr; + case M68K_CR_SRP: + return env->mmu.srp; case M68K_CR_USP: return env->sp[M68K_USP]; case M68K_CR_MSP: return env->sp[M68K_SSP]; case M68K_CR_ISP: return env->sp[M68K_ISP]; + /* MC68040/MC68LC040 */ + case M68K_CR_URP: + return env->mmu.urp; + case M68K_CR_ITT0: + return env->mmu.ttr[M68K_ITTR0]; + case M68K_CR_ITT1: + return env->mmu.ttr[M68K_ITTR1]; + case M68K_CR_DTT0: + return env->mmu.ttr[M68K_DTTR0]; + case M68K_CR_DTT1: + return env->mmu.ttr[M68K_DTTR1]; } cpu_abort(CPU(cpu), "Unimplemented control register read 0x%x\n", reg); @@ -308,7 +360,7 @@ void m68k_switch_sp(CPUM68KState *env) #if defined(CONFIG_USER_ONLY) -int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { M68kCPU *cpu = M68K_CPU(cs); @@ -320,23 +372,507 @@ int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, #else -/* MMU */ +/* MMU: 68040 only */ + +static void print_address_zone(FILE *f, fprintf_function cpu_fprintf, + uint32_t logical, uint32_t physical, + uint32_t size, int attr) +{ + cpu_fprintf(f, "%08x - %08x -> %08x - %08x %c ", + logical, logical + size - 1, + physical, physical + size - 1, + attr & 4 ? 'W' : '-'); + size >>= 10; + if (size < 1024) { + cpu_fprintf(f, "(%d KiB)\n", size); + } else { + size >>= 10; + if (size < 1024) { + cpu_fprintf(f, "(%d MiB)\n", size); + } else { + size >>= 10; + cpu_fprintf(f, "(%d GiB)\n", size); + } + } +} + +static void dump_address_map(FILE *f, fprintf_function cpu_fprintf, + CPUM68KState *env, uint32_t root_pointer) +{ + int i, j, k; + int tic_size, tic_shift; + uint32_t tib_mask; + uint32_t tia, tib, tic; + uint32_t logical = 0xffffffff, physical = 0xffffffff; + uint32_t first_logical = 0xffffffff, first_physical = 0xffffffff; + uint32_t last_logical, last_physical; + int32_t size; + int last_attr = -1, attr = -1; + M68kCPU *cpu = m68k_env_get_cpu(env); + CPUState *cs = CPU(cpu); + + if (env->mmu.tcr & M68K_TCR_PAGE_8K) { + /* 8k page */ + tic_size = 32; + tic_shift = 13; + tib_mask = M68K_8K_PAGE_MASK; + } else { + /* 4k page */ + tic_size = 64; + tic_shift = 12; + tib_mask = M68K_4K_PAGE_MASK; + } + for (i = 0; i < M68K_ROOT_POINTER_ENTRIES; i++) { + tia = ldl_phys(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4); + if (!M68K_UDT_VALID(tia)) { + continue; + } + for (j = 0; j < M68K_ROOT_POINTER_ENTRIES; j++) { + tib = ldl_phys(cs->as, M68K_POINTER_BASE(tia) + j * 4); + if (!M68K_UDT_VALID(tib)) { + continue; + } + for (k = 0; k < tic_size; k++) { + tic = ldl_phys(cs->as, (tib & tib_mask) + k * 4); + if (!M68K_PDT_VALID(tic)) { + continue; + } + if (M68K_PDT_INDIRECT(tic)) { + tic = ldl_phys(cs->as, M68K_INDIRECT_POINTER(tic)); + } + + last_logical = logical; + logical = (i << M68K_TTS_ROOT_SHIFT) | + (j << M68K_TTS_POINTER_SHIFT) | + (k << tic_shift); + + last_physical = physical; + physical = tic & ~((1 << tic_shift) - 1); + + last_attr = attr; + attr = tic & ((1 << tic_shift) - 1); + + if ((logical != (last_logical + (1 << tic_shift))) || + (physical != (last_physical + (1 << tic_shift))) || + (attr & 4) != (last_attr & 4)) { + + if (first_logical != 0xffffffff) { + size = last_logical + (1 << tic_shift) - + first_logical; + print_address_zone(f, cpu_fprintf, first_logical, + first_physical, size, last_attr); + } + first_logical = logical; + first_physical = physical; + } + } + } + } + if (first_logical != logical || (attr & 4) != (last_attr & 4)) { + size = logical + (1 << tic_shift) - first_logical; + print_address_zone(f, cpu_fprintf, first_logical, first_physical, size, + last_attr); + } +} + +#define DUMP_CACHEFLAGS(a) \ + switch (a & M68K_DESC_CACHEMODE) { \ + case M68K_DESC_CM_WRTHRU: /* cachable, write-through */ \ + cpu_fprintf(f, "T"); \ + break; \ + case M68K_DESC_CM_COPYBK: /* cachable, copyback */ \ + cpu_fprintf(f, "C"); \ + break; \ + case M68K_DESC_CM_SERIAL: /* noncachable, serialized */ \ + cpu_fprintf(f, "S"); \ + break; \ + case M68K_DESC_CM_NCACHE: /* noncachable */ \ + cpu_fprintf(f, "N"); \ + break; \ + } + +static void dump_ttr(FILE *f, fprintf_function cpu_fprintf, uint32_t ttr) +{ + if ((ttr & M68K_TTR_ENABLED) == 0) { + cpu_fprintf(f, "disabled\n"); + return; + } + cpu_fprintf(f, "Base: 0x%08x Mask: 0x%08x Control: ", + ttr & M68K_TTR_ADDR_BASE, + (ttr & M68K_TTR_ADDR_MASK) << M68K_TTR_ADDR_MASK_SHIFT); + switch (ttr & M68K_TTR_SFIELD) { + case M68K_TTR_SFIELD_USER: + cpu_fprintf(f, "U"); + break; + case M68K_TTR_SFIELD_SUPER: + cpu_fprintf(f, "S"); + break; + default: + cpu_fprintf(f, "*"); + break; + } + DUMP_CACHEFLAGS(ttr); + if (ttr & M68K_DESC_WRITEPROT) { + cpu_fprintf(f, "R"); + } else { + cpu_fprintf(f, "W"); + } + cpu_fprintf(f, " U: %d\n", (ttr & M68K_DESC_USERATTR) >> + M68K_DESC_USERATTR_SHIFT); +} + +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUM68KState *env) +{ + if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { + cpu_fprintf(f, "Translation disabled\n"); + return; + } + cpu_fprintf(f, "Page Size: "); + if (env->mmu.tcr & M68K_TCR_PAGE_8K) { + cpu_fprintf(f, "8kB\n"); + } else { + cpu_fprintf(f, "4kB\n"); + } + + cpu_fprintf(f, "MMUSR: "); + if (env->mmu.mmusr & M68K_MMU_B_040) { + cpu_fprintf(f, "BUS ERROR\n"); + } else { + cpu_fprintf(f, "Phy=%08x Flags: ", env->mmu.mmusr & 0xfffff000); + /* flags found on the page descriptor */ + if (env->mmu.mmusr & M68K_MMU_G_040) { + cpu_fprintf(f, "G"); /* Global */ + } else { + cpu_fprintf(f, "."); + } + if (env->mmu.mmusr & M68K_MMU_S_040) { + cpu_fprintf(f, "S"); /* Supervisor */ + } else { + cpu_fprintf(f, "."); + } + if (env->mmu.mmusr & M68K_MMU_M_040) { + cpu_fprintf(f, "M"); /* Modified */ + } else { + cpu_fprintf(f, "."); + } + if (env->mmu.mmusr & M68K_MMU_WP_040) { + cpu_fprintf(f, "W"); /* Write protect */ + } else { + cpu_fprintf(f, "."); + } + if (env->mmu.mmusr & M68K_MMU_T_040) { + cpu_fprintf(f, "T"); /* Transparent */ + } else { + cpu_fprintf(f, "."); + } + if (env->mmu.mmusr & M68K_MMU_R_040) { + cpu_fprintf(f, "R"); /* Resident */ + } else { + cpu_fprintf(f, "."); + } + cpu_fprintf(f, " Cache: "); + DUMP_CACHEFLAGS(env->mmu.mmusr); + cpu_fprintf(f, " U: %d\n", (env->mmu.mmusr >> 8) & 3); + cpu_fprintf(f, "\n"); + } + + cpu_fprintf(f, "ITTR0: "); + dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_ITTR0]); + cpu_fprintf(f, "ITTR1: "); + dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_ITTR1]); + cpu_fprintf(f, "DTTR0: "); + dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_DTTR0]); + cpu_fprintf(f, "DTTR1: "); + dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_DTTR1]); + + cpu_fprintf(f, "SRP: 0x%08x\n", env->mmu.srp); + dump_address_map(f, cpu_fprintf, env, env->mmu.srp); + + cpu_fprintf(f, "URP: 0x%08x\n", env->mmu.urp); + dump_address_map(f, cpu_fprintf, env, env->mmu.urp); +} + +static int check_TTR(uint32_t ttr, int *prot, target_ulong addr, + int access_type) +{ + uint32_t base, mask; + + /* check if transparent translation is enabled */ + if ((ttr & M68K_TTR_ENABLED) == 0) { + return 0; + } + + /* check mode access */ + switch (ttr & M68K_TTR_SFIELD) { + case M68K_TTR_SFIELD_USER: + /* match only if user */ + if ((access_type & ACCESS_SUPER) != 0) { + return 0; + } + break; + case M68K_TTR_SFIELD_SUPER: + /* match only if supervisor */ + if ((access_type & ACCESS_SUPER) == 0) { + return 0; + } + break; + default: + /* all other values disable mode matching (FC2) */ + break; + } + + /* check address matching */ + + base = ttr & M68K_TTR_ADDR_BASE; + mask = (ttr & M68K_TTR_ADDR_MASK) ^ M68K_TTR_ADDR_MASK; + mask <<= M68K_TTR_ADDR_MASK_SHIFT; + + if ((addr & mask) != (base & mask)) { + return 0; + } + + *prot = PAGE_READ | PAGE_EXEC; + if ((ttr & M68K_DESC_WRITEPROT) == 0) { + *prot |= PAGE_WRITE; + } + + return 1; +} + +static int get_physical_address(CPUM68KState *env, hwaddr *physical, + int *prot, target_ulong address, + int access_type, target_ulong *page_size) +{ + M68kCPU *cpu = m68k_env_get_cpu(env); + CPUState *cs = CPU(cpu); + uint32_t entry; + uint32_t next; + target_ulong page_mask; + bool debug = access_type & ACCESS_DEBUG; + int page_bits; + int i; + + /* Transparent Translation (physical = logical) */ + for (i = 0; i < M68K_MAX_TTR; i++) { + if (check_TTR(env->mmu.TTR(access_type, i), + prot, address, access_type)) { + if (access_type & ACCESS_PTEST) { + /* Transparent Translation Register bit */ + env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040; + } + *physical = address & TARGET_PAGE_MASK; + *page_size = TARGET_PAGE_SIZE; + return 0; + } + } + + /* Page Table Root Pointer */ + *prot = PAGE_READ | PAGE_WRITE; + if (access_type & ACCESS_CODE) { + *prot |= PAGE_EXEC; + } + if (access_type & ACCESS_SUPER) { + next = env->mmu.srp; + } else { + next = env->mmu.urp; + } + + /* Root Index */ + entry = M68K_POINTER_BASE(next) | M68K_ROOT_INDEX(address); + + next = ldl_phys(cs->as, entry); + if (!M68K_UDT_VALID(next)) { + return -1; + } + if (!(next & M68K_DESC_USED) && !debug) { + stl_phys(cs->as, entry, next | M68K_DESC_USED); + } + if (next & M68K_DESC_WRITEPROT) { + if (access_type & ACCESS_PTEST) { + env->mmu.mmusr |= M68K_MMU_WP_040; + } + *prot &= ~PAGE_WRITE; + if (access_type & ACCESS_STORE) { + return -1; + } + } + + /* Pointer Index */ + entry = M68K_POINTER_BASE(next) | M68K_POINTER_INDEX(address); + + next = ldl_phys(cs->as, entry); + if (!M68K_UDT_VALID(next)) { + return -1; + } + if (!(next & M68K_DESC_USED) && !debug) { + stl_phys(cs->as, entry, next | M68K_DESC_USED); + } + if (next & M68K_DESC_WRITEPROT) { + if (access_type & ACCESS_PTEST) { + env->mmu.mmusr |= M68K_MMU_WP_040; + } + *prot &= ~PAGE_WRITE; + if (access_type & ACCESS_STORE) { + return -1; + } + } + + /* Page Index */ + if (env->mmu.tcr & M68K_TCR_PAGE_8K) { + entry = M68K_8K_PAGE_BASE(next) | M68K_8K_PAGE_INDEX(address); + } else { + entry = M68K_4K_PAGE_BASE(next) | M68K_4K_PAGE_INDEX(address); + } + + next = ldl_phys(cs->as, entry); + + if (!M68K_PDT_VALID(next)) { + return -1; + } + if (M68K_PDT_INDIRECT(next)) { + next = ldl_phys(cs->as, M68K_INDIRECT_POINTER(next)); + } + if (access_type & ACCESS_STORE) { + if (next & M68K_DESC_WRITEPROT) { + if (!(next & M68K_DESC_USED) && !debug) { + stl_phys(cs->as, entry, next | M68K_DESC_USED); + } + } else if ((next & (M68K_DESC_MODIFIED | M68K_DESC_USED)) != + (M68K_DESC_MODIFIED | M68K_DESC_USED) && !debug) { + stl_phys(cs->as, entry, + next | (M68K_DESC_MODIFIED | M68K_DESC_USED)); + } + } else { + if (!(next & M68K_DESC_USED) && !debug) { + stl_phys(cs->as, entry, next | M68K_DESC_USED); + } + } + + if (env->mmu.tcr & M68K_TCR_PAGE_8K) { + page_bits = 13; + } else { + page_bits = 12; + } + *page_size = 1 << page_bits; + page_mask = ~(*page_size - 1); + *physical = next & page_mask; + + if (access_type & ACCESS_PTEST) { + env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040; + env->mmu.mmusr |= *physical & 0xfffff000; + env->mmu.mmusr |= M68K_MMU_R_040; + } + + if (next & M68K_DESC_WRITEPROT) { + *prot &= ~PAGE_WRITE; + if (access_type & ACCESS_STORE) { + return -1; + } + } + if (next & M68K_DESC_SUPERONLY) { + if ((access_type & ACCESS_SUPER) == 0) { + return -1; + } + } + + return 0; +} -/* TODO: This will need fixing once the MMU is implemented. */ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { - return addr; + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + hwaddr phys_addr; + int prot; + int access_type; + target_ulong page_size; + + if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { + /* MMU disabled */ + return addr; + } + + access_type = ACCESS_DATA | ACCESS_DEBUG; + if (env->sr & SR_S) { + access_type |= ACCESS_SUPER; + } + if (get_physical_address(env, &phys_addr, &prot, + addr, access_type, &page_size) != 0) { + return -1; + } + return phys_addr; } -int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + hwaddr physical; int prot; + int access_type; + int ret; + target_ulong page_size; + + if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { + /* MMU disabled */ + tlb_set_page(cs, address & TARGET_PAGE_MASK, + address & TARGET_PAGE_MASK, + PAGE_READ | PAGE_WRITE | PAGE_EXEC, + mmu_idx, TARGET_PAGE_SIZE); + return 0; + } - address &= TARGET_PAGE_MASK; - prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; - tlb_set_page(cs, address, address, prot, mmu_idx, TARGET_PAGE_SIZE); - return 0; + if (rw == 2) { + access_type = ACCESS_CODE; + rw = 0; + } else { + access_type = ACCESS_DATA; + if (rw) { + access_type |= ACCESS_STORE; + } + } + + if (mmu_idx != MMU_USER_IDX) { + access_type |= ACCESS_SUPER; + } + + ret = get_physical_address(&cpu->env, &physical, &prot, + address, access_type, &page_size); + if (ret == 0) { + address &= TARGET_PAGE_MASK; + physical += address & (page_size - 1); + tlb_set_page(cs, address, physical, + prot, mmu_idx, TARGET_PAGE_SIZE); + return 0; + } + /* page fault */ + env->mmu.ssw = M68K_ATC_040; + switch (size) { + case 1: + env->mmu.ssw |= M68K_BA_SIZE_BYTE; + break; + case 2: + env->mmu.ssw |= M68K_BA_SIZE_WORD; + break; + case 4: + env->mmu.ssw |= M68K_BA_SIZE_LONG; + break; + } + if (access_type & ACCESS_SUPER) { + env->mmu.ssw |= M68K_TM_040_SUPER; + } + if (access_type & ACCESS_CODE) { + env->mmu.ssw |= M68K_TM_040_CODE; + } else { + env->mmu.ssw |= M68K_TM_040_DATA; + } + if (!(access_type & ACCESS_STORE)) { + env->mmu.ssw |= M68K_RW_040; + } + env->mmu.ar = address; + cs->exception_index = EXCP_ACCESS; + return 1; } /* Notify CPU of a pending interrupt. Prioritization and vectoring should @@ -781,6 +1317,58 @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc) } #if defined(CONFIG_SOFTMMU) +void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read) +{ + M68kCPU *cpu = m68k_env_get_cpu(env); + CPUState *cs = CPU(cpu); + hwaddr physical; + int access_type; + int prot; + int ret; + target_ulong page_size; + + access_type = ACCESS_PTEST; + if (env->dfc & 4) { + access_type |= ACCESS_SUPER; + } + if ((env->dfc & 3) == 2) { + access_type |= ACCESS_CODE; + } + if (!is_read) { + access_type |= ACCESS_STORE; + } + + env->mmu.mmusr = 0; + env->mmu.ssw = 0; + ret = get_physical_address(env, &physical, &prot, addr, + access_type, &page_size); + if (ret == 0) { + addr &= TARGET_PAGE_MASK; + physical += addr & (page_size - 1); + tlb_set_page(cs, addr, physical, + prot, access_type & ACCESS_SUPER ? + MMU_KERNEL_IDX : MMU_USER_IDX, page_size); + } +} + +void HELPER(pflush)(CPUM68KState *env, uint32_t addr, uint32_t opmode) +{ + M68kCPU *cpu = m68k_env_get_cpu(env); + + switch (opmode) { + case 0: /* Flush page entry if not global */ + case 1: /* Flush page entry */ + tlb_flush_page(CPU(cpu), addr); + break; + case 2: /* Flush all except global entries */ + tlb_flush(CPU(cpu)); + break; + case 3: /* Flush all entries */ + tlb_flush(CPU(cpu)); + break; + } +} + void HELPER(reset)(CPUM68KState *env) { /* FIXME: reset all except CPU */ diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 57f210aa14..7f400f0def 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -101,5 +101,7 @@ DEF_HELPER_3(chk, void, env, s32, s32) DEF_HELPER_4(chk2, void, env, s32, s32, s32) #if defined(CONFIG_SOFTMMU) +DEF_HELPER_3(ptest, void, env, i32, i32) +DEF_HELPER_3(pflush, void, env, i32, i32) DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env) #endif diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c index 52781e85f0..db582a34ac 100644 --- a/target/m68k/monitor.c +++ b/target/m68k/monitor.c @@ -8,6 +8,19 @@ #include "qemu/osdep.h" #include "cpu.h" #include "monitor/hmp-target.h" +#include "monitor/monitor.h" + +void hmp_info_tlb(Monitor *mon, const QDict *qdict) +{ + CPUArchState *env1 = mon_get_cpu_env(); + + if (!env1) { + monitor_printf(mon, "No CPU available\n"); + return; + } + + dump_mmu((FILE *)mon, (fprintf_function)monitor_printf, env1); +} static const MonitorDef monitor_defs[] = { { "d0", offsetof(CPUM68KState, dregs[0]) }, @@ -31,6 +44,15 @@ static const MonitorDef monitor_defs[] = { { "ssp", offsetof(CPUM68KState, sp[0]) }, { "usp", offsetof(CPUM68KState, sp[1]) }, { "isp", offsetof(CPUM68KState, sp[2]) }, + { "sfc", offsetof(CPUM68KState, sfc) }, + { "dfc", offsetof(CPUM68KState, dfc) }, + { "urp", offsetof(CPUM68KState, mmu.urp) }, + { "srp", offsetof(CPUM68KState, mmu.srp) }, + { "dttr0", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR0]) }, + { "dttr1", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR1]) }, + { "ittr0", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR0]) }, + { "ittr1", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR1]) }, + { "mmusr", offsetof(CPUM68KState, mmu.mmusr) }, { NULL }, }; diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index c61ca9392f..ffea9693fc 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -39,12 +39,12 @@ static inline void do_interrupt_m68k_hardirq(CPUM68KState *env) /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = m68k_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); @@ -360,7 +360,49 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) sp = env->aregs[7]; sp &= ~1; - if (cs->exception_index == EXCP_ADDRESS) { + if (cs->exception_index == EXCP_ACCESS) { + if (env->mmu.fault) { + cpu_abort(cs, "DOUBLE MMU FAULT\n"); + } + env->mmu.fault = true; + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* push data 3 */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* push data 2 */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* push data 1 */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* write back 1 / push data 0 */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* write back 1 address */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* write back 2 data */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* write back 2 address */ + sp -= 4; + cpu_stl_kernel(env, sp, 0); /* write back 3 data */ + sp -= 4; + cpu_stl_kernel(env, sp, env->mmu.ar); /* write back 3 address */ + sp -= 4; + cpu_stl_kernel(env, sp, env->mmu.ar); /* fault address */ + sp -= 2; + cpu_stw_kernel(env, sp, 0); /* write back 1 status */ + sp -= 2; + cpu_stw_kernel(env, sp, 0); /* write back 2 status */ + sp -= 2; + cpu_stw_kernel(env, sp, 0); /* write back 3 status */ + sp -= 2; + cpu_stw_kernel(env, sp, env->mmu.ssw); /* special status word */ + sp -= 4; + cpu_stl_kernel(env, sp, env->mmu.ar); /* effective address */ + do_stack_frame(env, &sp, 7, oldsr, 0, retaddr); + env->mmu.fault = false; + if (qemu_loglevel_mask(CPU_LOG_INT)) { + qemu_log(" " + "ssw: %08x ea: %08x sfc: %d dfc: %d\n", + env->mmu.ssw, env->mmu.ar, env->sfc, env->dfc); + } + } else if (cs->exception_index == EXCP_ADDRESS) { do_stack_frame(env, &sp, 2, oldsr, 0, retaddr); } else if (cs->exception_index == EXCP_ILLEGAL || cs->exception_index == EXCP_DIV0 || @@ -408,6 +450,57 @@ static inline void do_interrupt_m68k_hardirq(CPUM68KState *env) { do_interrupt_all(env, 1); } + +void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write, + bool is_exec, int is_asi, unsigned size) +{ + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; +#ifdef DEBUG_UNASSIGNED + qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=%d exe=%d\n", + addr, is_write, is_exec); +#endif + if (env == NULL) { + /* when called from gdb, env is NULL */ + return; + } + + if (m68k_feature(env, M68K_FEATURE_M68040)) { + env->mmu.mmusr = 0; + env->mmu.ssw |= M68K_ATC_040; + /* FIXME: manage MMU table access error */ + env->mmu.ssw &= ~M68K_TM_040; + if (env->sr & SR_S) { /* SUPERVISOR */ + env->mmu.ssw |= M68K_TM_040_SUPER; + } + if (is_exec) { /* instruction or data */ + env->mmu.ssw |= M68K_TM_040_CODE; + } else { + env->mmu.ssw |= M68K_TM_040_DATA; + } + env->mmu.ssw &= ~M68K_BA_SIZE_MASK; + switch (size) { + case 1: + env->mmu.ssw |= M68K_BA_SIZE_BYTE; + break; + case 2: + env->mmu.ssw |= M68K_BA_SIZE_WORD; + break; + case 4: + env->mmu.ssw |= M68K_BA_SIZE_LONG; + break; + } + + if (!is_write) { + env->mmu.ssw |= M68K_RW_040; + } + + env->mmu.ar = addr; + + cs->exception_index = EXCP_ACCESS; + cpu_loop_exit(cs); + } +} #endif bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index f0e86a73d4..34db97b8a0 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -115,7 +115,6 @@ typedef struct DisasContext { int is_jmp; CCOp cc_op; /* Current CC operation */ int cc_op_synced; - int user; struct TranslationBlock *tb; int singlestep_enabled; TCGv_i64 mactmp; @@ -178,7 +177,11 @@ static void do_writebacks(DisasContext *s) #if defined(CONFIG_USER_ONLY) #define IS_USER(s) 1 #else -#define IS_USER(s) s->user +#define IS_USER(s) (!(s->tb->flags & TB_FLAGS_MSR_S)) +#define SFC_INDEX(s) ((s->tb->flags & TB_FLAGS_SFC_S) ? \ + MMU_KERNEL_IDX : MMU_USER_IDX) +#define DFC_INDEX(s) ((s->tb->flags & TB_FLAGS_DFC_S) ? \ + MMU_KERNEL_IDX : MMU_USER_IDX) #endif typedef void (*disas_proc)(CPUM68KState *env, DisasContext *s, uint16_t insn); @@ -281,10 +284,10 @@ static inline void gen_addr_fault(DisasContext *s) /* Generate a load from the specified address. Narrow values are sign extended to full register width. */ -static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign) +static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr, + int sign, int index) { TCGv tmp; - int index = IS_USER(s); tmp = tcg_temp_new_i32(); switch(opsize) { case OS_BYTE: @@ -309,9 +312,9 @@ static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign) } /* Generate a store. */ -static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val) +static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val, + int index) { - int index = IS_USER(s); switch(opsize) { case OS_BYTE: tcg_gen_qemu_st8(val, addr, index); @@ -336,13 +339,13 @@ typedef enum { /* Generate an unsigned load if VAL is 0 a signed load if val is -1, otherwise generate a store. */ static TCGv gen_ldst(DisasContext *s, int opsize, TCGv addr, TCGv val, - ea_what what) + ea_what what, int index) { if (what == EA_STORE) { - gen_store(s, opsize, addr, val); + gen_store(s, opsize, addr, val, index); return store_dummy; } else { - return gen_load(s, opsize, addr, what == EA_LOADS); + return gen_load(s, opsize, addr, what == EA_LOADS, index); } } @@ -464,7 +467,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base) } if ((ext & 3) != 0) { /* memory indirect */ - base = gen_load(s, OS_LONG, add, 0); + base = gen_load(s, OS_LONG, add, 0, IS_USER(s)); if ((ext & 0x44) == 4) { add = gen_addr_index(s, ext, tmp); tcg_gen_add_i32(tmp, add, base); @@ -793,7 +796,8 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn, a write otherwise it is a read (0 == sign extend, -1 == zero extend). ADDRP is non-null for readwrite operands. */ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, - int opsize, TCGv val, TCGv *addrp, ea_what what) + int opsize, TCGv val, TCGv *addrp, ea_what what, + int index) { TCGv reg, tmp, result; int32_t offset; @@ -817,10 +821,10 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, } case 2: /* Indirect register */ reg = get_areg(s, reg0); - return gen_ldst(s, opsize, reg, val, what); + return gen_ldst(s, opsize, reg, val, what, index); case 3: /* Indirect postincrement. */ reg = get_areg(s, reg0); - result = gen_ldst(s, opsize, reg, val, what); + result = gen_ldst(s, opsize, reg, val, what, index); if (what == EA_STORE || !addrp) { TCGv tmp = tcg_temp_new(); if (reg0 == 7 && opsize == OS_BYTE && @@ -844,7 +848,7 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, *addrp = tmp; } } - result = gen_ldst(s, opsize, tmp, val, what); + result = gen_ldst(s, opsize, tmp, val, what, index); if (what == EA_STORE || !addrp) { delay_set_areg(s, reg0, tmp, false); } @@ -863,7 +867,7 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, *addrp = tmp; } } - return gen_ldst(s, opsize, tmp, val, what); + return gen_ldst(s, opsize, tmp, val, what, index); case 7: /* Other */ switch (reg0) { case 0: /* Absolute short. */ @@ -904,11 +908,11 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, } static TCGv gen_ea(CPUM68KState *env, DisasContext *s, uint16_t insn, - int opsize, TCGv val, TCGv *addrp, ea_what what) + int opsize, TCGv val, TCGv *addrp, ea_what what, int index) { int mode = extract32(insn, 3, 3); int reg0 = REG(insn, 0); - return gen_ea_mode(env, s, mode, reg0, opsize, val, addrp, what); + return gen_ea_mode(env, s, mode, reg0, opsize, val, addrp, what, index); } static TCGv_ptr gen_fp_ptr(int freg) @@ -941,11 +945,11 @@ static void gen_fp_move(TCGv_ptr dest, TCGv_ptr src) tcg_temp_free_i64(t64); } -static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp) +static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, + int index) { TCGv tmp; TCGv_i64 t64; - int index = IS_USER(s); t64 = tcg_temp_new_i64(); tmp = tcg_temp_new(); @@ -969,7 +973,6 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp) case OS_DOUBLE: tcg_gen_qemu_ld64(t64, addr, index); gen_helper_extf64(cpu_env, fp, t64); - tcg_temp_free_i64(t64); break; case OS_EXTENDED: if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) { @@ -996,11 +999,11 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp) tcg_temp_free_i64(t64); } -static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp) +static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, + int index) { TCGv tmp; TCGv_i64 t64; - int index = IS_USER(s); t64 = tcg_temp_new_i64(); tmp = tcg_temp_new(); @@ -1051,17 +1054,18 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp) } static void gen_ldst_fp(DisasContext *s, int opsize, TCGv addr, - TCGv_ptr fp, ea_what what) + TCGv_ptr fp, ea_what what, int index) { if (what == EA_STORE) { - gen_store_fp(s, opsize, addr, fp); + gen_store_fp(s, opsize, addr, fp, index); } else { - gen_load_fp(s, opsize, addr, fp); + gen_load_fp(s, opsize, addr, fp, index); } } static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, - int reg0, int opsize, TCGv_ptr fp, ea_what what) + int reg0, int opsize, TCGv_ptr fp, ea_what what, + int index) { TCGv reg, addr, tmp; TCGv_i64 t64; @@ -1109,11 +1113,11 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, return -1; case 2: /* Indirect register */ addr = get_areg(s, reg0); - gen_ldst_fp(s, opsize, addr, fp, what); + gen_ldst_fp(s, opsize, addr, fp, what, index); return 0; case 3: /* Indirect postincrement. */ addr = cpu_aregs[reg0]; - gen_ldst_fp(s, opsize, addr, fp, what); + gen_ldst_fp(s, opsize, addr, fp, what, index); tcg_gen_addi_i32(addr, addr, opsize_bytes(opsize)); return 0; case 4: /* Indirect predecrememnt. */ @@ -1121,7 +1125,7 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, if (IS_NULL_QREG(addr)) { return -1; } - gen_ldst_fp(s, opsize, addr, fp, what); + gen_ldst_fp(s, opsize, addr, fp, what, index); tcg_gen_mov_i32(cpu_aregs[reg0], addr); return 0; case 5: /* Indirect displacement. */ @@ -1131,7 +1135,7 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, if (IS_NULL_QREG(addr)) { return -1; } - gen_ldst_fp(s, opsize, addr, fp, what); + gen_ldst_fp(s, opsize, addr, fp, what, index); return 0; case 7: /* Other */ switch (reg0) { @@ -1200,11 +1204,11 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, } static int gen_ea_fp(CPUM68KState *env, DisasContext *s, uint16_t insn, - int opsize, TCGv_ptr fp, ea_what what) + int opsize, TCGv_ptr fp, ea_what what, int index) { int mode = extract32(insn, 3, 3); int reg0 = REG(insn, 0); - return gen_ea_mode_fp(env, s, mode, reg0, opsize, fp, what); + return gen_ea_mode_fp(env, s, mode, reg0, opsize, fp, what, index); } typedef struct { @@ -1424,7 +1428,7 @@ static void gen_lookup_tb(DisasContext *s) #define SRC_EA(env, result, opsize, op_sign, addrp) do { \ result = gen_ea(env, s, insn, opsize, NULL_QREG, addrp, \ - op_sign ? EA_LOADS : EA_LOADU); \ + op_sign ? EA_LOADS : EA_LOADU, IS_USER(s)); \ if (IS_NULL_QREG(result)) { \ gen_addr_fault(s); \ return; \ @@ -1432,7 +1436,8 @@ static void gen_lookup_tb(DisasContext *s) } while (0) #define DEST_EA(env, insn, opsize, val, addrp) do { \ - TCGv ea_result = gen_ea(env, s, insn, opsize, val, addrp, EA_STORE); \ + TCGv ea_result = gen_ea(env, s, insn, opsize, val, addrp, \ + EA_STORE, IS_USER(s)); \ if (IS_NULL_QREG(ea_result)) { \ gen_addr_fault(s); \ return; \ @@ -1769,13 +1774,14 @@ DISAS_INSN(abcd_mem) /* Indirect pre-decrement load (mode 4) */ src = gen_ea_mode(env, s, 4, REG(insn, 0), OS_BYTE, - NULL_QREG, NULL, EA_LOADU); + NULL_QREG, NULL, EA_LOADU, IS_USER(s)); dest = gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, - NULL_QREG, &addr, EA_LOADU); + NULL_QREG, &addr, EA_LOADU, IS_USER(s)); bcd_add(dest, src); - gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, dest, &addr, EA_STORE); + gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, dest, &addr, + EA_STORE, IS_USER(s)); bcd_flags(dest); } @@ -1805,13 +1811,14 @@ DISAS_INSN(sbcd_mem) /* Indirect pre-decrement load (mode 4) */ src = gen_ea_mode(env, s, 4, REG(insn, 0), OS_BYTE, - NULL_QREG, NULL, EA_LOADU); + NULL_QREG, NULL, EA_LOADU, IS_USER(s)); dest = gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, - NULL_QREG, &addr, EA_LOADU); + NULL_QREG, &addr, EA_LOADU, IS_USER(s)); bcd_sub(dest, src); - gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, dest, &addr, EA_STORE); + gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, dest, &addr, + EA_STORE, IS_USER(s)); bcd_flags(dest); } @@ -1948,7 +1955,7 @@ static void gen_push(DisasContext *s, TCGv val) tmp = tcg_temp_new(); tcg_gen_subi_i32(tmp, QREG_SP, 4); - gen_store(s, OS_LONG, tmp, val); + gen_store(s, OS_LONG, tmp, val, IS_USER(s)); tcg_gen_mov_i32(QREG_SP, tmp); tcg_temp_free(tmp); } @@ -2017,7 +2024,7 @@ DISAS_INSN(movem) /* memory to register */ for (i = 0; i < 16; i++) { if (mask & (1 << i)) { - r[i] = gen_load(s, opsize, addr, 1); + r[i] = gen_load(s, opsize, addr, 1, IS_USER(s)); tcg_gen_add_i32(addr, addr, incr); } } @@ -2049,10 +2056,10 @@ DISAS_INSN(movem) */ tmp = tcg_temp_new(); tcg_gen_sub_i32(tmp, cpu_aregs[reg0], incr); - gen_store(s, opsize, addr, tmp); + gen_store(s, opsize, addr, tmp, IS_USER(s)); tcg_temp_free(tmp); } else { - gen_store(s, opsize, addr, mreg(i)); + gen_store(s, opsize, addr, mreg(i), IS_USER(s)); } } } @@ -2060,7 +2067,7 @@ DISAS_INSN(movem) } else { for (i = 0; i < 16; i++) { if (mask & (1 << i)) { - gen_store(s, opsize, addr, mreg(i)); + gen_store(s, opsize, addr, mreg(i), IS_USER(s)); tcg_gen_add_i32(addr, addr, incr); } } @@ -2780,7 +2787,7 @@ static void gen_link(DisasContext *s, uint16_t insn, int32_t offset) reg = AREG(insn, 0); tmp = tcg_temp_new(); tcg_gen_subi_i32(tmp, QREG_SP, 4); - gen_store(s, OS_LONG, tmp, reg); + gen_store(s, OS_LONG, tmp, reg, IS_USER(s)); if ((insn & 7) != 7) { tcg_gen_mov_i32(reg, tmp); } @@ -2813,7 +2820,7 @@ DISAS_INSN(unlk) src = tcg_temp_new(); reg = AREG(insn, 0); tcg_gen_mov_i32(src, reg); - tmp = gen_load(s, OS_LONG, src, 0); + tmp = gen_load(s, OS_LONG, src, 0, IS_USER(s)); tcg_gen_mov_i32(reg, tmp); tcg_gen_addi_i32(QREG_SP, src, 4); tcg_temp_free(src); @@ -2840,7 +2847,7 @@ DISAS_INSN(rtd) TCGv tmp; int16_t offset = read_im16(env, s); - tmp = gen_load(s, OS_LONG, QREG_SP, 0); + tmp = gen_load(s, OS_LONG, QREG_SP, 0, IS_USER(s)); tcg_gen_addi_i32(QREG_SP, QREG_SP, offset + 4); gen_jmp(s, tmp); } @@ -2849,7 +2856,7 @@ DISAS_INSN(rts) { TCGv tmp; - tmp = gen_load(s, OS_LONG, QREG_SP, 0); + tmp = gen_load(s, OS_LONG, QREG_SP, 0, IS_USER(s)); tcg_gen_addi_i32(QREG_SP, QREG_SP, 4); gen_jmp(s, tmp); } @@ -3085,15 +3092,15 @@ DISAS_INSN(subx_mem) addr_src = AREG(insn, 0); tcg_gen_subi_i32(addr_src, addr_src, opsize); - src = gen_load(s, opsize, addr_src, 1); + src = gen_load(s, opsize, addr_src, 1, IS_USER(s)); addr_dest = AREG(insn, 9); tcg_gen_subi_i32(addr_dest, addr_dest, opsize); - dest = gen_load(s, opsize, addr_dest, 1); + dest = gen_load(s, opsize, addr_dest, 1, IS_USER(s)); gen_subx(s, src, dest, opsize); - gen_store(s, opsize, addr_dest, QREG_CC_N); + gen_store(s, opsize, addr_dest, QREG_CC_N, IS_USER(s)); } DISAS_INSN(mov3q) @@ -3145,10 +3152,10 @@ DISAS_INSN(cmpm) /* Post-increment load (mode 3) from Ay. */ src = gen_ea_mode(env, s, 3, REG(insn, 0), opsize, - NULL_QREG, NULL, EA_LOADS); + NULL_QREG, NULL, EA_LOADS, IS_USER(s)); /* Post-increment load (mode 3) from Ax. */ dst = gen_ea_mode(env, s, 3, REG(insn, 9), opsize, - NULL_QREG, NULL, EA_LOADS); + NULL_QREG, NULL, EA_LOADS, IS_USER(s)); gen_update_cc_cmp(s, dst, src, opsize); } @@ -3291,15 +3298,15 @@ DISAS_INSN(addx_mem) addr_src = AREG(insn, 0); tcg_gen_subi_i32(addr_src, addr_src, opsize_bytes(opsize)); - src = gen_load(s, opsize, addr_src, 1); + src = gen_load(s, opsize, addr_src, 1, IS_USER(s)); addr_dest = AREG(insn, 9); tcg_gen_subi_i32(addr_dest, addr_dest, opsize_bytes(opsize)); - dest = gen_load(s, opsize, addr_dest, 1); + dest = gen_load(s, opsize, addr_dest, 1, IS_USER(s)); gen_addx(s, src, dest, opsize); - gen_store(s, opsize, addr_dest, QREG_CC_N); + gen_store(s, opsize, addr_dest, QREG_CC_N, IS_USER(s)); } static inline void shift_im(DisasContext *s, uint16_t insn, int opsize) @@ -4329,9 +4336,9 @@ DISAS_INSN(chk2) addr2 = tcg_temp_new(); tcg_gen_addi_i32(addr2, addr1, opsize_bytes(opsize)); - bound1 = gen_load(s, opsize, addr1, 1); + bound1 = gen_load(s, opsize, addr1, 1, IS_USER(s)); tcg_temp_free(addr1); - bound2 = gen_load(s, opsize, addr2, 1); + bound2 = gen_load(s, opsize, addr2, 1, IS_USER(s)); tcg_temp_free(addr2); reg = tcg_temp_new(); @@ -4449,6 +4456,64 @@ DISAS_INSN(move_from_sr) } #if defined(CONFIG_SOFTMMU) +DISAS_INSN(moves) +{ + int opsize; + uint16_t ext; + TCGv reg; + TCGv addr; + int extend; + + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + + ext = read_im16(env, s); + + opsize = insn_opsize(insn); + + if (ext & 0x8000) { + /* address register */ + reg = AREG(ext, 12); + extend = 1; + } else { + /* data register */ + reg = DREG(ext, 12); + extend = 0; + } + + addr = gen_lea(env, s, insn, opsize); + if (IS_NULL_QREG(addr)) { + gen_addr_fault(s); + return; + } + + if (ext & 0x0800) { + /* from reg to ea */ + gen_store(s, opsize, addr, reg, DFC_INDEX(s)); + } else { + /* from ea to reg */ + TCGv tmp = gen_load(s, opsize, addr, 0, SFC_INDEX(s)); + if (extend) { + gen_ext(reg, tmp, opsize, 1); + } else { + gen_partset_reg(opsize, reg, tmp); + } + } + switch (extract32(insn, 3, 3)) { + case 3: /* Indirect postincrement. */ + tcg_gen_addi_i32(AREG(insn, 0), addr, + REG(insn, 0) == 7 && opsize == OS_BYTE + ? 2 + : opsize_bytes(opsize)); + break; + case 4: /* Indirect predecrememnt. */ + tcg_gen_mov_i32(AREG(insn, 0), addr); + break; + } +} + DISAS_INSN(move_to_sr) { if (IS_USER(s)) { @@ -4596,6 +4661,35 @@ DISAS_INSN(cinv) /* Invalidate cache line. Implement as no-op. */ } +#if defined(CONFIG_SOFTMMU) +DISAS_INSN(pflush) +{ + TCGv opmode; + + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + + opmode = tcg_const_i32((insn >> 3) & 3); + gen_helper_pflush(cpu_env, AREG(insn, 0), opmode); + tcg_temp_free(opmode); +} + +DISAS_INSN(ptest) +{ + TCGv is_read; + + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + is_read = tcg_const_i32((insn >> 5) & 1); + gen_helper_ptest(cpu_env, AREG(insn, 0), is_read); + tcg_temp_free(is_read); +} +#endif + DISAS_INSN(wddata) { gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); @@ -4844,7 +4938,8 @@ DISAS_INSN(fpu) case 3: /* fmove out */ cpu_src = gen_fp_ptr(REG(ext, 7)); opsize = ext_opsize(ext, 10); - if (gen_ea_fp(env, s, insn, opsize, cpu_src, EA_STORE) == -1) { + if (gen_ea_fp(env, s, insn, opsize, cpu_src, + EA_STORE, IS_USER(s)) == -1) { gen_addr_fault(s); } gen_helper_ftst(cpu_env, cpu_src); @@ -4866,7 +4961,8 @@ DISAS_INSN(fpu) /* Source effective address. */ opsize = ext_opsize(ext, 10); cpu_src = gen_fp_result_ptr(); - if (gen_ea_fp(env, s, insn, opsize, cpu_src, EA_LOADS) == -1) { + if (gen_ea_fp(env, s, insn, opsize, cpu_src, + EA_LOADS, IS_USER(s)) == -1) { gen_addr_fault(s); return; } @@ -5265,7 +5361,7 @@ DISAS_INSN(mac) tcg_gen_and_i32(addr, tmp, QREG_MAC_MASK); /* Load the value now to ensure correct exception behavior. Perform writeback after reading the MAC inputs. */ - loadval = gen_load(s, OS_LONG, addr, 0); + loadval = gen_load(s, OS_LONG, addr, 0, IS_USER(s)); acc ^= 1; rx = (ext & 0x8000) ? AREG(ext, 12) : DREG(insn, 12); @@ -5601,6 +5697,9 @@ void register_m68k_insns (CPUM68KState *env) BASE(bitop_im, 08c0, ffc0); INSN(arith_im, 0a80, fff8, CF_ISA_A); INSN(arith_im, 0a00, ff00, M68000); +#if defined(CONFIG_SOFTMMU) + INSN(moves, 0e00, ff00, M68000); +#endif INSN(cas, 0ac0, ffc0, CAS); INSN(cas, 0cc0, ffc0, CAS); INSN(cas, 0ec0, ffc0, CAS); @@ -5784,6 +5883,8 @@ void register_m68k_insns (CPUM68KState *env) INSN(cpushl, f428, ff38, CF_ISA_A); INSN(cpush, f420, ff20, M68040); INSN(cinv, f400, ff20, M68040); + INSN(pflush, f500, ffe0, M68040); + INSN(ptest, f548, ffd8, M68040); INSN(wddata, fb00, ff00, CF_ISA_A); INSN(wdebug, fbc0, ffc0, CF_ISA_A); #endif @@ -5822,7 +5923,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) dc->cc_op = CC_OP_DYNAMIC; dc->cc_op_synced = 1; dc->singlestep_enabled = cs->singlestep_enabled; - dc->user = (env->sr & SR_S) == 0; dc->done_mac = 0; dc->writeback_mask = 0; num_insns = 0; @@ -5981,6 +6081,14 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP], env->current_sp == M68K_ISP ? "->" : " ", env->sp[M68K_ISP]); cpu_fprintf(f, "VBR = 0x%08x\n", env->vbr); + cpu_fprintf(f, "SFC = %x DFC %x\n", env->sfc, env->dfc); + cpu_fprintf(f, "SSW %08x TCR %08x URP %08x SRP %08x\n", + env->mmu.ssw, env->mmu.tcr, env->mmu.urp, env->mmu.srp); + cpu_fprintf(f, "DTTR0/1: %08x/%08x ITTR0/1: %08x/%08x\n", + env->mmu.ttr[M68K_DTTR0], env->mmu.ttr[M68K_DTTR1], + env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]); + cpu_fprintf(f, "MMUSR %08x, fault at %08x\n", + env->mmu.mmusr, env->mmu.ar); #endif } diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 52b6b6aec7..f3e7405a62 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -367,7 +367,7 @@ static inline int cpu_mmu_index (CPUMBState *env, bool ifetch) return MMU_KERNEL_IDX; } -int mb_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int mb_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); #include "exec/cpu-all.h" diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index da394d1dfc..fac6ee9263 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -38,7 +38,7 @@ void mb_cpu_do_interrupt(CPUState *cs) env->regs[14] = env->sregs[SR_PC]; } -int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { cs->exception_index = 0xaa; @@ -48,7 +48,7 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, #else /* !CONFIG_USER_ONLY */ -int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 4cf51568df..869072a2d1 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -33,12 +33,12 @@ * NULL, it means that the function was called in C code (i.e. not * from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = mb_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = mb_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); diff --git a/target/mips/helper.c b/target/mips/helper.c index ea076261af..8cf91ce339 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -535,7 +535,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) } #endif -int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { MIPSCPU *cpu = MIPS_CPU(cs); diff --git a/target/mips/internal.h b/target/mips/internal.h index 45ded3484c..e41051f8e6 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -202,7 +202,7 @@ void cpu_mips_start_count(CPUMIPSState *env); void cpu_mips_stop_count(CPUMIPSState *env); /* helper.c */ -int mips_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int mips_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); /* op_helper.c */ diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index e537a8bfd8..798cdad030 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -2451,12 +2451,12 @@ void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr, do_raise_exception_err(env, excp, error_code, retaddr); } -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = mips_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = mips_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (ret) { MIPSCPU *cpu = MIPS_CPU(cs); CPUMIPSState *env = &cpu->env; @@ -4190,10 +4190,10 @@ static inline void ensure_writable_pages(CPUMIPSState *env, target_ulong page_addr; if (unlikely(MSA_PAGESPAN(addr))) { /* first page */ - probe_write(env, addr, mmu_idx, retaddr); + probe_write(env, addr, 0, mmu_idx, retaddr); /* second page */ page_addr = (addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; - probe_write(env, page_addr, mmu_idx, retaddr); + probe_write(env, page_addr, 0, mmu_idx, retaddr); } #endif } diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index d37e6a5572..a01f480821 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -142,7 +142,7 @@ static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc, *flags = 0; } -int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, +int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); #endif /* MOXIE_CPU_H */ diff --git a/target/moxie/helper.c b/target/moxie/helper.c index 6890ffd71c..b8e86560da 100644 --- a/target/moxie/helper.c +++ b/target/moxie/helper.c @@ -29,12 +29,12 @@ /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = moxie_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = moxie_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { cpu_loop_exit_restore(cs, retaddr); } @@ -94,7 +94,7 @@ void moxie_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { MoxieCPU *cpu = MOXIE_CPU(cs); @@ -107,7 +107,7 @@ int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, #else /* !CONFIG_USER_ONLY */ -int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { MoxieCPU *cpu = MOXIE_CPU(cs); diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 88823a6d4d..204b39add7 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -252,7 +252,7 @@ static inline int cpu_mmu_index(CPUNios2State *env, bool ifetch) MMU_SUPERVISOR_IDX; } -int nios2_cpu_handle_mmu_fault(CPUState *env, vaddr address, +int nios2_cpu_handle_mmu_fault(CPUState *env, vaddr address, int size, int rw, int mmu_idx); static inline int cpu_interrupts_enabled(CPUNios2State *env) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 9f741a8f19..a169c91eaa 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -37,7 +37,8 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[R_EA] = env->regs[R_PC] + 4; } -int nios2_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) +int nios2_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, + int rw, int mmu_idx) { cs->exception_index = 0xaa; /* Page 0x1000 is kuser helper */ @@ -232,7 +233,8 @@ static int cpu_nios2_handle_virtual_page( return 1; } -int nios2_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) +int nios2_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, + int rw, int mmu_idx) { Nios2CPU *cpu = NIOS2_CPU(cs); CPUNios2State *env = &cpu->env; diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 0cd8647510..69b71cba4a 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -35,12 +35,12 @@ #define MMU_LOG(x) #endif -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = nios2_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = nios2_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index cc22dc8871..fb46cc9986 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -356,7 +356,7 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int openrisc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); -int openrisc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, +int openrisc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); int cpu_openrisc_signal_handler(int host_signum, void *pinfo, void *puc); diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c index ce2a29dd1a..2bd782f89b 100644 --- a/target/openrisc/mmu.c +++ b/target/openrisc/mmu.c @@ -178,8 +178,8 @@ static void cpu_openrisc_raise_mmu_exception(OpenRISCCPU *cpu, } #ifndef CONFIG_USER_ONLY -int openrisc_cpu_handle_mmu_fault(CPUState *cs, - vaddr address, int rw, int mmu_idx) +int openrisc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, + int rw, int mmu_idx) { OpenRISCCPU *cpu = OPENRISC_CPU(cs); int ret = 0; @@ -202,8 +202,8 @@ int openrisc_cpu_handle_mmu_fault(CPUState *cs, return ret; } #else -int openrisc_cpu_handle_mmu_fault(CPUState *cs, - vaddr address, int rw, int mmu_idx) +int openrisc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, + int rw, int mmu_idx) { OpenRISCCPU *cpu = OPENRISC_CPU(cs); int ret = 0; diff --git a/target/openrisc/mmu_helper.c b/target/openrisc/mmu_helper.c index a3e182c42d..97e1d17b5a 100644 --- a/target/openrisc/mmu_helper.c +++ b/target/openrisc/mmu_helper.c @@ -25,12 +25,12 @@ #ifndef CONFIG_USER_ONLY -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = openrisc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = openrisc_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (ret) { /* Raise Exception. */ diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 603a38cae8..9f8cbbe7aa 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1308,7 +1308,7 @@ void ppc_translate_init(void); int cpu_ppc_signal_handler (int host_signum, void *pinfo, void *puc); #if defined(CONFIG_USER_ONLY) -int ppc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int ppc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); #endif diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 298c15e961..16ef5acaa2 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -2925,8 +2925,8 @@ void helper_check_tlb_flush_global(CPUPPCState *env) NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { PowerPCCPU *cpu = POWERPC_CPU(cs); PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); diff --git a/target/ppc/user_only_helper.c b/target/ppc/user_only_helper.c index 6aff34713f..2f1477f102 100644 --- a/target/ppc/user_only_helper.c +++ b/target/ppc/user_only_helper.c @@ -21,7 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" -int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { PowerPCCPU *cpu = POWERPC_CPU(cs); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index f4697a884d..e8f7a40c2b 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -55,7 +55,7 @@ void s390_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { S390CPU *cpu = S390_CPU(cs); @@ -83,7 +83,7 @@ static inline uint64_t cpu_mmu_idx_to_asc(int mmu_idx) } } -int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr orig_vaddr, +int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr orig_vaddr, int size, int rw, int mmu_idx) { S390CPU *cpu = S390_CPU(cs); diff --git a/target/s390x/internal.h b/target/s390x/internal.h index 1a88e4beb4..fea165ffe4 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -323,7 +323,7 @@ ObjectClass *s390_cpu_class_by_name(const char *name); void s390x_cpu_debug_excp_handler(CPUState *cs); void s390_cpu_do_interrupt(CPUState *cpu); bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); -int s390_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int s390_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index c957febc6d..427b795a78 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -39,10 +39,10 @@ NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { - int ret = s390_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + int ret = s390_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret != 0)) { cpu_loop_exit_restore(cs, retaddr); } @@ -1440,7 +1440,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, /* Sanity check writability of the store address. */ #ifndef CONFIG_USER_ONLY - probe_write(env, a2, mem_idx, ra); + probe_write(env, a2, 0, mem_idx, ra); #endif /* Note that the compare-and-swap is atomic, and the store is atomic, but diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index a2c26e0597..52a4568dd5 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -246,7 +246,7 @@ void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, void sh4_translate_init(void); int cpu_sh4_signal_handler(int host_signum, void *pinfo, void *puc); -int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 680b583e53..2ff0cf4060 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -34,7 +34,7 @@ void superh_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SuperHCPU *cpu = SUPERH_CPU(cs); @@ -458,7 +458,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical, return get_mmu_address(env, physical, prot, address, rw, access_type); } -int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SuperHCPU *cpu = SUPERH_CPU(cs); diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index d798f239cf..4b8bbf63b4 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -40,12 +40,12 @@ void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, cpu_loop_exit_restore(cs, retaddr); } -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = superh_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = superh_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (ret) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 9fde547fac..3eaffb354e 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -582,7 +582,7 @@ void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t) QEMU_NORETURN; void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf); /* mmu_helper.c */ -int sparc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int sparc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev); void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env); diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index fb489cb5fd..5bc090213c 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -1929,12 +1929,12 @@ void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = sparc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = sparc_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (ret) { cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index f2d2250e7a..f8886ae039 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -27,7 +27,7 @@ #if defined(CONFIG_USER_ONLY) -int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SPARCCPU *cpu = SPARC_CPU(cs); @@ -208,7 +208,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical, } /* Perform address translation */ -int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SPARCCPU *cpu = SPARC_CPU(cs); @@ -713,7 +713,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical, } /* Perform address translation */ -int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SPARCCPU *cpu = SPARC_CPU(cs); diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c index 2ef8ea7daa..c140b461ac 100644 --- a/target/tilegx/cpu.c +++ b/target/tilegx/cpu.c @@ -112,8 +112,8 @@ static void tilegx_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, - int mmu_idx) +static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, + int rw, int mmu_idx) { TileGXCPU *cpu = TILEGX_CPU(cs); diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index 40ed229486..098f217c2a 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -2806,8 +2806,8 @@ static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env, cpu_loop_exit_restore(cs, pc); } -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; ret = cpu_tricore_handle_mmu_fault(cs, addr, access_type, mmu_idx); diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 3dc6fbc6c7..a3cc71416d 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -181,7 +181,7 @@ static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc } } -int uc32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int uc32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); void uc32_translate_init(void); void switch_mode(CPUUniCore32State *, int); diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c index 3393d2c020..a5ff2ddb74 100644 --- a/target/unicore32/helper.c +++ b/target/unicore32/helper.c @@ -230,7 +230,7 @@ void uc32_cpu_do_interrupt(CPUState *cs) cpu_abort(cs, "NO interrupt in user mode\n"); } -int uc32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int uc32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int access_type, int mmu_idx) { cpu_abort(cs, "NO mmu fault in user mode\n"); diff --git a/target/unicore32/op_helper.c b/target/unicore32/op_helper.c index 8788642a7f..e0a15882d3 100644 --- a/target/unicore32/op_helper.c +++ b/target/unicore32/op_helper.c @@ -244,12 +244,12 @@ uint32_t HELPER(ror_cc)(CPUUniCore32State *env, uint32_t x, uint32_t i) } #ifndef CONFIG_USER_ONLY -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = uc32_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (unlikely(ret)) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); diff --git a/target/unicore32/softmmu.c b/target/unicore32/softmmu.c index d8d76968f3..00c7e0d028 100644 --- a/target/unicore32/softmmu.c +++ b/target/unicore32/softmmu.c @@ -215,7 +215,7 @@ do_fault: return code; } -int uc32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, +int uc32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int access_type, int mmu_idx) { UniCore32CPU *cpu = UNICORE32_CPU(cs); diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 012552817f..43182b113e 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -50,8 +50,8 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs, } } -void tlb_fill(CPUState *cs, target_ulong vaddr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong vaddr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { XtensaCPU *cpu = XTENSA_CPU(cs); CPUXtensaState *env = &cpu->env; diff --git a/ui/Makefile.objs b/ui/Makefile.objs index ec8533d6d9..99195884b0 100644 --- a/ui/Makefile.objs +++ b/ui/Makefile.objs @@ -11,11 +11,12 @@ common-obj-y += keymaps.o console.o cursor.o qemu-pixman.o common-obj-y += input.o input-keymap.o input-legacy.o common-obj-$(CONFIG_LINUX) += input-linux.o common-obj-$(CONFIG_SPICE) += spice-core.o spice-input.o spice-display.o -common-obj-$(CONFIG_SDL) += sdl.mo x_keymap.o +common-obj-$(CONFIG_SDL) += sdl.mo common-obj-$(CONFIG_COCOA) += cocoa.o common-obj-$(CONFIG_CURSES) += curses.o common-obj-$(CONFIG_VNC) += $(vnc-obj-y) -common-obj-$(CONFIG_GTK) += gtk.o x_keymap.o +common-obj-$(CONFIG_GTK) += gtk.o +common-obj-$(if $(CONFIG_WIN32),n,$(if $(CONFIG_SDL),y,$(CONFIG_GTK))) += x_keymap.o ifeq ($(CONFIG_SDLABI),1.2) sdl.mo-objs := sdl.o sdl_zoom.o @@ -52,7 +52,6 @@ #include "ui/input.h" #include "sysemu/sysemu.h" #include "qmp-commands.h" -#include "x_keymap.h" #include "keymaps.h" #include "chardev/char.h" #include "qom/object.h" @@ -65,6 +64,48 @@ #define VC_SCALE_MIN 0.25 #define VC_SCALE_STEP 0.25 +#ifdef GDK_WINDOWING_X11 +#include "ui/x_keymap.h" + +/* Gtk2 compat */ +#ifndef GDK_IS_X11_DISPLAY +#define GDK_IS_X11_DISPLAY(dpy) (dpy != NULL) +#endif +#endif + + +#ifdef GDK_WINDOWING_WAYLAND +/* Gtk2 compat */ +#ifndef GDK_IS_WAYLAND_DISPLAY +#define GDK_IS_WAYLAND_DISPLAY(dpy) (dpy != NULL) +#endif +#endif + + +#ifdef GDK_WINDOWING_WIN32 +/* Gtk2 compat */ +#ifndef GDK_IS_WIN32_DISPLAY +#define GDK_IS_WIN32_DISPLAY(dpy) (dpy != NULL) +#endif +#endif + + +#ifdef GDK_WINDOWING_BROADWAY +/* Gtk2 compat */ +#ifndef GDK_IS_BROADWAY_DISPLAY +#define GDK_IS_BROADWAY_DISPLAY(dpy) (dpy != NULL) +#endif +#endif + + +#ifdef GDK_WINDOWING_QUARTZ +/* Gtk2 compat */ +#ifndef GDK_IS_QUARTZ_DISPLAY +#define GDK_IS_QUARTZ_DISPLAY(dpy) (dpy != NULL) +#endif +#endif + + #if !defined(CONFIG_VTE) # define VTE_CHECK_VERSION(a, b, c) 0 #endif @@ -123,10 +164,19 @@ #define HOTKEY_MODIFIERS (GDK_CONTROL_MASK | GDK_MOD1_MASK) static const int modifier_keycode[] = { - /* shift, control, alt keys, meta keys, both left & right */ - 0x2a, 0x36, 0x1d, 0x9d, 0x38, 0xb8, 0xdb, 0xdd, + Q_KEY_CODE_SHIFT, + Q_KEY_CODE_SHIFT_R, + Q_KEY_CODE_CTRL, + Q_KEY_CODE_CTRL_R, + Q_KEY_CODE_ALT, + Q_KEY_CODE_ALT_R, + Q_KEY_CODE_META_L, + Q_KEY_CODE_META_R, }; +static const guint16 *keycode_map; +static size_t keycode_maplen; + struct GtkDisplayState { GtkWidget *window; @@ -178,7 +228,6 @@ struct GtkDisplayState { bool external_pause_update; bool modifier_pressed[ARRAY_SIZE(modifier_keycode)]; - bool has_evdev; bool ignore_keys; }; @@ -412,18 +461,18 @@ static void gd_update_full_redraw(VirtualConsole *vc) static void gtk_release_modifiers(GtkDisplayState *s) { VirtualConsole *vc = gd_vc_find_current(s); - int i, keycode; + int i, qcode; if (vc->type != GD_VC_GFX || !qemu_console_is_graphic(vc->gfx.dcl.con)) { return; } for (i = 0; i < ARRAY_SIZE(modifier_keycode); i++) { - keycode = modifier_keycode[i]; + qcode = modifier_keycode[i]; if (!s->modifier_pressed[i]) { continue; } - qemu_input_event_send_key_number(vc->gfx.dcl.con, keycode, false); + qemu_input_event_send_key_qcode(vc->gfx.dcl.con, qcode, false); s->modifier_pressed[i] = false; } } @@ -1057,47 +1106,75 @@ static gboolean gd_scroll_event(GtkWidget *widget, GdkEventScroll *scroll, return TRUE; } -static int gd_map_keycode(GtkDisplayState *s, GdkDisplay *dpy, int gdk_keycode) + +static const guint16 *gd_get_keymap(size_t *maplen) { - int qemu_keycode; + GdkDisplay *dpy = gdk_display_get_default(); + +#ifdef GDK_WINDOWING_X11 + if (GDK_IS_X11_DISPLAY(dpy)) { + trace_gd_keymap_windowing("x11"); + return qemu_xkeymap_mapping_table( + gdk_x11_display_get_xdisplay(dpy), maplen); + } +#endif + +#ifdef GDK_WINDOWING_WAYLAND + if (GDK_IS_WAYLAND_DISPLAY(dpy)) { + trace_gd_keymap_windowing("wayland"); + *maplen = qemu_input_map_xorgevdev_to_qcode_len; + return qemu_input_map_xorgevdev_to_qcode; + } +#endif #ifdef GDK_WINDOWING_WIN32 if (GDK_IS_WIN32_DISPLAY(dpy)) { - qemu_keycode = MapVirtualKey(gdk_keycode, MAPVK_VK_TO_VSC); - switch (qemu_keycode) { - case 103: /* alt gr */ - qemu_keycode = 56 | SCANCODE_GREY; - break; - } - return qemu_keycode; + trace_gd_keymap_windowing("win32"); + *maplen = qemu_input_map_win32_to_qcode_len; + return qemu_input_map_win32_to_qcode; } #endif - if (gdk_keycode < 9) { - qemu_keycode = 0; - } else if (gdk_keycode < 97) { - qemu_keycode = gdk_keycode - 8; -#ifdef GDK_WINDOWING_X11 - } else if (GDK_IS_X11_DISPLAY(dpy) && gdk_keycode < 158) { - if (s->has_evdev) { - qemu_keycode = translate_evdev_keycode(gdk_keycode - 97); - } else { - qemu_keycode = translate_xfree86_keycode(gdk_keycode - 97); - } +#ifdef GDK_WINDOWING_QUARTZ + if (GDK_IS_QUARTZ_DISPLAY(dpy)) { + trace_gd_keymap_windowing("quartz"); + *maplen = qemu_input_map_osx_to_qcode_len; + return qemu_input_map_osx_to_qcode; + } #endif -#ifdef GDK_WINDOWING_WAYLAND - } else if (GDK_IS_WAYLAND_DISPLAY(dpy) && gdk_keycode < 158) { - qemu_keycode = translate_evdev_keycode(gdk_keycode - 97); + +#ifdef GDK_WINDOWING_BROADWAY + if (GDK_IS_BROADWAY_DISPLAY(dpy)) { + trace_gd_keymap_windowing("broadway"); + g_warning("experimental: using broadway, x11 virtual keysym\n" + "mapping - with very limited support. See also\n" + "https://bugzilla.gnome.org/show_bug.cgi?id=700105"); + *maplen = qemu_input_map_x11_to_qcode_len; + return qemu_input_map_x11_to_qcode; + } #endif - } else if (gdk_keycode == 208) { /* Hiragana_Katakana */ - qemu_keycode = 0x70; - } else if (gdk_keycode == 211) { /* backslash */ - qemu_keycode = 0x73; - } else { - qemu_keycode = 0; + + g_warning("Unsupported GDK Windowing platform.\n" + "Disabling extended keycode tables.\n" + "Please report to qemu-devel@nongnu.org\n" + "including the following information:\n" + "\n" + " - Operating system\n" + " - GDK Windowing system build\n"); + return NULL; +} + + +static int gd_map_keycode(int scancode) +{ + if (!keycode_map) { + return 0; + } + if (scancode > keycode_maplen) { + return 0; } - return qemu_keycode; + return keycode_map[scancode]; } static gboolean gd_text_key_down(GtkWidget *widget, @@ -1111,9 +1188,7 @@ static gboolean gd_text_key_down(GtkWidget *widget, } else if (key->length) { kbd_put_string_console(con, key->string, key->length); } else { - int num = gd_map_keycode(vc->s, gtk_widget_get_display(widget), - key->hardware_keycode); - int qcode = qemu_input_key_number_to_qcode(num); + int qcode = gd_map_keycode(key->hardware_keycode); kbd_put_qcode_console(con, qcode); } return TRUE; @@ -1123,8 +1198,7 @@ static gboolean gd_key_event(GtkWidget *widget, GdkEventKey *key, void *opaque) { VirtualConsole *vc = opaque; GtkDisplayState *s = vc->s; - int gdk_keycode = key->hardware_keycode; - int qemu_keycode; + int qcode; int i; if (s->ignore_keys) { @@ -1132,26 +1206,38 @@ static gboolean gd_key_event(GtkWidget *widget, GdkEventKey *key, void *opaque) return TRUE; } - if (key->keyval == GDK_KEY_Pause) { +#ifdef WIN32 + /* on windows, we ought to ignore the reserved key event? */ + if (key->hardware_keycode == 0xff) + return false; +#endif + + if (key->keyval == GDK_KEY_Pause +#ifdef G_OS_WIN32 + /* for some reason GDK does not fill keyval for VK_PAUSE + * See https://bugzilla.gnome.org/show_bug.cgi?id=769214 + */ + || key->hardware_keycode == VK_PAUSE +#endif + ) { qemu_input_event_send_key_qcode(vc->gfx.dcl.con, Q_KEY_CODE_PAUSE, key->type == GDK_KEY_PRESS); return TRUE; } - qemu_keycode = gd_map_keycode(s, gtk_widget_get_display(widget), - gdk_keycode); + qcode = gd_map_keycode(key->hardware_keycode); - trace_gd_key_event(vc->label, gdk_keycode, qemu_keycode, + trace_gd_key_event(vc->label, key->hardware_keycode, qcode, (key->type == GDK_KEY_PRESS) ? "down" : "up"); for (i = 0; i < ARRAY_SIZE(modifier_keycode); i++) { - if (qemu_keycode == modifier_keycode[i]) { + if (qcode == modifier_keycode[i]) { s->modifier_pressed[i] = (key->type == GDK_KEY_PRESS); } } - qemu_input_event_send_key_number(vc->gfx.dcl.con, qemu_keycode, - key->type == GDK_KEY_PRESS); + qemu_input_event_send_key_qcode(vc->gfx.dcl.con, qcode, + key->type == GDK_KEY_PRESS); return TRUE; } @@ -2200,38 +2286,6 @@ static void gd_create_menus(GtkDisplayState *s) gtk_window_add_accel_group(GTK_WINDOW(s->window), s->accel_group); } -static void gd_set_keycode_type(GtkDisplayState *s) -{ -#ifdef GDK_WINDOWING_X11 - GdkDisplay *display = gtk_widget_get_display(s->window); - if (GDK_IS_X11_DISPLAY(display)) { - Display *x11_display = gdk_x11_display_get_xdisplay(display); - XkbDescPtr desc = XkbGetMap(x11_display, XkbGBN_AllComponentsMask, - XkbUseCoreKbd); - char *keycodes = NULL; - - if (desc && - (XkbGetNames(x11_display, XkbKeycodesNameMask, desc) == Success)) { - keycodes = XGetAtomName(x11_display, desc->names->keycodes); - } - if (keycodes == NULL) { - fprintf(stderr, "could not lookup keycode name\n"); - } else if (strstart(keycodes, "evdev", NULL)) { - s->has_evdev = true; - } else if (!strstart(keycodes, "xfree86", NULL)) { - fprintf(stderr, "unknown keycodes `%s', please report to " - "qemu-devel@nongnu.org\n", keycodes); - } - - if (desc) { - XkbFreeKeyboard(desc, XkbGBN_AllComponentsMask, True); - } - if (keycodes) { - XFree(keycodes); - } - } -#endif -} static gboolean gtkinit; @@ -2339,8 +2393,6 @@ void gtk_display_init(DisplayState *ds, bool full_screen, bool grab_on_hover) if (grab_on_hover) { gtk_menu_item_activate(GTK_MENU_ITEM(s->grab_on_hover_item)); } - - gd_set_keycode_type(s); } void early_gtk_display_init(int opengl) @@ -2387,6 +2439,8 @@ void early_gtk_display_init(int opengl) break; } + keycode_map = gd_get_keymap(&keycode_maplen); + #if defined(CONFIG_VTE) type_register(&char_gd_vc_type_info); #endif diff --git a/ui/input-keymap.c b/ui/input-keymap.c index 663986a17b..95b1e0cbfa 100644 --- a/ui/input-keymap.c +++ b/ui/input-keymap.c @@ -5,10 +5,18 @@ #include "standard-headers/linux/input.h" +#include "ui/input-keymap-atset1-to-qcode.c" #include "ui/input-keymap-linux-to-qcode.c" #include "ui/input-keymap-qcode-to-qnum.c" #include "ui/input-keymap-qnum-to-qcode.c" #include "ui/input-keymap-qcode-to-linux.c" +#include "ui/input-keymap-usb-to-qcode.c" +#include "ui/input-keymap-win32-to-qcode.c" +#include "ui/input-keymap-x11-to-qcode.c" +#include "ui/input-keymap-xorgevdev-to-qcode.c" +#include "ui/input-keymap-xorgkbd-to-qcode.c" +#include "ui/input-keymap-xorgxquartz-to-qcode.c" +#include "ui/input-keymap-xorgxwin-to-qcode.c" int qemu_input_linux_to_qcode(unsigned int lnx) { @@ -34,7 +34,9 @@ #include "ui/console.h" #include "ui/input.h" #include "sysemu/sysemu.h" +#ifndef WIN32 #include "x_keymap.h" +#endif #include "sdl_zoom.h" static DisplayChangeListener *dcl; @@ -48,7 +50,6 @@ static int gui_saved_width; static int gui_saved_height; static int gui_saved_grab; static int gui_fullscreen; -static int gui_noframe; static int gui_key_modifier_pressed; static int gui_keysym; static int gui_grab_code = KMOD_LALT | KMOD_LCTRL; @@ -63,6 +64,8 @@ static SDL_PixelFormat host_format; static int scaling_active = 0; static Notifier mouse_mode_notifier; static int idle_counter; +static const guint16 *keycode_map; +static size_t keycode_maplen; #define SDL_REFRESH_INTERVAL_BUSY 10 #define SDL_MAX_IDLE_COUNT (2 * GUI_REFRESH_INTERVAL_DEFAULT \ @@ -114,8 +117,9 @@ static void do_sdl_resize(int width, int height, int bpp) } else { flags |= SDL_RESIZABLE; } - if (gui_noframe) + if (no_frame) { flags |= SDL_NOFRAME; + } tmp_screen = SDL_SetVideoMode(width, height, bpp, flags); if (!real_screen) { @@ -208,94 +212,45 @@ static uint8_t sdl_keyevent_to_keycode_generic(const SDL_KeyboardEvent *ev) return keysym2scancode(kbd_layout, keysym) & SCANCODE_KEYMASK; } -/* specific keyboard conversions from scan codes */ -#if defined(_WIN32) - -static uint8_t sdl_keyevent_to_keycode(const SDL_KeyboardEvent *ev) +static const guint16 *sdl_get_keymap(size_t *maplen) { - return ev->keysym.scancode; -} - +#if defined(WIN32) + *maplen = qemu_input_map_atset1_to_qcode_len; + return qemu_input_map_atset1_to_qcode; #else - #if defined(SDL_VIDEO_DRIVER_X11) -#include <X11/XKBlib.h> - -static int check_for_evdev(void) -{ SDL_SysWMinfo info; - XkbDescPtr desc = NULL; - int has_evdev = 0; - char *keycodes = NULL; SDL_VERSION(&info.version); - if (!SDL_GetWMInfo(&info)) { - return 0; - } - desc = XkbGetMap(info.info.x11.display, - XkbGBN_AllComponentsMask, - XkbUseCoreKbd); - if (desc && - (XkbGetNames(info.info.x11.display, - XkbKeycodesNameMask, desc) == Success)) { - keycodes = XGetAtomName(info.info.x11.display, desc->names->keycodes); - if (keycodes == NULL) { - fprintf(stderr, "could not lookup keycode name\n"); - } else if (strstart(keycodes, "evdev", NULL)) { - has_evdev = 1; - } else if (!strstart(keycodes, "xfree86", NULL)) { - fprintf(stderr, "unknown keycodes `%s', please report to " - "qemu-devel@nongnu.org\n", keycodes); - } - } - - if (desc) { - XkbFreeKeyboard(desc, XkbGBN_AllComponentsMask, True); + if (SDL_GetWMInfo(&info) > 0) { + return qemu_xkeymap_mapping_table( + info.info.x11.display, maplen); } - if (keycodes) { - XFree(keycodes); - } - return has_evdev; -} -#else -static int check_for_evdev(void) -{ - return 0; -} #endif + g_warning("Unsupported SDL video driver / platform.\n" + "Assuming Linux KBD scancodes, but probably wrong.\n" + "Please report to qemu-devel@nongnu.org\n" + "including the following information:\n" + "\n" + " - Operating system\n" + " - SDL video driver\n"); + *maplen = qemu_input_map_xorgkbd_to_qcode_len; + return qemu_input_map_xorgkbd_to_qcode; +#endif +} static uint8_t sdl_keyevent_to_keycode(const SDL_KeyboardEvent *ev) { - int keycode; - static int has_evdev = -1; - - if (has_evdev == -1) - has_evdev = check_for_evdev(); - - keycode = ev->keysym.scancode; - - if (keycode < 9) { - keycode = 0; - } else if (keycode < 97) { - keycode -= 8; /* just an offset */ - } else if (keycode < 158) { - /* use conversion table */ - if (has_evdev) - keycode = translate_evdev_keycode(keycode - 97); - else - keycode = translate_xfree86_keycode(keycode - 97); - } else if (keycode == 208) { /* Hiragana_Katakana */ - keycode = 0x70; - } else if (keycode == 211) { /* backslash */ - keycode = 0x73; - } else { - keycode = 0; + if (!keycode_map) { + return 0; + } + if (ev->keysym.scancode > keycode_maplen) { + return 0; } - return keycode; -} -#endif + return keycode_map[ev->keysym.scancode]; +} static void reset_keys(void) { @@ -368,11 +323,11 @@ static void sdl_update_caption(void) status = " [Stopped]"; else if (gui_grab) { if (alt_grab) - status = " - Press Ctrl-Alt-Shift to exit mouse grab"; + status = " - Press Ctrl-Alt-Shift-G to exit mouse grab"; else if (ctrl_grab) - status = " - Press Right-Ctrl to exit mouse grab"; + status = " - Press Right-Ctrl-G to exit mouse grab"; else - status = " - Press Ctrl-Alt to exit mouse grab"; + status = " - Press Ctrl-Alt-G to exit mouse grab"; } if (qemu_name) { @@ -576,6 +531,16 @@ static void handle_keydown(SDL_Event *ev) toggle_full_screen(); gui_keysym = 1; break; + case 0x22: /* 'g' key */ + if (!gui_grab) { + if (qemu_console_is_graphic(NULL)) { + sdl_grab_start(); + } + } else if (!gui_fullscreen) { + sdl_grab_end(); + } + gui_keysym = 1; + break; case 0x16: /* 'u' key on US keyboard */ if (scaling_active) { scaling_active = 0; @@ -711,20 +676,6 @@ static void handle_keyup(SDL_Event *ev) } if (!mod_state && gui_key_modifier_pressed) { gui_key_modifier_pressed = 0; - if (gui_keysym == 0) { - /* exit/enter grab if pressing Ctrl-Alt */ - if (!gui_grab) { - if (qemu_console_is_graphic(NULL)) { - sdl_grab_start(); - } - } else if (!gui_fullscreen) { - sdl_grab_end(); - } - /* SDL does not send back all the modifiers key, so we must - * correct it. */ - reset_keys(); - return; - } gui_keysym = 0; } if (qemu_console_is_graphic(NULL) && !gui_keysym) { @@ -944,7 +895,7 @@ void sdl_display_early_init(int opengl) } } -void sdl_display_init(DisplayState *ds, int full_screen, int no_frame) +void sdl_display_init(DisplayState *ds, int full_screen) { int flags; uint8_t data = 0; @@ -963,8 +914,8 @@ void sdl_display_init(DisplayState *ds, int full_screen, int no_frame) exit(1); } - if (no_frame) - gui_noframe = 1; + g_printerr("Running QEMU with SDL 1.2 is deprecated, and will be removed\n" + "in a future release. Please switch to SDL 2.0 instead\n"); if (!full_screen) { setenv("SDL_VIDEO_ALLOW_SCREENSAVER", "1", 0); @@ -995,6 +946,8 @@ void sdl_display_init(DisplayState *ds, int full_screen, int no_frame) vi = SDL_GetVideoInfo(); host_format = *(vi->vfmt); + keycode_map = sdl_get_keymap(&keycode_maplen); + /* Load a 32x32x4 image. White pixels are transparent. */ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "qemu-icon.bmp"); if (filename) { diff --git a/ui/sdl2-input.c b/ui/sdl2-input.c index 6e315ae800..605d781971 100644 --- a/ui/sdl2-input.c +++ b/ui/sdl2-input.c @@ -30,8 +30,6 @@ #include "ui/sdl2.h" #include "sysemu/sysemu.h" -#include "sdl2-keymap.h" - static uint8_t modifiers_state[SDL_NUM_SCANCODES]; void sdl2_reset_keys(struct sdl2_console *scon) @@ -39,9 +37,11 @@ void sdl2_reset_keys(struct sdl2_console *scon) QemuConsole *con = scon ? scon->dcl.con : NULL; int i; - for (i = 0; i < SDL_NUM_SCANCODES; i++) { + for (i = 0 ; + i < SDL_NUM_SCANCODES && i < qemu_input_map_usb_to_qcode_len ; + i++) { if (modifiers_state[i]) { - int qcode = sdl2_scancode_to_qcode[i]; + int qcode = qemu_input_map_usb_to_qcode[i]; qemu_input_event_send_key_qcode(con, qcode, false); modifiers_state[i] = 0; } @@ -51,9 +51,15 @@ void sdl2_reset_keys(struct sdl2_console *scon) void sdl2_process_key(struct sdl2_console *scon, SDL_KeyboardEvent *ev) { - int qcode = sdl2_scancode_to_qcode[ev->keysym.scancode]; + int qcode; QemuConsole *con = scon ? scon->dcl.con : NULL; + if (ev->keysym.scancode >= qemu_input_map_usb_to_qcode_len) { + return; + } + + qcode = qemu_input_map_usb_to_qcode[ev->keysym.scancode]; + if (!qemu_console_is_graphic(con)) { if (ev->type == SDL_KEYDOWN) { switch (ev->keysym.scancode) { diff --git a/ui/sdl2-keymap.h b/ui/sdl2-keymap.h deleted file mode 100644 index cbedaa477d..0000000000 --- a/ui/sdl2-keymap.h +++ /dev/null @@ -1,267 +0,0 @@ - -/* map SDL2 scancodes to QKeyCode */ - -static const int sdl2_scancode_to_qcode[SDL_NUM_SCANCODES] = { - [SDL_SCANCODE_A] = Q_KEY_CODE_A, - [SDL_SCANCODE_B] = Q_KEY_CODE_B, - [SDL_SCANCODE_C] = Q_KEY_CODE_C, - [SDL_SCANCODE_D] = Q_KEY_CODE_D, - [SDL_SCANCODE_E] = Q_KEY_CODE_E, - [SDL_SCANCODE_F] = Q_KEY_CODE_F, - [SDL_SCANCODE_G] = Q_KEY_CODE_G, - [SDL_SCANCODE_H] = Q_KEY_CODE_H, - [SDL_SCANCODE_I] = Q_KEY_CODE_I, - [SDL_SCANCODE_J] = Q_KEY_CODE_J, - [SDL_SCANCODE_K] = Q_KEY_CODE_K, - [SDL_SCANCODE_L] = Q_KEY_CODE_L, - [SDL_SCANCODE_M] = Q_KEY_CODE_M, - [SDL_SCANCODE_N] = Q_KEY_CODE_N, - [SDL_SCANCODE_O] = Q_KEY_CODE_O, - [SDL_SCANCODE_P] = Q_KEY_CODE_P, - [SDL_SCANCODE_Q] = Q_KEY_CODE_Q, - [SDL_SCANCODE_R] = Q_KEY_CODE_R, - [SDL_SCANCODE_S] = Q_KEY_CODE_S, - [SDL_SCANCODE_T] = Q_KEY_CODE_T, - [SDL_SCANCODE_U] = Q_KEY_CODE_U, - [SDL_SCANCODE_V] = Q_KEY_CODE_V, - [SDL_SCANCODE_W] = Q_KEY_CODE_W, - [SDL_SCANCODE_X] = Q_KEY_CODE_X, - [SDL_SCANCODE_Y] = Q_KEY_CODE_Y, - [SDL_SCANCODE_Z] = Q_KEY_CODE_Z, - - [SDL_SCANCODE_1] = Q_KEY_CODE_1, - [SDL_SCANCODE_2] = Q_KEY_CODE_2, - [SDL_SCANCODE_3] = Q_KEY_CODE_3, - [SDL_SCANCODE_4] = Q_KEY_CODE_4, - [SDL_SCANCODE_5] = Q_KEY_CODE_5, - [SDL_SCANCODE_6] = Q_KEY_CODE_6, - [SDL_SCANCODE_7] = Q_KEY_CODE_7, - [SDL_SCANCODE_8] = Q_KEY_CODE_8, - [SDL_SCANCODE_9] = Q_KEY_CODE_9, - [SDL_SCANCODE_0] = Q_KEY_CODE_0, - - [SDL_SCANCODE_RETURN] = Q_KEY_CODE_RET, - [SDL_SCANCODE_ESCAPE] = Q_KEY_CODE_ESC, - [SDL_SCANCODE_BACKSPACE] = Q_KEY_CODE_BACKSPACE, - [SDL_SCANCODE_TAB] = Q_KEY_CODE_TAB, - [SDL_SCANCODE_SPACE] = Q_KEY_CODE_SPC, - [SDL_SCANCODE_MINUS] = Q_KEY_CODE_MINUS, - [SDL_SCANCODE_EQUALS] = Q_KEY_CODE_EQUAL, - [SDL_SCANCODE_LEFTBRACKET] = Q_KEY_CODE_BRACKET_LEFT, - [SDL_SCANCODE_RIGHTBRACKET] = Q_KEY_CODE_BRACKET_RIGHT, - [SDL_SCANCODE_BACKSLASH] = Q_KEY_CODE_BACKSLASH, -#if 0 - [SDL_SCANCODE_NONUSHASH] = Q_KEY_CODE_NONUSHASH, -#endif - [SDL_SCANCODE_SEMICOLON] = Q_KEY_CODE_SEMICOLON, - [SDL_SCANCODE_APOSTROPHE] = Q_KEY_CODE_APOSTROPHE, - [SDL_SCANCODE_GRAVE] = Q_KEY_CODE_GRAVE_ACCENT, - [SDL_SCANCODE_COMMA] = Q_KEY_CODE_COMMA, - [SDL_SCANCODE_PERIOD] = Q_KEY_CODE_DOT, - [SDL_SCANCODE_SLASH] = Q_KEY_CODE_SLASH, - [SDL_SCANCODE_CAPSLOCK] = Q_KEY_CODE_CAPS_LOCK, - - [SDL_SCANCODE_F1] = Q_KEY_CODE_F1, - [SDL_SCANCODE_F2] = Q_KEY_CODE_F2, - [SDL_SCANCODE_F3] = Q_KEY_CODE_F3, - [SDL_SCANCODE_F4] = Q_KEY_CODE_F4, - [SDL_SCANCODE_F5] = Q_KEY_CODE_F5, - [SDL_SCANCODE_F6] = Q_KEY_CODE_F6, - [SDL_SCANCODE_F7] = Q_KEY_CODE_F7, - [SDL_SCANCODE_F8] = Q_KEY_CODE_F8, - [SDL_SCANCODE_F9] = Q_KEY_CODE_F9, - [SDL_SCANCODE_F10] = Q_KEY_CODE_F10, - [SDL_SCANCODE_F11] = Q_KEY_CODE_F11, - [SDL_SCANCODE_F12] = Q_KEY_CODE_F12, - - [SDL_SCANCODE_PRINTSCREEN] = Q_KEY_CODE_PRINT, - [SDL_SCANCODE_SCROLLLOCK] = Q_KEY_CODE_SCROLL_LOCK, - [SDL_SCANCODE_PAUSE] = Q_KEY_CODE_PAUSE, - [SDL_SCANCODE_INSERT] = Q_KEY_CODE_INSERT, - [SDL_SCANCODE_HOME] = Q_KEY_CODE_HOME, - [SDL_SCANCODE_PAGEUP] = Q_KEY_CODE_PGUP, - [SDL_SCANCODE_DELETE] = Q_KEY_CODE_DELETE, - [SDL_SCANCODE_END] = Q_KEY_CODE_END, - [SDL_SCANCODE_PAGEDOWN] = Q_KEY_CODE_PGDN, - [SDL_SCANCODE_RIGHT] = Q_KEY_CODE_RIGHT, - [SDL_SCANCODE_LEFT] = Q_KEY_CODE_LEFT, - [SDL_SCANCODE_DOWN] = Q_KEY_CODE_DOWN, - [SDL_SCANCODE_UP] = Q_KEY_CODE_UP, - [SDL_SCANCODE_NUMLOCKCLEAR] = Q_KEY_CODE_NUM_LOCK, - - [SDL_SCANCODE_KP_DIVIDE] = Q_KEY_CODE_KP_DIVIDE, - [SDL_SCANCODE_KP_MULTIPLY] = Q_KEY_CODE_KP_MULTIPLY, - [SDL_SCANCODE_KP_MINUS] = Q_KEY_CODE_KP_SUBTRACT, - [SDL_SCANCODE_KP_PLUS] = Q_KEY_CODE_KP_ADD, - [SDL_SCANCODE_KP_ENTER] = Q_KEY_CODE_KP_ENTER, - [SDL_SCANCODE_KP_1] = Q_KEY_CODE_KP_1, - [SDL_SCANCODE_KP_2] = Q_KEY_CODE_KP_2, - [SDL_SCANCODE_KP_3] = Q_KEY_CODE_KP_3, - [SDL_SCANCODE_KP_4] = Q_KEY_CODE_KP_4, - [SDL_SCANCODE_KP_5] = Q_KEY_CODE_KP_5, - [SDL_SCANCODE_KP_6] = Q_KEY_CODE_KP_6, - [SDL_SCANCODE_KP_7] = Q_KEY_CODE_KP_7, - [SDL_SCANCODE_KP_8] = Q_KEY_CODE_KP_8, - [SDL_SCANCODE_KP_9] = Q_KEY_CODE_KP_9, - [SDL_SCANCODE_KP_0] = Q_KEY_CODE_KP_0, - [SDL_SCANCODE_KP_PERIOD] = Q_KEY_CODE_KP_DECIMAL, - - [SDL_SCANCODE_NONUSBACKSLASH] = Q_KEY_CODE_LESS, - [SDL_SCANCODE_APPLICATION] = Q_KEY_CODE_MENU, -#if 0 - [SDL_SCANCODE_POWER] = Q_KEY_CODE_POWER, - [SDL_SCANCODE_KP_EQUALS] = Q_KEY_CODE_KP_EQUALS, - - [SDL_SCANCODE_F13] = Q_KEY_CODE_F13, - [SDL_SCANCODE_F14] = Q_KEY_CODE_F14, - [SDL_SCANCODE_F15] = Q_KEY_CODE_F15, - [SDL_SCANCODE_F16] = Q_KEY_CODE_F16, - [SDL_SCANCODE_F17] = Q_KEY_CODE_F17, - [SDL_SCANCODE_F18] = Q_KEY_CODE_F18, - [SDL_SCANCODE_F19] = Q_KEY_CODE_F19, - [SDL_SCANCODE_F20] = Q_KEY_CODE_F20, - [SDL_SCANCODE_F21] = Q_KEY_CODE_F21, - [SDL_SCANCODE_F22] = Q_KEY_CODE_F22, - [SDL_SCANCODE_F23] = Q_KEY_CODE_F23, - [SDL_SCANCODE_F24] = Q_KEY_CODE_F24, - - [SDL_SCANCODE_EXECUTE] = Q_KEY_CODE_EXECUTE, -#endif - [SDL_SCANCODE_HELP] = Q_KEY_CODE_HELP, - [SDL_SCANCODE_MENU] = Q_KEY_CODE_MENU, -#if 0 - [SDL_SCANCODE_SELECT] = Q_KEY_CODE_SELECT, -#endif - [SDL_SCANCODE_STOP] = Q_KEY_CODE_STOP, - [SDL_SCANCODE_AGAIN] = Q_KEY_CODE_AGAIN, - [SDL_SCANCODE_UNDO] = Q_KEY_CODE_UNDO, - [SDL_SCANCODE_CUT] = Q_KEY_CODE_CUT, - [SDL_SCANCODE_COPY] = Q_KEY_CODE_COPY, - [SDL_SCANCODE_PASTE] = Q_KEY_CODE_PASTE, - [SDL_SCANCODE_FIND] = Q_KEY_CODE_FIND, -#if 0 - [SDL_SCANCODE_MUTE] = Q_KEY_CODE_MUTE, - [SDL_SCANCODE_VOLUMEUP] = Q_KEY_CODE_VOLUMEUP, - [SDL_SCANCODE_VOLUMEDOWN] = Q_KEY_CODE_VOLUMEDOWN, - - [SDL_SCANCODE_KP_COMMA] = Q_KEY_CODE_KP_COMMA, - [SDL_SCANCODE_KP_EQUALSAS400] = Q_KEY_CODE_KP_EQUALSAS400, - - [SDL_SCANCODE_INTERNATIONAL1] = Q_KEY_CODE_INTERNATIONAL1, - [SDL_SCANCODE_INTERNATIONAL2] = Q_KEY_CODE_INTERNATIONAL2, - [SDL_SCANCODE_INTERNATIONAL3] = Q_KEY_CODE_INTERNATIONAL3, - [SDL_SCANCODE_INTERNATIONAL4] = Q_KEY_CODE_INTERNATIONAL4, - [SDL_SCANCODE_INTERNATIONAL5] = Q_KEY_CODE_INTERNATIONAL5, - [SDL_SCANCODE_INTERNATIONAL6] = Q_KEY_CODE_INTERNATIONAL6, - [SDL_SCANCODE_INTERNATIONAL7] = Q_KEY_CODE_INTERNATIONAL7, - [SDL_SCANCODE_INTERNATIONAL8] = Q_KEY_CODE_INTERNATIONAL8, - [SDL_SCANCODE_INTERNATIONAL9] = Q_KEY_CODE_INTERNATIONAL9, - [SDL_SCANCODE_LANG1] = Q_KEY_CODE_LANG1, - [SDL_SCANCODE_LANG2] = Q_KEY_CODE_LANG2, - [SDL_SCANCODE_LANG3] = Q_KEY_CODE_LANG3, - [SDL_SCANCODE_LANG4] = Q_KEY_CODE_LANG4, - [SDL_SCANCODE_LANG5] = Q_KEY_CODE_LANG5, - [SDL_SCANCODE_LANG6] = Q_KEY_CODE_LANG6, - [SDL_SCANCODE_LANG7] = Q_KEY_CODE_LANG7, - [SDL_SCANCODE_LANG8] = Q_KEY_CODE_LANG8, - [SDL_SCANCODE_LANG9] = Q_KEY_CODE_LANG9, - [SDL_SCANCODE_ALTERASE] = Q_KEY_CODE_ALTERASE, -#endif - [SDL_SCANCODE_SYSREQ] = Q_KEY_CODE_SYSRQ, -#if 0 - [SDL_SCANCODE_CANCEL] = Q_KEY_CODE_CANCEL, - [SDL_SCANCODE_CLEAR] = Q_KEY_CODE_CLEAR, - [SDL_SCANCODE_PRIOR] = Q_KEY_CODE_PRIOR, - [SDL_SCANCODE_RETURN2] = Q_KEY_CODE_RETURN2, - [SDL_SCANCODE_SEPARATOR] = Q_KEY_CODE_SEPARATOR, - [SDL_SCANCODE_OUT] = Q_KEY_CODE_OUT, - [SDL_SCANCODE_OPER] = Q_KEY_CODE_OPER, - [SDL_SCANCODE_CLEARAGAIN] = Q_KEY_CODE_CLEARAGAIN, - [SDL_SCANCODE_CRSEL] = Q_KEY_CODE_CRSEL, - [SDL_SCANCODE_EXSEL] = Q_KEY_CODE_EXSEL, - [SDL_SCANCODE_KP_00] = Q_KEY_CODE_KP_00, - [SDL_SCANCODE_KP_000] = Q_KEY_CODE_KP_000, - [SDL_SCANCODE_THOUSANDSSEPARATOR] = Q_KEY_CODE_THOUSANDSSEPARATOR, - [SDL_SCANCODE_DECIMALSEPARATOR] = Q_KEY_CODE_DECIMALSEPARATOR, - [SDL_SCANCODE_CURRENCYUNIT] = Q_KEY_CODE_CURRENCYUNIT, - [SDL_SCANCODE_CURRENCYSUBUNIT] = Q_KEY_CODE_CURRENCYSUBUNIT, - [SDL_SCANCODE_KP_LEFTPAREN] = Q_KEY_CODE_KP_LEFTPAREN, - [SDL_SCANCODE_KP_RIGHTPAREN] = Q_KEY_CODE_KP_RIGHTPAREN, - [SDL_SCANCODE_KP_LEFTBRACE] = Q_KEY_CODE_KP_LEFTBRACE, - [SDL_SCANCODE_KP_RIGHTBRACE] = Q_KEY_CODE_KP_RIGHTBRACE, - [SDL_SCANCODE_KP_TAB] = Q_KEY_CODE_KP_TAB, - [SDL_SCANCODE_KP_BACKSPACE] = Q_KEY_CODE_KP_BACKSPACE, - [SDL_SCANCODE_KP_A] = Q_KEY_CODE_KP_A, - [SDL_SCANCODE_KP_B] = Q_KEY_CODE_KP_B, - [SDL_SCANCODE_KP_C] = Q_KEY_CODE_KP_C, - [SDL_SCANCODE_KP_D] = Q_KEY_CODE_KP_D, - [SDL_SCANCODE_KP_E] = Q_KEY_CODE_KP_E, - [SDL_SCANCODE_KP_F] = Q_KEY_CODE_KP_F, - [SDL_SCANCODE_KP_XOR] = Q_KEY_CODE_KP_XOR, - [SDL_SCANCODE_KP_POWER] = Q_KEY_CODE_KP_POWER, - [SDL_SCANCODE_KP_PERCENT] = Q_KEY_CODE_KP_PERCENT, - [SDL_SCANCODE_KP_LESS] = Q_KEY_CODE_KP_LESS, - [SDL_SCANCODE_KP_GREATER] = Q_KEY_CODE_KP_GREATER, - [SDL_SCANCODE_KP_AMPERSAND] = Q_KEY_CODE_KP_AMPERSAND, - [SDL_SCANCODE_KP_DBLAMPERSAND] = Q_KEY_CODE_KP_DBLAMPERSAND, - [SDL_SCANCODE_KP_VERTICALBAR] = Q_KEY_CODE_KP_VERTICALBAR, - [SDL_SCANCODE_KP_DBLVERTICALBAR] = Q_KEY_CODE_KP_DBLVERTICALBAR, - [SDL_SCANCODE_KP_COLON] = Q_KEY_CODE_KP_COLON, - [SDL_SCANCODE_KP_HASH] = Q_KEY_CODE_KP_HASH, - [SDL_SCANCODE_KP_SPACE] = Q_KEY_CODE_KP_SPACE, - [SDL_SCANCODE_KP_AT] = Q_KEY_CODE_KP_AT, - [SDL_SCANCODE_KP_EXCLAM] = Q_KEY_CODE_KP_EXCLAM, - [SDL_SCANCODE_KP_MEMSTORE] = Q_KEY_CODE_KP_MEMSTORE, - [SDL_SCANCODE_KP_MEMRECALL] = Q_KEY_CODE_KP_MEMRECALL, - [SDL_SCANCODE_KP_MEMCLEAR] = Q_KEY_CODE_KP_MEMCLEAR, - [SDL_SCANCODE_KP_MEMADD] = Q_KEY_CODE_KP_MEMADD, - [SDL_SCANCODE_KP_MEMSUBTRACT] = Q_KEY_CODE_KP_MEMSUBTRACT, - [SDL_SCANCODE_KP_MEMMULTIPLY] = Q_KEY_CODE_KP_MEMMULTIPLY, - [SDL_SCANCODE_KP_MEMDIVIDE] = Q_KEY_CODE_KP_MEMDIVIDE, - [SDL_SCANCODE_KP_PLUSMINUS] = Q_KEY_CODE_KP_PLUSMINUS, - [SDL_SCANCODE_KP_CLEAR] = Q_KEY_CODE_KP_CLEAR, - [SDL_SCANCODE_KP_CLEARENTRY] = Q_KEY_CODE_KP_CLEARENTRY, - [SDL_SCANCODE_KP_BINARY] = Q_KEY_CODE_KP_BINARY, - [SDL_SCANCODE_KP_OCTAL] = Q_KEY_CODE_KP_OCTAL, - [SDL_SCANCODE_KP_DECIMAL] = Q_KEY_CODE_KP_DECIMAL, - [SDL_SCANCODE_KP_HEXADECIMAL] = Q_KEY_CODE_KP_HEXADECIMAL, -#endif - [SDL_SCANCODE_LCTRL] = Q_KEY_CODE_CTRL, - [SDL_SCANCODE_LSHIFT] = Q_KEY_CODE_SHIFT, - [SDL_SCANCODE_LALT] = Q_KEY_CODE_ALT, - [SDL_SCANCODE_LGUI] = Q_KEY_CODE_META_L, - [SDL_SCANCODE_RCTRL] = Q_KEY_CODE_CTRL_R, - [SDL_SCANCODE_RSHIFT] = Q_KEY_CODE_SHIFT_R, - [SDL_SCANCODE_RALT] = Q_KEY_CODE_ALT_R, - [SDL_SCANCODE_RGUI] = Q_KEY_CODE_META_R, -#if 0 - [SDL_SCANCODE_MODE] = Q_KEY_CODE_MODE, - [SDL_SCANCODE_AUDIONEXT] = Q_KEY_CODE_AUDIONEXT, - [SDL_SCANCODE_AUDIOPREV] = Q_KEY_CODE_AUDIOPREV, - [SDL_SCANCODE_AUDIOSTOP] = Q_KEY_CODE_AUDIOSTOP, - [SDL_SCANCODE_AUDIOPLAY] = Q_KEY_CODE_AUDIOPLAY, - [SDL_SCANCODE_AUDIOMUTE] = Q_KEY_CODE_AUDIOMUTE, - [SDL_SCANCODE_MEDIASELECT] = Q_KEY_CODE_MEDIASELECT, - [SDL_SCANCODE_WWW] = Q_KEY_CODE_WWW, - [SDL_SCANCODE_MAIL] = Q_KEY_CODE_MAIL, - [SDL_SCANCODE_CALCULATOR] = Q_KEY_CODE_CALCULATOR, - [SDL_SCANCODE_COMPUTER] = Q_KEY_CODE_COMPUTER, - [SDL_SCANCODE_AC_SEARCH] = Q_KEY_CODE_AC_SEARCH, - [SDL_SCANCODE_AC_HOME] = Q_KEY_CODE_AC_HOME, - [SDL_SCANCODE_AC_BACK] = Q_KEY_CODE_AC_BACK, - [SDL_SCANCODE_AC_FORWARD] = Q_KEY_CODE_AC_FORWARD, - [SDL_SCANCODE_AC_STOP] = Q_KEY_CODE_AC_STOP, - [SDL_SCANCODE_AC_REFRESH] = Q_KEY_CODE_AC_REFRESH, - [SDL_SCANCODE_AC_BOOKMARKS] = Q_KEY_CODE_AC_BOOKMARKS, - [SDL_SCANCODE_BRIGHTNESSDOWN] = Q_KEY_CODE_BRIGHTNESSDOWN, - [SDL_SCANCODE_BRIGHTNESSUP] = Q_KEY_CODE_BRIGHTNESSUP, - [SDL_SCANCODE_DISPLAYSWITCH] = Q_KEY_CODE_DISPLAYSWITCH, - [SDL_SCANCODE_KBDILLUMTOGGLE] = Q_KEY_CODE_KBDILLUMTOGGLE, - [SDL_SCANCODE_KBDILLUMDOWN] = Q_KEY_CODE_KBDILLUMDOWN, - [SDL_SCANCODE_KBDILLUMUP] = Q_KEY_CODE_KBDILLUMUP, - [SDL_SCANCODE_EJECT] = Q_KEY_CODE_EJECT, - [SDL_SCANCODE_SLEEP] = Q_KEY_CODE_SLEEP, - [SDL_SCANCODE_APP1] = Q_KEY_CODE_APP1, - [SDL_SCANCODE_APP2] = Q_KEY_CODE_APP2, -#endif -}; @@ -38,7 +38,6 @@ static int gui_grab; /* if true, all keyboard/mouse events are grabbed */ static int gui_saved_grab; static int gui_fullscreen; -static int gui_noframe; static int gui_key_modifier_pressed; static int gui_keysym; static int gui_grab_code = KMOD_LALT | KMOD_LCTRL; @@ -141,11 +140,11 @@ static void sdl_update_caption(struct sdl2_console *scon) status = " [Stopped]"; } else if (gui_grab) { if (alt_grab) { - status = " - Press Ctrl-Alt-Shift to exit grab"; + status = " - Press Ctrl-Alt-Shift-G to exit grab"; } else if (ctrl_grab) { - status = " - Press Right-Ctrl to exit grab"; + status = " - Press Right-Ctrl-G to exit grab"; } else { - status = " - Press Ctrl-Alt to exit grab"; + status = " - Press Ctrl-Alt-G to exit grab"; } } @@ -364,6 +363,14 @@ static void handle_keydown(SDL_Event *ev) toggle_full_screen(scon); gui_keysym = 1; break; + case SDL_SCANCODE_G: + gui_keysym = 1; + if (!gui_grab) { + sdl_grab_start(scon); + } else if (!gui_fullscreen) { + sdl_grab_end(scon); + } + break; case SDL_SCANCODE_U: sdl2_window_destroy(scon); sdl2_window_create(scon); @@ -416,19 +423,6 @@ static void handle_keyup(SDL_Event *ev) } if (!mod_state && gui_key_modifier_pressed) { gui_key_modifier_pressed = 0; - if (gui_keysym == 0) { - /* exit/enter grab if pressing Ctrl-Alt */ - if (!gui_grab) { - sdl_grab_start(scon); - } else if (!gui_fullscreen) { - sdl_grab_end(scon); - } - /* SDL does not send back all the modifiers key, so we must - * correct it. */ - sdl2_reset_keys(scon); - return; - } - sdl2_reset_keys(scon); gui_keysym = 0; } if (!gui_keysym) { @@ -772,7 +766,7 @@ void sdl_display_early_init(int opengl) } } -void sdl_display_init(DisplayState *ds, int full_screen, int no_frame) +void sdl_display_init(DisplayState *ds, int full_screen) { int flags; uint8_t data = 0; @@ -780,10 +774,6 @@ void sdl_display_init(DisplayState *ds, int full_screen, int no_frame) int i; SDL_SysWMinfo info; - if (no_frame) { - gui_noframe = 1; - } - #ifdef __linux__ /* on Linux, SDL may use fbcon|directfb|svgalib when run without * accessible $DISPLAY to open X11 window. This is often the case diff --git a/ui/trace-events b/ui/trace-events index 85f74f948b..34229e6747 100644 --- a/ui/trace-events +++ b/ui/trace-events @@ -18,9 +18,10 @@ ppm_save(const char *filename, void *display_surface) "%s surface=%p" # ui/gtk.c gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d" gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d" -gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)" +gd_key_event(const char *tab, int gdk_keycode, int qkeycode, const char *action) "tab=%s, translated GDK keycode %d to QKeyCode %d (%s)" gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s" gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s" +gd_keymap_windowing(const char *name) "backend=%s" # ui/vnc.c vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d" @@ -79,3 +80,9 @@ qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t b keymap_parse(const char *file) "file %s" keymap_add(const char *type, int sym, int code, const char *line) "%-6s sym=0x%04x code=0x%04x (line: %s)" keymap_unmapped(int sym) "sym=0x%04x" + +# ui/x_keymap.c +xkeymap_extension(const char *name) "extension '%s'" +xkeymap_vendor(const char *name) "vendor '%s'" +xkeymap_keycodes(const char *name) "keycodes '%s'" +xkeymap_keymap(const char *name) "keymap '%s'" @@ -672,6 +672,11 @@ static void vnc_desktop_resize(VncState *vs) vs->client_height == pixman_image_get_height(vs->vd->server)) { return; } + + assert(pixman_image_get_width(vs->vd->server) < 65536 && + pixman_image_get_width(vs->vd->server) >= 0); + assert(pixman_image_get_height(vs->vd->server) < 65536 && + pixman_image_get_height(vs->vd->server) >= 0); vs->client_width = pixman_image_get_width(vs->vd->server); vs->client_height = pixman_image_get_height(vs->vd->server); vnc_lock_output(vs); @@ -2490,6 +2495,10 @@ static int protocol_client_init(VncState *vs, uint8_t *data, size_t len) return 0; } + assert(pixman_image_get_width(vs->vd->server) < 65536 && + pixman_image_get_width(vs->vd->server) >= 0); + assert(pixman_image_get_height(vs->vd->server) < 65536 && + pixman_image_get_height(vs->vd->server) >= 0); vs->client_width = pixman_image_get_width(vs->vd->server); vs->client_height = pixman_image_get_height(vs->vd->server); vnc_write_u16(vs, vs->client_width); @@ -278,8 +278,8 @@ struct VncState int last_x; int last_y; uint32_t last_bmask; - int client_width; - int client_height; + size_t client_width; /* limited to u16 by RFB proto */ + size_t client_height; /* limited to u16 by RFB proto */ VncShareMode share_mode; uint32_t vnc_encoding; diff --git a/ui/x_keymap.c b/ui/x_keymap.c index 27884851de..22e0e77c4d 100644 --- a/ui/x_keymap.c +++ b/ui/x_keymap.c @@ -1,169 +1,111 @@ /* - * QEMU SDL display driver + * QEMU X11 keymaps * - * Copyright (c) 2003 Fabrice Bellard + * Copyright (C) 2009-2010 Daniel P. Berrange <dan@berrange.com> + * Copyright (C) 2017 Red Hat, Inc * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2 as + * published by the Free Software Foundation. */ + #include "qemu/osdep.h" -#include "qemu-common.h" + #include "x_keymap.h" +#include "trace.h" +#include "qemu/notify.h" +#include "ui/input.h" -static const uint8_t x_keycode_to_pc_keycode[115] = { - 0xc7, /* 97 Home */ - 0xc8, /* 98 Up */ - 0xc9, /* 99 PgUp */ - 0xcb, /* 100 Left */ - 0x4c, /* 101 KP-5 */ - 0xcd, /* 102 Right */ - 0xcf, /* 103 End */ - 0xd0, /* 104 Down */ - 0xd1, /* 105 PgDn */ - 0xd2, /* 106 Ins */ - 0xd3, /* 107 Del */ - 0x9c, /* 108 Enter */ - 0x9d, /* 109 Ctrl-R */ - 0x0, /* 110 Pause */ - 0xb7, /* 111 Print */ - 0xb5, /* 112 Divide */ - 0xb8, /* 113 Alt-R */ - 0xc6, /* 114 Break */ - 0x0, /* 115 */ - 0x0, /* 116 */ - 0x0, /* 117 */ - 0x0, /* 118 */ - 0x0, /* 119 */ - 0x0, /* 120 */ - 0x0, /* 121 */ - 0x0, /* 122 */ - 0x0, /* 123 */ - 0x0, /* 124 */ - 0x0, /* 125 */ - 0x0, /* 126 */ - 0x0, /* 127 */ - 0x0, /* 128 */ - 0x79, /* 129 Henkan */ - 0x0, /* 130 */ - 0x7b, /* 131 Muhenkan */ - 0x0, /* 132 */ - 0x7d, /* 133 Yen */ - 0x0, /* 134 */ - 0x0, /* 135 */ - 0x47, /* 136 KP_7 */ - 0x48, /* 137 KP_8 */ - 0x49, /* 138 KP_9 */ - 0x4b, /* 139 KP_4 */ - 0x4c, /* 140 KP_5 */ - 0x4d, /* 141 KP_6 */ - 0x4f, /* 142 KP_1 */ - 0x50, /* 143 KP_2 */ - 0x51, /* 144 KP_3 */ - 0x52, /* 145 KP_0 */ - 0x53, /* 146 KP_. */ - 0x47, /* 147 KP_HOME */ - 0x48, /* 148 KP_UP */ - 0x49, /* 149 KP_PgUp */ - 0x4b, /* 150 KP_Left */ - 0x4c, /* 151 KP_ */ - 0x4d, /* 152 KP_Right */ - 0x4f, /* 153 KP_End */ - 0x50, /* 154 KP_Down */ - 0x51, /* 155 KP_PgDn */ - 0x52, /* 156 KP_Ins */ - 0x53, /* 157 KP_Del */ -}; +#include <X11/XKBlib.h> -/* This table is generated based off the xfree86 -> scancode mapping above - * and the keycode mappings in /usr/share/X11/xkb/keycodes/evdev - * and /usr/share/X11/xkb/keycodes/xfree86 - */ +static gboolean check_for_xwin(Display *dpy) +{ + const char *vendor = ServerVendor(dpy); + + trace_xkeymap_vendor(vendor); -static const uint8_t evdev_keycode_to_pc_keycode[61] = { - 0x73, /* 97 EVDEV - RO ("Internet" Keyboards) */ - 0, /* 98 EVDEV - KATA (Katakana) */ - 0, /* 99 EVDEV - HIRA (Hiragana) */ - 0x79, /* 100 EVDEV - HENK (Henkan) */ - 0x70, /* 101 EVDEV - HKTG (Hiragana/Katakana toggle) */ - 0x7b, /* 102 EVDEV - MUHE (Muhenkan) */ - 0, /* 103 EVDEV - JPCM (KPJPComma) */ - 0x9c, /* 104 KPEN */ - 0x9d, /* 105 RCTL */ - 0xb5, /* 106 KPDV */ - 0xb7, /* 107 PRSC */ - 0xb8, /* 108 RALT */ - 0, /* 109 EVDEV - LNFD ("Internet" Keyboards) */ - 0xc7, /* 110 HOME */ - 0xc8, /* 111 UP */ - 0xc9, /* 112 PGUP */ - 0xcb, /* 113 LEFT */ - 0xcd, /* 114 RGHT */ - 0xcf, /* 115 END */ - 0xd0, /* 116 DOWN */ - 0xd1, /* 117 PGDN */ - 0xd2, /* 118 INS */ - 0xd3, /* 119 DELE */ - 0, /* 120 EVDEV - I120 ("Internet" Keyboards) */ - 0, /* 121 EVDEV - MUTE */ - 0, /* 122 EVDEV - VOL- */ - 0, /* 123 EVDEV - VOL+ */ - 0, /* 124 EVDEV - POWR */ - 0, /* 125 EVDEV - KPEQ */ - 0, /* 126 EVDEV - I126 ("Internet" Keyboards) */ - 0, /* 127 EVDEV - PAUS */ - 0, /* 128 EVDEV - ???? */ - 0x7e, /* 129 EVDEV - KP_COMMA (brazilian) */ - 0xf1, /* 130 EVDEV - HNGL (Korean Hangul Latin toggle) */ - 0xf2, /* 131 EVDEV - HJCV (Korean Hangul Hanja toggle) */ - 0x7d, /* 132 AE13 (Yen)*/ - 0xdb, /* 133 EVDEV - LWIN */ - 0xdc, /* 134 EVDEV - RWIN */ - 0xdd, /* 135 EVDEV - MENU */ - 0, /* 136 EVDEV - STOP */ - 0, /* 137 EVDEV - AGAI */ - 0, /* 138 EVDEV - PROP */ - 0, /* 139 EVDEV - UNDO */ - 0, /* 140 EVDEV - FRNT */ - 0, /* 141 EVDEV - COPY */ - 0, /* 142 EVDEV - OPEN */ - 0, /* 143 EVDEV - PAST */ - 0, /* 144 EVDEV - FIND */ - 0, /* 145 EVDEV - CUT */ - 0, /* 146 EVDEV - HELP */ - 0, /* 147 EVDEV - I147 */ - 0, /* 148 EVDEV - I148 */ - 0, /* 149 EVDEV - I149 */ - 0, /* 150 EVDEV - I150 */ - 0, /* 151 EVDEV - I151 */ - 0, /* 152 EVDEV - I152 */ - 0, /* 153 EVDEV - I153 */ - 0, /* 154 EVDEV - I154 */ - 0, /* 155 EVDEV - I156 */ - 0, /* 156 EVDEV - I157 */ - 0, /* 157 EVDEV - I158 */ -}; + if (strstr(vendor, "Cygwin/X")) { + return TRUE; + } -uint8_t translate_xfree86_keycode(const int key) + return FALSE; +} + +static gboolean check_for_xquartz(Display *dpy) { - return x_keycode_to_pc_keycode[key]; + int nextensions; + int i; + gboolean match = FALSE; + char **extensions = XListExtensions(dpy, &nextensions); + for (i = 0 ; extensions != NULL && i < nextensions ; i++) { + trace_xkeymap_extension(extensions[i]); + if (strcmp(extensions[i], "Apple-WM") == 0 || + strcmp(extensions[i], "Apple-DRI") == 0) { + match = TRUE; + } + } + if (extensions) { + XFreeExtensionList(extensions); + } + + return match; } -uint8_t translate_evdev_keycode(const int key) +const guint16 *qemu_xkeymap_mapping_table(Display *dpy, size_t *maplen) { - return evdev_keycode_to_pc_keycode[key]; + XkbDescPtr desc; + const gchar *keycodes = NULL; + + /* There is no easy way to determine what X11 server + * and platform & keyboard driver is in use. Thus we + * do best guess heuristics. + * + * This will need more work for people with other + * X servers..... patches welcomed. + */ + + desc = XkbGetMap(dpy, + XkbGBN_AllComponentsMask, + XkbUseCoreKbd); + if (desc) { + if (XkbGetNames(dpy, XkbKeycodesNameMask, desc) == Success) { + keycodes = XGetAtomName (dpy, desc->names->keycodes); + if (!keycodes) { + g_warning("could not lookup keycode name"); + } else { + trace_xkeymap_keycodes(keycodes); + } + } + XkbFreeKeyboard(desc, XkbGBN_AllComponentsMask, True); + } + + if (check_for_xwin(dpy)) { + trace_xkeymap_keymap("xwin"); + *maplen = qemu_input_map_xorgxwin_to_qcode_len; + return qemu_input_map_xorgxwin_to_qcode; + } else if (check_for_xquartz(dpy)) { + trace_xkeymap_keymap("xquartz"); + *maplen = qemu_input_map_xorgxquartz_to_qcode_len; + return qemu_input_map_xorgxquartz_to_qcode; + } else if (keycodes && g_str_has_prefix(keycodes, "evdev")) { + trace_xkeymap_keymap("evdev"); + *maplen = qemu_input_map_xorgevdev_to_qcode_len; + return qemu_input_map_xorgevdev_to_qcode; + } else if (keycodes && g_str_has_prefix(keycodes, "xfree86")) { + trace_xkeymap_keymap("kbd"); + *maplen = qemu_input_map_xorgkbd_to_qcode_len; + return qemu_input_map_xorgkbd_to_qcode; + } else { + trace_xkeymap_keymap("NULL"); + g_warning("Unknown X11 keycode mapping '%s'.\n" + "Please report to qemu-devel@nongnu.org\n" + "including the following information:\n" + "\n" + " - Operating system\n" + " - X11 Server\n" + " - xprop -root\n" + " - xdpyinfo\n", + keycodes ? keycodes : "<null>"); + return NULL; + } } diff --git a/ui/x_keymap.h b/ui/x_keymap.h index afde2e94bf..0395e335ff 100644 --- a/ui/x_keymap.h +++ b/ui/x_keymap.h @@ -1,7 +1,7 @@ /* - * QEMU SDL display driver + * QEMU X11 keymaps * - * Copyright (c) 2003 Fabrice Bellard + * Copyright (c) 2017 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -25,8 +25,8 @@ #ifndef QEMU_X_KEYMAP_H #define QEMU_X_KEYMAP_H -uint8_t translate_xfree86_keycode(const int key); +#include <X11/Xlib.h> -uint8_t translate_evdev_keycode(const int key); +const guint16 *qemu_xkeymap_mapping_table(Display *dpy, size_t *maplen); #endif @@ -150,7 +150,7 @@ static int rtc_date_offset = -1; /* -1 means no change */ QEMUClockType rtc_clock; int vga_interface_type = VGA_NONE; static int full_screen = 0; -static int no_frame = 0; +int no_frame; int no_quit = 0; static bool grab_on_hover; Chardev *serial_hds[MAX_SERIAL_PORTS]; @@ -4694,7 +4694,7 @@ int main(int argc, char **argv, char **envp) curses_display_init(ds, full_screen); break; case DT_SDL: - sdl_display_init(ds, full_screen, no_frame); + sdl_display_init(ds, full_screen); break; case DT_COCOA: cocoa_display_init(ds, full_screen); |