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-rw-r--r--target-arm/cpu.h4
-rw-r--r--target-arm/helper.c4
-rw-r--r--target-arm/machine.c6
-rw-r--r--target-arm/translate.c4
4 files changed, 12 insertions, 6 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 60414ac088..5919dfda74 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -143,7 +143,7 @@ typedef struct CPUARMState {
uint32_t spsr;
/* Banked registers. */
- uint64_t banked_spsr[6];
+ uint64_t banked_spsr[8];
uint32_t banked_r13[6];
uint32_t banked_r14[6];
@@ -563,7 +563,9 @@ enum arm_cpu_mode {
ARM_CPU_MODE_FIQ = 0x11,
ARM_CPU_MODE_IRQ = 0x12,
ARM_CPU_MODE_SVC = 0x13,
+ ARM_CPU_MODE_MON = 0x16,
ARM_CPU_MODE_ABT = 0x17,
+ ARM_CPU_MODE_HYP = 0x1a,
ARM_CPU_MODE_UND = 0x1b,
ARM_CPU_MODE_SYS = 0x1f
};
diff --git a/target-arm/helper.c b/target-arm/helper.c
index eb5a83261b..368413ca0b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3108,6 +3108,10 @@ int bank_number(int mode)
return 4;
case ARM_CPU_MODE_FIQ:
return 5;
+ case ARM_CPU_MODE_HYP:
+ return 6;
+ case ARM_CPU_MODE_MON:
+ return 7;
}
hw_error("bank number requested for bad CPSR mode value 0x%x\n", mode);
}
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 233e70d824..3bcc7cc833 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -218,8 +218,8 @@ static int cpu_post_load(void *opaque, int version_id)
const VMStateDescription vmstate_arm_cpu = {
.name = "cpu",
- .version_id = 19,
- .minimum_version_id = 19,
+ .version_id = 20,
+ .minimum_version_id = 20,
.pre_save = cpu_pre_save,
.post_load = cpu_post_load,
.fields = (VMStateField[]) {
@@ -233,7 +233,7 @@ const VMStateDescription vmstate_arm_cpu = {
.offset = 0,
},
VMSTATE_UINT32(env.spsr, ARMCPU),
- VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 6),
+ VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8),
VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6),
VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6),
VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 08732a0c05..c2dfbfe477 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11052,8 +11052,8 @@ void gen_intermediate_code_pc(CPUARMState *env, TranslationBlock *tb)
}
static const char *cpu_mode_names[16] = {
- "usr", "fiq", "irq", "svc", "???", "???", "???", "abt",
- "???", "???", "???", "und", "???", "???", "???", "sys"
+ "usr", "fiq", "irq", "svc", "???", "???", "mon", "abt",
+ "???", "???", "hyp", "und", "???", "???", "???", "sys"
};
void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,