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authorRichard Henderson <rth@twiddle.net>2015-10-02 22:25:28 +0000
committerRichard Henderson <rth@twiddle.net>2015-10-19 11:04:37 -1000
commit5bfd75a35c11dd3aa61c73d0d2cd88137c31519c (patch)
tree05f40158ebb5ab859bcd4c2b51f55df3225fc575 /translate-all.c
parent70f897bdc4ce4101ec008317d43090f532bfb07d (diff)
downloadqemu-arm-5bfd75a35c11dd3aa61c73d0d2cd88137c31519c.tar.gz
tcg/ppc: Revise goto_tb implementation
Restrict the size of code_gen_buffer to 2GB on ppc64, which lets us assert that everything is reachable with addis+addi from tb_ret_addr. This lets us use a max of 4 insns for goto_tb instead of 7. Emit the indirect branch portion of goto_tb up front, which means we only have to update two insns to update any link. With a 64-bit store, we can update the link atomically, which may be required in future. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'translate-all.c')
-rw-r--r--translate-all.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/translate-all.c b/translate-all.c
index 333eba4f5d..20ce40ec28 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -468,6 +468,8 @@ static inline PageDesc *page_find(tb_page_addr_t index)
# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
#elif defined(__sparc__)
# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
+#elif defined(__powerpc64__)
+# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
#elif defined(__aarch64__)
# define MAX_CODE_GEN_BUFFER_SIZE (128ul * 1024 * 1024)
#elif defined(__arm__)