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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-10 18:10:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-10 18:10:58 +0100 |
| commit | 9a9f1f59521f46e8ff4527d9a2b52f83577e2aa3 (patch) | |
| tree | 1f61c19351af8a1bb1de183983fe97c9879285c8 /tcg | |
| parent | 88808a022c06f98d81cd3f2d105a5734c5614839 (diff) | |
target/arm: Clear SVE high bits for FMOVpull-target-arm-20180510
Use write_fp_dreg and clear_vec_high to zero the bits
that need zeroing for these cases.
Cc: qemu-stable@nongnu.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180502221552.3873-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg')
0 files changed, 0 insertions, 0 deletions