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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-09 21:58:46 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-09 21:58:46 +0000
commitf31e93706412e188a4164d1aaf65ad54b85fc951 (patch)
tree73b250b6b05af786032687e824b67cbf36913fc8 /tcg/tcg-opc.h
parentd42f183c0452a9c769b91e3911566566724983ff (diff)
downloadqemu-arm-f31e93706412e188a4164d1aaf65ad54b85fc951.tar.gz
tcg: don't define TCG rotation ops if they are not supported
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6796 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/tcg-opc.h')
-rw-r--r--tcg/tcg-opc.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index 9b7b863c06..cb56323db7 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -71,8 +71,10 @@ DEF2(xor_i32, 1, 2, 0, 0)
DEF2(shl_i32, 1, 2, 0, 0)
DEF2(shr_i32, 1, 2, 0, 0)
DEF2(sar_i32, 1, 2, 0, 0)
+#ifdef TCG_TARGET_HAS_rot_i32
DEF2(rotl_i32, 1, 2, 0, 0)
DEF2(rotr_i32, 1, 2, 0, 0)
+#endif
DEF2(brcond_i32, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
#if TCG_TARGET_REG_BITS == 32
@@ -126,8 +128,10 @@ DEF2(xor_i64, 1, 2, 0, 0)
DEF2(shl_i64, 1, 2, 0, 0)
DEF2(shr_i64, 1, 2, 0, 0)
DEF2(sar_i64, 1, 2, 0, 0)
+#ifdef TCG_TARGET_HAS_rot_i64
DEF2(rotl_i64, 1, 2, 0, 0)
DEF2(rotr_i64, 1, 2, 0, 0)
+#endif
DEF2(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
#ifdef TCG_TARGET_HAS_ext8s_i64