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authorRichard Henderson <rth@twiddle.net>2010-02-16 14:21:19 -0800
committerBlue Swirl <blauwirbel@gmail.com>2010-02-20 08:34:18 +0000
commitdc69960dd6d5387932889fe1ef0c2cead324ae82 (patch)
tree62ccb6a6f00623da9ab7e5edb7c02a4c8b6935b2 /tcg/sparc
parent791d1262e27becc435702417d0f7c99c894ff6fe (diff)
tcg-sparc: Implement ANDC.
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/sparc')
-rw-r--r--tcg/sparc/tcg-target.c6
-rw-r--r--tcg/sparc/tcg-target.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 55c74afd47..1ea474df99 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -224,6 +224,7 @@ static inline int tcg_target_const_match(tcg_target_long val,
#define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00))
#define ARITH_ADDCC (INSN_OP(2) | INSN_OP3(0x10))
#define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01))
+#define ARITH_ANDN (INSN_OP(2) | INSN_OP3(0x05))
#define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02))
#define ARITH_ORCC (INSN_OP(2) | INSN_OP3(0x12))
#define ARITH_ORN (INSN_OP(2) | INSN_OP3(0x06))
@@ -1216,6 +1217,9 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
OP_32_64(and):
c = ARITH_AND;
goto gen_arith;
+ OP_32_64(andc):
+ c = ARITH_ANDN;
+ goto gen_arith;
OP_32_64(or):
c = ARITH_OR;
goto gen_arith;
@@ -1436,6 +1440,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_remu_i32, { "r", "r", "rJ" } },
{ INDEX_op_sub_i32, { "r", "r", "rJ" } },
{ INDEX_op_and_i32, { "r", "r", "rJ" } },
+ { INDEX_op_andc_i32, { "r", "r", "rJ" } },
{ INDEX_op_or_i32, { "r", "r", "rJ" } },
{ INDEX_op_xor_i32, { "r", "r", "rJ" } },
@@ -1493,6 +1498,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_remu_i64, { "r", "r", "rJ" } },
{ INDEX_op_sub_i64, { "r", "r", "rJ" } },
{ INDEX_op_and_i64, { "r", "r", "rJ" } },
+ { INDEX_op_andc_i64, { "r", "r", "rJ" } },
{ INDEX_op_or_i64, { "r", "r", "rJ" } },
{ INDEX_op_xor_i64, { "r", "r", "rJ" } },
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index f5ee205e70..4ea0c19336 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -93,12 +93,14 @@ enum {
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_not_i32
+#define TCG_TARGET_HAS_andc_i32
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_ext32s_i64
#define TCG_TARGET_HAS_ext32u_i64
#define TCG_TARGET_HAS_neg_i64
#define TCG_TARGET_HAS_not_i64
+#define TCG_TARGET_HAS_andc_i64
#endif
//#define TCG_TARGET_HAS_bswap32_i32